CN106782387B - GOA driving circuit - Google Patents

GOA driving circuit Download PDF

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Publication number
CN106782387B
CN106782387B CN201611254809.2A CN201611254809A CN106782387B CN 106782387 B CN106782387 B CN 106782387B CN 201611254809 A CN201611254809 A CN 201611254809A CN 106782387 B CN106782387 B CN 106782387B
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output channel
goa
setting
voltage signal
goa unit
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CN106782387A (en
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黄笑宇
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TCL Huaxing Photoelectric Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3677Details of drivers for scan electrodes suitable for active matrices only

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a kind of GOA driving circuits, including mutually cascade multistage GOA unit, every level-one GOA unit is for driving one-row pixels unit, and the GOA unit has the first output channel, the second output channel and time-sequence control module: first output channel is used to receive and transmit the scanning voltage signal of setting;Second output channel is used to receive and transmit the delay voltage signal of setting;The time-sequence control module in different time ordered intervals for being switched on or off individually first output channel and the second output channel, to generate the line scan signals of the GOA unit according to the delay voltage signal of the scanning voltage signal of the setting and the setting.The GOA driving circuit solves the problems, such as that the mistake of the liquid crystal display data-signal of GOA framework is filled, and improves the display effect of product, improves the quality of product.And the GOA driving circuit production cost is low, is conducive to the competitiveness for promoting product.

Description

GOA driving circuit
Technical field
The invention belongs to technical field of liquid crystal display more particularly to a kind of GOA driving circuits.
Background technique
Liquid crystal display TFT-LCD (Thin Film Transistor Liquid Crystal Display) is current One of principal item of FPD has become modern IT, display platform important in video product.It in recent years, is full Sufficient ultra-narrow frame and the demand for reducing cost, GOA (Gate On Array) technology are developed rapidly.
Based on GOA driving framework liquid crystal display as shown in Figure 1, mainly including gate driving in array substrate Circuit integration region (Gate Driver integrated on Array) a1, display area (Display Area) a2 and Fan-out area (Fan Out Area) a3, in addition, the pcb board for being provided with peripheral drive circuit passes through flexible package S-COF1~S- COF4 is connected with array substrate.
Liquid crystal display based on GOA driving framework is in line scan signals in actual work as shown in Fig. 2, Input [N] What is indicated is the line scan signals of the line n pixel unit of the side driving circuit Gate output, and what Input [N+1] was indicated is driving The line scan signals of (n+1)th row pixel unit of the side circuit Gate output.Because the capacitor of panel itself, resistance are to the shadow of signal It rings, when above-mentioned line scan signals are transmitted to scan line end via scan line, signal waveform will occur as shown in Figure 2 Variation, referring specifically to signal End [N] in figure and End [N+1], wherein End [N] expression be be transmitted to scan line end The line scan signals of line n pixel unit, the (n+1)th row pixel unit for being transferred to scan line end that End [N+1] is indicated Line scan signals.As can be seen that the signal Input [N] and Input [N+1], End that have just been exported compared to the side driving circuit Gate Serious distorted signals has occurred in [N] and End [N+1], and due to distorted signals, so that there are laps for signal, this will be led It causes adjacent rows pixel unit that can be turned on simultaneously, in turn results in mistake and fill phenomenon, by the data signal transmission of mistake to pixel list Member influences the display of liquid crystal display.
Summary of the invention
The first technical problem to be solved by the present invention is the data of pixel unit caused by solving due to distorted signals The problem of signal transmission errors.
In order to solve the above-mentioned technical problem, embodiments herein provides firstly a kind of GOA driving circuit, including mutual Cascade multistage GOA unit, for every level-one GOA unit for driving one-row pixels unit, the GOA unit has the first output logical Road, the second output channel and time-sequence control module: first output channel is used to receive and transmit the scanning voltage of setting Signal;Second output channel is used to receive and transmit the delay voltage signal of setting;The time-sequence control module is used for First output channel and the second output channel are switched on or off individually in different time ordered intervals, according to the setting Scanning voltage signal and the delay voltage signal of the setting generate the line scan signals of the GOA unit.
Preferably, the time-sequence control module is configured as: rear stage GOA is closed in the corresponding time ordered interval of crossover region First output channel of unit, and open the second output channel of the rear stage GOA unit;In addition to the crossover region The first output channel of rear stage GOA unit is opened in time ordered interval, and the second output for closing the rear stage GOA unit is logical Road;Wherein, the scanning voltage signal for corresponding respectively to the setting of adjacent two-stage GOA unit, when reaching scan line end Form the crossover region.
Preferably, the time-sequence control module is configured as: being generated according to the line scan signals of previous stage GOA unit and defeated Control signal out, the control signal for be switched on or off individually in different time ordered intervals first output channel with Second output channel.
Preferably, the time-sequence control module is configured as: when the line scan signals of previous stage GOA unit are cut from high voltage When being changed to low-voltage, first output channel is closed, and open second output channel;When closing, first output is logical Road and after opening the delay time that second output channel reaches setting, opens first output channel, and described in closing Second output channel.
Preferably, the delay time of the setting is according to the scanning voltage signal of the setting of adjacent two-stage GOA unit Crossover region is formed by when reaching scan line end to determine.
Preferably, first output channel includes first switching element, and input terminal connects the scanning electricity of the setting Signal is pressed, control terminal connects the control signal;Second output channel includes second switch element, input terminal connection The delay voltage signal of the setting, control terminal connect the control signal;The first switching element and second switch member The output end of part is coupled together, the line scan signals output end as the GOA unit.
Preferably, the first switching element is P-type TFT, and the second switch element is N-type film crystal Pipe.
Preferably, the delay voltage signal of the setting includes fixed low voltage signal.
Preferably, the time-sequence control module is arranged between the arbitrary neighborhood two-stage GOA unit of GOA driving circuit side Fan-out area in.
Compared with prior art, one or more embodiments in above scheme can have following advantage or beneficial to effect Fruit:
The crossover region between line scan signals is adjusted by using the GOA unit with time-sequence control module, is solved The mistake of data-signal of liquid crystal display of GOA framework of having determined fills problem, improves the display effect of product, improves product Quality.And the GOA driving circuit production cost is low, is conducive to the competitiveness for promoting product.
Other advantages, target and feature of the invention will be illustrated in the following description to a certain extent, and And to a certain extent, based on will be apparent to those skilled in the art to investigating hereafter, Huo Zheke To be instructed from the practice of the present invention.Target and other advantages of the invention can be wanted by following specification, right Specifically noted structure is sought in book and attached drawing to be achieved and obtained.
Detailed description of the invention
Attached drawing is used to provide to the technical solution of the application or further understanding for the prior art, and constitutes specification A part.Wherein, the attached drawing for expressing the embodiment of the present application is used to explain the technical side of the application together with embodiments herein Case, but do not constitute the limitation to technical scheme.
Fig. 1 is the structural schematic diagram for driving the liquid crystal display of framework based on GOA in the prior art;
Fig. 2 is the schematic diagram that the waveform of line scan signals in the prior art is distorted;
Fig. 3 is the structural schematic diagram according to the GOA driving circuit of first embodiment of the invention;
Fig. 4 is the structural schematic diagram according to the GOA driving circuit of second embodiment of the invention;
Fig. 5 is the timing diagram according to the GOA driving circuit of second embodiment of the invention.
Specific embodiment
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings and examples, how to apply to the present invention whereby Technological means solves technical problem, and the realization process for reaching relevant art effect can fully understand and implement.This Shen Please each feature in embodiment and embodiment, can be combined with each other under the premise of not colliding, be formed by technical solution It is within the scope of the present invention.
First embodiment:
Fig. 3 is according to the structural schematic diagram of the GOA driving circuit of first embodiment of the invention, the GOA driving of the embodiment Circuit includes multistage mutually cascade GOA unit, for driving one-row pixels unit, Fig. 3 is shown every level-one GOA unit The structural schematic diagram of N grades of GOA units.As shown, the GOA unit has the first output channel 31, the second output channel 32 And time-sequence control module 33.
First output channel 31 receives what the side driving circuit Gate exported, that is, the scanning voltage signal Input [N] set, And the scanning voltage signal of setting can be transmitted to output end Output [N] after first output channel 31 unlatching.
Second output channel 32 receives the output of the side driving circuit Gate, that is, the delay voltage signal VGL set, and can be with After second output channel 32 unlatching, the delay voltage signal VGL of setting is transmitted to output end Output [N].
Time-sequence control module 33 is connected with the first output channel 31 with the second output channel 32 respectively, for different The first output channel 31 and the second output channel 32 are switched on or off individually in time ordered interval.
The common output end Output [N] of first output channel 31 and the second output channel 32 is as the GOA unit Row sweeps signal output end, and the line scan signals of output are in different time ordered intervals, the setting exported by the first output channel 31 Scanning voltage signal Input [N] and the delay voltage signal VGL of the setting exported by the second output channel 32 generate jointly.
Further, time-sequence control module 33 can be according to the crossover region that line scan signals are generated due to distortion come to One output channel 31 is controlled with the second output channel 32.
As shown in Fig. 2, due to distorted signals, lead between signal End [N] and signal End [N+1] that there are crossover region T. Since in crossover region T, signal End [N] and signal End [N+1] are high level signal, therefore, by data signals Mistake rushes phenomenon.In the present embodiment, it exports in the crossover region signal not, then can eliminate signal End [N] and letter Overlapping phenomenon between number End [N+1].
In a specific embodiment of the invention, rear stage can be closed in the corresponding time ordered interval of crossover region First output channel 31 of GOA unit (N+1 grades), and the second output channel 32 of rear stage GOA unit is opened, make rear stage GOA unit cannot export the scanning voltage signal of setting.And in the time ordered interval in addition to crossover region, rear stage is opened First output channel 31 of GOA unit, and the second output channel 32 of rear stage GOA unit is closed, make rear stage GOA unit just The scanning voltage signal of often output setting.
By the way that time-sequence control module 33, and sweeping according to the setting of adjacent two-stage GOA unit are arranged in every grade of GOA unit It retouches the crossover region that voltage signal is formed when reaching scan line end to control the output of GOA unit, eliminate adjacent It is overlapping between line scan signals, problem can be filled to avoid the mistake of data signals.
Second embodiment:
Fig. 4 is according to the structural schematic diagram of the GOA driving circuit of second embodiment of the invention, as shown, in the present invention It in embodiment, is controlled, is had according to each output channel of the line scan signals of previous stage GOA unit to rear stage GOA unit Body is that time-sequence control module 33 generates according to the line scan signals (N grades of Output [N]) of previous stage GOA unit and exports control Signal OE processed, control signal OE in different time ordered intervals for being switched on or off individually the first output channel 31 and second defeated Channel 32 out.It is illustrated below with reference to Fig. 4.
First output channel 31 is made of P-type TFT A1, and the scanning voltage of source electrode and the GOA unit setting of A1 is believed Number Input [N+1] is connected, the output end to drain as line scan signals, and grid is connected with signal OE is controlled.
Second output channel 32 is made of N-type TFT A2, the source electrode and the delay voltage signal VGL phase of setting of A2 Connection, the output end to drain as line scan signals, grid are connected with control signal OE.
Wherein, VGL is generally a fixed low voltage signal, preferably can be invalid with the scanning voltage signal of setting The corresponding low voltage signal of sweep interval, i.e. low level.
The drain electrode of thin film transistor (TFT) A1 and A2 are coupled together, and export the line scan signals Output [N+1] of GOA unit.
When controlling signal OE is high level signal, A1 is closed, and A2 is opened, and VGL is output to Output [N+ via A2 1], when control signal OE is low level signal, A1 is opened, and A2 is closed, and Input [N] is output to Output [N+ via A1 1], i.e., opening or closing for the first output channel 31 and the second output channel 32 is controlled by control signal OE.
Further, time-sequence control module 33 receives the line scan signals Output of (N grades) of previous stage GOA unit output [N], and control signal OE is generated according to line scan signals Output [N], Fig. 5 is the GOA according to second embodiment of the invention The timing diagram of driving circuit, is illustrated below with reference to Fig. 5.
When the line scan signals Output [N] of previous stage GOA unit is switched to low-voltage from high voltage, timing control mould Block 33 exports the control signal OE of a direct impulse, and the high voltage of control signal OE closes P-type TFT A1, will N-type TFT A2 is opened, then the low potential of output end Output [N+1] the output VGL of the same level GOA unit.At this point, the same level The normal output that GOA unit is used to form the scanning voltage signal of the setting of the valid interval of line scan signals is forced to turn off, It can be overlapping to avoid occurring between the line scan signals Output [N] of previous stage GOA unit.
After the high voltage for controlling signal OE continues the delay time of a setting, control signal OE falls to low-voltage, this When P-type TFT A1 open, and N-type TFT A2 is closed, and Output [N+1] can normally export the scanning of setting Voltage signal Input [N+1].
By closing P-type TFT A1 (i.e. the first output channel 31) in specific time ordered interval, realize Interval between Output [N] and Output [N+1], so that Output [N] and Output [N+1] are transmitted to scan line end When, non-overlapping area between signal End [N] and End [N+1] eliminates mistake and fills phenomenon, as shown in Figure 5.
The delay time for controlling the lasting setting of signal OE can be according to the scanning electricity of the setting of adjacent two-stage GOA unit Pressure signal is formed by crossover region when reaching scan line end to determine, referring specifically to first embodiment, details are not described herein again.
In addition, the case where due to different display panels, is different, control the time of signal OE specifically acted on And delay time (i.e. the width of pulse) can be adjusted according to actual use situation.It can be in time-sequence control module 33 Design initial stage just sets the delay time for controlling the lasting setting of signal OE, after the completion of setting, does not need additionally again The other control signals of addition can control OE using the line scan signals that previous stage GOA unit exports.
Being fanned out between the two-stage GOA unit of the arbitrary neighborhood that GOA driving circuit side is set of the embodiment of the present invention In region, therefore can be defeated in the GOA of each grid in the fan-out area of the side Gate on the panel of traditional GOA framework Outlet increases additional structure to realize, circuit structure is simple, advantageously reduces control cost.
It should be noted that being readily appreciated that, there is no time-sequence control modules corresponding thereto for first order GOA unit.
Although disclosed herein embodiment it is as above, the content is only to facilitate understanding the present invention and adopting Embodiment is not intended to limit the invention.Any those skilled in the art to which this invention pertains are not departing from this Under the premise of the disclosed spirit and scope of invention, any modification and change can be made in the implementing form and in details, But scope of patent protection of the invention, still should be subject to the scope of the claims as defined in the appended claims.

Claims (8)

1. a kind of GOA driving circuit, including mutually cascade multistage GOA unit, every level-one GOA unit is for driving one-row pixels Unit, the GOA unit have the first output channel, the second output channel and time-sequence control module:
First output channel is used to receive and transmit the scanning voltage signal of setting;
Second output channel is used to receive and transmit the delay voltage signal of setting;
The time-sequence control module in different time ordered intervals for being switched on or off individually first output channel and the Two output channels, it is mono- to generate the GOA according to the delay voltage signal of the scanning voltage signal of the setting and the setting The line scan signals of member,
Wherein, the time-sequence control module is configured as:
Receive previous stage GOA unit output line scan signals, and according to the line scan signals of previous stage GOA unit generate and it is defeated Control signal out, the control signal for be switched on or off individually in different time ordered intervals first output channel with Second output channel.
2. GOA driving circuit according to claim 1, which is characterized in that the time-sequence control module is configured as:
The first output channel of the same level GOA unit is closed in the corresponding time ordered interval of crossover region, and it is mono- to open the same level GOA Second output channel of member;
The first output channel of the same level GOA unit is opened in the time ordered interval in addition to the crossover region, and closes described Second output channel of grade GOA unit;
Wherein, the scanning voltage signal for corresponding respectively to the setting of adjacent two-stage GOA unit, when reaching scan line end Form the crossover region.
3. GOA driving circuit according to claim 1, which is characterized in that the time-sequence control module is configured as:
When the line scan signals of previous stage GOA unit are switched to low-voltage from high voltage, first output channel is closed, and Open second output channel;
After closing first output channel and opening second output channel and reach the delay time of setting, described in unlatching First output channel, and close second output channel.
4. GOA driving circuit according to claim 3, which is characterized in that the delay time of the setting is according to adjacent two The scanning voltage signal of the setting of grade GOA unit is formed by crossover region when reaching scan line end and determines.
5. GOA driving circuit according to claim 1, which is characterized in that
First output channel includes first switching element, and input terminal connects the scanning voltage signal of the setting, control End processed connects the control signal;
Second output channel includes second switch element, and input terminal connects the delay voltage signal of the setting, control End processed connects the control signal;
The first switching element and the output end of second switch element are coupled together, the row scanning as the GOA unit Signal output end.
6. GOA driving circuit according to claim 5, which is characterized in that the first switching element is p-type film crystal Pipe, the second switch element are N-type TFT.
7. GOA driving circuit according to claim 1, which is characterized in that the delay voltage signal of the setting includes solid Fixed low voltage signal.
8. GOA driving circuit according to claim 1, which is characterized in that the time-sequence control module setting drives in GOA In fan-out area between the arbitrary neighborhood two-stage GOA unit of circuit side.
CN201611254809.2A 2016-12-30 2016-12-30 GOA driving circuit Active CN106782387B (en)

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Publication number Priority date Publication date Assignee Title
CN109637407A (en) * 2019-01-09 2019-04-16 惠科股份有限公司 A kind of driving method of method, apparatus that repairing display panel and display panel
CN110992868B (en) * 2019-12-20 2022-08-16 京东方科技集团股份有限公司 Display substrate driving method and device and display device
CN113380168B (en) * 2021-05-20 2022-09-27 北海惠科光电技术有限公司 Shift register, gate drive circuit and display panel

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0879053A (en) * 1994-09-06 1996-03-22 Toshiba Corp Level shift circuit
KR20050039183A (en) * 2003-10-24 2005-04-29 엘지.필립스 엘시디 주식회사 Apparatus of driving liquid crystal display device
CN101127199A (en) * 2007-09-06 2008-02-20 友达光电股份有限公司 Gate driver for outputting superposition-free scanning signal, liquid crystal display and method
CN101676986A (en) * 2008-09-19 2010-03-24 三星电子株式会社 Liquid crystal display and display system comprising the same
CN105304044A (en) * 2015-11-16 2016-02-03 深圳市华星光电技术有限公司 Liquid crystal display device and GOA circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0879053A (en) * 1994-09-06 1996-03-22 Toshiba Corp Level shift circuit
KR20050039183A (en) * 2003-10-24 2005-04-29 엘지.필립스 엘시디 주식회사 Apparatus of driving liquid crystal display device
CN101127199A (en) * 2007-09-06 2008-02-20 友达光电股份有限公司 Gate driver for outputting superposition-free scanning signal, liquid crystal display and method
CN101676986A (en) * 2008-09-19 2010-03-24 三星电子株式会社 Liquid crystal display and display system comprising the same
CN105304044A (en) * 2015-11-16 2016-02-03 深圳市华星光电技术有限公司 Liquid crystal display device and GOA circuit

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Address after: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province

Patentee after: TCL Huaxing Photoelectric Technology Co.,Ltd.

Address before: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province

Patentee before: Shenzhen China Star Optoelectronics Technology Co.,Ltd.