CN106772176B - A kind of D.C. high-current standard source output method and device based on parallel connection confluence - Google Patents
A kind of D.C. high-current standard source output method and device based on parallel connection confluence Download PDFInfo
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Abstract
The invention discloses a kind of D.C. high-current standard source output method and device based on parallel connection confluence, method and step includes: to ensure that each DC output unit signal output is synchronous and issues electric current output order to each DC output unit by host computer；Each DC output unit parsing electric current output order obtains each harmonic content and harmonic phase value of electric current to be generated, generates the analog current signal I of assigned frequency0And carry out closed loop feedback and obtain output DC current, finally the output DC current parallel connection of each DC output unit is converged and is exported；Device includes host computer and more than two DC output units, and DC output unit includes control unit, ripple output module, error amplifier, current amplification standard source and direct current transducer.The present invention has the advantages that output electric current is big, output accuracy is high, extension and simplification are flexible and convenient, has a wide range of application.
Description
Technical field
The present invention relates to for direct current table calibration and the High-accuracy direct current High-current output traced to the source of DC current metering it is straight
A kind of stream source, and in particular to D.C. high-current standard source output method and device based on parallel connection confluence.
Background technique
The fast development of power electronic technique has led new round technological revolution.Currently, DC techniques are fast-developing, electronic
The technologies such as automobile, extra-high voltage direct-current transmission have moved towards maturation from the exploratory stage.Electric car becomes the most popular industry in the whole world
One of, it is tesla, the U.S. known to compatriots, domestic BYD E series etc., has all moved towards market；From Burner zone-
It is domestic at present to be completed or in the extra-high voltage built since ± 800kV the extra-high voltage direct-current transmission engineerings such as sea, silk screen-southern Jiangsu put into operation
DC power transmission line is a plurality of up to 10.
The application of DC techniques has also urged the fast development in DC measurement field.For electric car charging and extra-high voltage
DC measurement device (including the devices such as DC voltage transformer, DC current transformer, direct current energy meter) in direct current transportation
Calibrating and inspection, current many enterprises and mechanism do a lot of work.As the auspicious relay protection in south, Xi'an Xi electricity Deng company have produced use
In metering DC current, the mutual inductor of voltage；Wasion, Ke Ludeng company have been developed that for measuring the straight of electric car charging
Flow metering device has simultaneously come into operation etc..Multiple mechanisms have been developed that the standard straight for laboratory verification DC measurement device
Flow device.The technical requirements of flow directing device regulation related to detection method is also constantly put into effect.Guo Wang incorporated business standard
QGDW530-2010 " D.C. high voltage transmission DC electronic current transformer technical specification ", QGDW531-2010 " high voltage direct current
Transmission of electricity direct current electronic voltage transformer technical specification ", national metrological verification regulations JJG 842-1993 " direct current energy meter ",
JJG 982-2003 " DC resistance box ", to direct current instrument transformer, direct current energy meter, the technical requirements of resistance box and calibration method etc.
It is made that specified in more detail.
Currently, a large amount of calibration operations in relation to DC measurement equipment are just carried out in high gear.It is achievable big in laboratory
The calibration operation of current DC table.But since the laboratory DC source that exports greatly of high-precision usually exists, volume is big, equipment is stupid
The problem of weight, the scene of moving to go development on-site proving work very difficult.It is exported greatly it is therefore desirable to develop a kind of high-precision
Standard source, convenient for the development of metering device scene periodic calibration work.
Summary of the invention
The technical problem to be solved in the present invention: in view of the above problems in the prior art, provide that a kind of output electric current is big, output
Precision is high, extends and simplify the D.C. high-current standard source output method based on parallel connection confluence that is flexible and convenient, having a wide range of application
And device.
In order to solve the above-mentioned technical problem, the technical solution adopted by the present invention are as follows:
The present invention provides a kind of D.C. high-current standard source output method based on parallel connection confluence, and implementation steps include:
1) in advance that the output end of each DC output unit for being used to export DC current is in parallel, by host computer to each
A DC output unit issues synchronous trigger pulse, to judge whether signal output synchronizes between each DC output unit, such as
Signal output is asynchronous between each DC output unit of fruit, jumps and executes step 1)；Otherwise, it jumps and executes step 2)；
2) electric current output order is issued to each DC output unit by host computer；
3) each DC output unit parsing electric current output order obtains each harmonic content and harmonic wave of electric current to be generated
Phase value generates the analog current signal I of assigned frequency according to each harmonic content and harmonic phase value0；Each direct current
Current output DC current is sampled and reduces specified multiple by output unit obtains sample rate current Ix, by sample rate current IxAnd mould
Quasi- current signal I0It makes the difference to obtain current compensation part △ I, current compensation part △ I input current power amplifier standard source passes through
Current amplification standard source obtains the output DC current of each DC output unit；
4) the output DC current parallel connection of each DC output unit is converged and is exported.
Preferably, the detailed step of step 1) includes:
1.1) synchronous trigger pulse, each DC output unit output are issued to each DC output unit by host computer
While electric current, starting counter is counted；
1.2) after specified time, while each DC output unit stops output electric current, by host computer to each
A DC output unit issues synchronous trigger pulse again, and the counter of each DC output unit is touched in lock-out pulse respectively
Give stopping timing；
1.3) specify a DC output unit as host, remaining DC output unit as slave, by host, slave
Count value is subtracted each other, if subtracting each other result is all larger than preset threshold, determines that signal output is not between each DC output unit
It is synchronous, it jumps and executes step 1)；Otherwise determine that signal output synchronizes between each DC output unit, jumps and executes step 2).
Preferably, analog current signal I is generated according to each harmonic content and harmonic phase value in step 3)0It is detailed
Carefully step includes:
S1 each harmonic content and harmonic phase value) are generated into ripple Wave data；Meanwhile it issuing frequency control word K and making
For the input of phase accumulator, the phase accumulator is made of N adders and N-bit register cascade, the frequency control
Word K is binary-coded phase increment value；
S2) input terminal of output feedback to the N adders of N-bit register is realized cumulative function by phase accumulator,
In each clock pulses fc, N adders accumulate once frequency control word K, and are increase accordingly by N-bit register output
The phase increment of one step-length, so that the output of phase accumulator is to be with K by described using K as the linear increment sequence of step-length
The linear increment sequence of step-length is stored in wave memorizer；
S3 ripple signal) is obtained to the wave memorizer sampling that table look-up according to ripple Wave data, and by ripple
Signal carries out the analog current signal I that D/A is converted to assigned frequency by D/A conversion module0。
Preferably, step S3) when ripple signal is carried out D/A conversion, in particular to receive issue from host computer it is same
Trigger pulse is walked, a synchronous trigger pulse is often received and then causes a trigger pulse interruption, while by being set as PPS output
The source of synchronising signal of mode exports synchronization signal, the control of each DC output unit to the control unit of each DC output unit
Unit processed captures the zero-acrross ing moment of output waveform using genlock mechanism, when the mistake for capturing D/A conversion module output waveform
Zero moment then causes a DAC zero passage and interrupts, and then obtains the time between adjacent trigger pulse interrupts, DAC zero passage is interrupted
Difference, and time difference input DDS digital frequency synthesizer is obtained into DAC frequency control signal, by the DAC frequency control signal
The control terminal of D/A conversion module is inputted, the ripple signal of input is carried out D/A conversion by control D/A conversion module, obtains specified frequency
The analog current signal I of rate0。
The present invention also provides a kind of D.C. high-current standard source output devices based on parallel connection confluence, including host computer and two
A above DC output unit, the DC output unit includes control unit, ripple output module, error amplifier, electricity
Stream power amplifier standard source and direct current transducer, described control unit be connected respectively with host computer, the output end of described control unit with
Ripple output module is connected, and the input terminal all the way of the error amplifier is connected with the output end of ripple output module, another way
Input terminal is connected with the output end of direct current transducer, and the output end of the error amplifier is connected with current amplification standard source, institute
The input terminal for stating direct current transducer is connected with the output end of current amplification standard source, and the current amplification of all DC output units
D.C. high-current standard source output terminal is used as after the output end of standard source is in parallel；The host computer is sent out to each DC output unit
Trigger pulse is synchronized out, to judge whether signal output synchronizes between each DC output unit, if each direct current output list
Signal output is synchronous between member then issues electric current output order to each DC output unit；Each DC output unit parsing electricity
Stream output order obtains each harmonic content and harmonic phase value of electric current to be generated, according to each harmonic content and harmonic wave
The analog current signal I of phase value generation assigned frequency0；Each DC output unit samples current output DC current simultaneously
It reduces specified multiple and obtains sample rate current Ix, by sample rate current IxWith analog current signal I0It makes the difference to obtain current compensation part △
Current compensation part △ I input current power amplifier standard source is obtained each DC output unit by current amplification standard source by I
Output DC current；The output DC current parallel connection of each DC output unit, which is converged, to be exported.
Preferably, described control unit includes microprocessor and communication interface, the microprocessor by communication interface and
Host computer is connected, and the ripple output module is connected with the output end of microprocessor.
Preferably, institute's described control unit further includes display and Keysheet module, the display, Keysheet module respectively with
Microprocessor is connected.
Preferably, institute's described control unit further includes Pulse sampling device, the output end and micro process of the Pulse sampling device
Device is connected.
Preferably, institute's ripple output module includes dsp processor, N adders, N-bit register, Waveform storages
Device, D/A conversion module and reference clock module, the dsp processor are connected with microprocessor, the N adder, N post
Both storages concatenation forms phase accumulator, and the output end of the dsp processor is connected with the input terminal of phase accumulator, described
The output of N-bit register is connected with the address wire of wave memorizer, the ripple Wave data output end of the dsp processor, ginseng
The output end for examining clock module is connected with wave memorizer jointly, the input terminal of the D/A conversion module respectively with Waveform storage
Device, reference clock module are connected, and the dsp processor tables look-up to wave memorizer, being stored in two in wave memorizer
The signal sampling value of scale coding value form is found to obtain ripple signal, and ripple signal is carried out D/A by D/A conversion module
It is converted to the analog current signal of assigned frequency, the output end of the D/A conversion module is connected with error amplifier.
The present invention is based on the D.C. high-current standard source output methods of parallel connection confluence to have an advantage that
1, the present invention is under the premise of signal output is synchronous between each DC output unit, by host computer to each straight
It flows output unit and issues electric current output order, each DC output unit parsing electric current output order obtains each of electric current to be generated
Subharmonic content and harmonic phase value generate the analog current of assigned frequency according to each harmonic content and harmonic phase value
Signal I0；Current output DC current is sampled and reduces specified multiple by each DC output unit obtains sample rate current Ix, will
Sample rate current IxWith analog current signal I0It makes the difference to obtain current compensation part △ I, by current compensation part △ I input current function
Standard source is put, the output DC current of each DC output unit is obtained by current amplification standard source, using parallel connection confluence skill
Art combines feedback regulation by the low current output of the completely the same driving signal of multichannel, obtains distortionless high-precision linear
High-current output has the advantages that output electric current is big, output accuracy is high, extension and simplification are flexible and convenient.
2, the present invention can examine and determine direct current energy meter, DC ammeter, direct current instrument transformer, dc power table, and support upper
The output of machine software program control, supports secondary development, has the advantages that have a wide range of application.
The present invention is based on the D.C. high-current standard source output devices of parallel connection confluence to have an advantage that the present invention is based on simultaneously
The D.C. high-current standard source output device of connection confluence is that the present invention is based on the D.C. high-current standard source output sides of parallel connection confluence
The corresponding device of method, by its component and its connection relationship, can be realized the present invention is based on parallel connection confluence D.C. high-current mark
Quasi- source output method equally also has the aforementioned excellent of the D.C. high-current standard source output method to converge the present invention is based on parallel connection
Point, details are not described herein.
Detailed description of the invention
Fig. 1 is the basic procedure schematic diagram of present invention method.
Fig. 2 is the flow diagram of the synchronous judgement of signal output in the embodiment of the present invention.
Fig. 3 is the Principle of Synchronic Control schematic diagram of D/A conversion in the embodiment of the present invention.
Fig. 4 is the theory structure schematic diagram of the device of that embodiment of the invention.
Fig. 5 is the theory structure schematic diagram of ripple output module in the embodiment of the present invention.
Fig. 6 is the structural schematic diagram that the device of that embodiment of the invention is applied to direct current energy meter error testing.
Marginal data: 1, host computer；2, DC output unit；21, control unit；211, microprocessor；212, communication connects
Mouthful；213, Pulse sampling device；214, Keysheet module；215, Pulse sampling device；22, ripple output module；221, dsp processor；
222, N adders；223, N-bit register；224, wave memorizer；225, D/A conversion module；226, reference clock module；
23, error amplifier；24, current amplification standard source；25, direct current transducer.
Specific embodiment
As shown in Figure 1, the implementation steps packet of D.C. high-current standard source output method of the present embodiment based on parallel connection confluence
It includes:
1) in advance that the output end of each DC output unit for being used to export DC current is in parallel, by host computer to each
A DC output unit issues synchronous trigger pulse, to judge whether signal output synchronizes between each DC output unit, such as
Signal output is asynchronous between each DC output unit of fruit, jumps and executes step 1)；Otherwise, it jumps and executes step 2)；
2) electric current output order is issued to each DC output unit by host computer；
3) each DC output unit parsing electric current output order obtains each harmonic content and harmonic wave of electric current to be generated
Phase value generates the analog current signal I of assigned frequency according to each harmonic content and harmonic phase value0；Each direct current output
Current output DC current is sampled and reduces specified multiple by unit obtains sample rate current Ix, by sample rate current IxWith simulation electricity
Flow signal I0It makes the difference to obtain current compensation part △ I, by current compensation part △ I input current power amplifier standard source, passes through electric current
Power amplifier standard source obtains the output DC current of each DC output unit；
4) the output DC current parallel connection of each DC output unit is converged and is exported.
It hereafter will be by taking two DC output units as an example, and by two DC output units by the way of host and slave
It is illustrated, to the present invention is based on the D.C. high-current standard source output methods of parallel connection confluence and device to carry out further
It is bright.It should be noted that two DC output units of the present embodiment are intended merely to facilitate by the way of host and slave
Bright, status is identical between output electric current link, two DC output units；Furthermore it also can according to need using more
DC output unit, principle is identical as the present embodiment, therefore details are not described herein.
Whether the clock module of each DC output unit is precisely consistent, and it is defeated largely to determine whether source can synchronize
Out.In the present embodiment, the detailed step of step 1) includes:
1.1) synchronous trigger pulse, each DC output unit output are issued to each DC output unit by host computer
While electric current, starting counter is counted；
1.2) after specified time, while each DC output unit stops output electric current, by host computer to each
A DC output unit issues synchronous trigger pulse again, and the counter of each DC output unit is touched in lock-out pulse respectively
Give stopping timing；
1.3) specify a DC output unit as host, remaining DC output unit as slave, by host, slave
Count value is subtracted each other, if subtracting each other result is all larger than preset threshold, determines that signal output is not between each DC output unit
It is synchronous, it jumps and executes step 1)；Otherwise determine that signal output synchronizes between each DC output unit, jumps and executes step 2).
Referring to fig. 2, response feedback mechanism is used in the present embodiment, after the synchronization trigger pulse of host computer issues, host,
Counter inside slave starts counting under lock-out pulse triggering；While DC output unit stops output, counter exists
Lock-out pulse triggering is lower to stop timing；When stopping timing, host count device is counted P respectively by host, slavecnt1And slave
Counter counts Pcnt2Host computer is sent to compare, between host computer calculating main frame, slave by host, slave count value phase
Subtract to obtain and subtracts each other result △ Pcnt, △ Pcnt=Pcnt1-Pcnt2, when subtracting each other result △ PcntLess than or equal to preset threshold value Pcnt0When,
Determine that host, signal output synchronizes between slave, when subtracting each other result △ PcntGreater than preset threshold value Pcnt0When, determine host, from
Signal output is asynchronous between machine.
In the present embodiment, analog current signal I is generated according to each harmonic content and harmonic phase value in step 3)0It is detailed
Carefully step includes:
S1 each harmonic content and harmonic phase value) are generated into ripple Wave data；Meanwhile it issuing frequency control word K and making
For the input of phase accumulator, phase accumulator is made of N adders and N-bit register cascade, frequency control word K be two into
Make the phase increment value of coding；
S2) input terminal of output feedback to the N adders of N-bit register is realized cumulative function by phase accumulator,
In each clock pulses fc, N adders accumulate once frequency control word K, and are increase accordingly by N-bit register output
The phase increment of one step-length so that the output of phase accumulator be using K as the linear increment sequence of step-length, will be using K as step-length
Linear increment sequence be stored in wave memorizer；
S3 ripple signal) is obtained to the wave memorizer sampling that table look-up according to ripple Wave data, and by ripple signal
The analog current signal I that D/A is converted to assigned frequency is carried out by D/A conversion module0。
As shown in figure 3, step S3) when ripple signal is carried out D/A conversion, in particular to receives and issue from host computer
Synchronous trigger pulse often receives a synchronous trigger pulse and then causes a trigger pulse interruption, while defeated by being set as PPS
The source of synchronising signal of mode exports synchronization signal to the control unit of each DC output unit out, each DC output unit
Control unit captures the zero-acrross ing moment of output waveform using genlock mechanism, when capturing D/A conversion module output waveform
Zero-acrross ing moment, which then causes DAC zero passage, to interrupt, then obtain between adjacent trigger pulse interrupts, DAC zero passage is interrupted when
Between it is poor, and by the time difference input DDS digital frequency synthesizer obtain DAC frequency control signal, DAC frequency control signal is defeated
Enter the control terminal of D/A conversion module, the ripple signal of input is carried out D/A conversion, obtains assigned frequency by control D/A conversion module
Analog current signal I0.In the present embodiment, source of synchronising signal uses XL8061, and sets pulse per second (PPS) PPS for XL8061
PPS output is connected on the synchronization input port of DC output unit by (Pulse Per Second) output mode.Using synchronization
Locking phase control program is realized and is exported to host and slave using capturing unit, general purpose timer and the comparing unit inside DSP
The capture of signal achievees the purpose that host and slave output signal, with phase, realize the synchronization of current output sources with frequency.The present embodiment
Based on parallel connection confluence D.C. high-current standard source output method use genlock mechanism, when capturing the zero passage of output waveform
It carves, remains zero-acrross ing moment and zero cross fired impulsive synchronization, synchronous error is less than 4us, is generally kept in 1us or so.
The control unit of each DC output unit of the present embodiment captures the zero passage of output waveform using genlock mechanism
Moment interrupts when the zero-acrross ing moment for capturing D/A conversion module output waveform then causes a DAC zero passage, so that each
The output of DC output unit can realize synchronism output under synchronous trigger pulse, remain it and zero cross fired pulse
It is synchronous.The phase-locked function is realized by the frequency trim mechanism of DDS digital frequency synthesizer, can be by finely tuning DDS number
The frequency of word frequency synthesizer controls the rate of D/A conversion, and the change of D/A conversion output speed actually just changes output wave
The frequency of shape, so as to realize the synchronized tracking to external sync trigger pulse.System triggers arteries and veins by zero passage interruption logging
At the time of punching and D/A conversion module zero passage, the defeated of DDS digital frequency synthesizer is adjusted by comparing the difference of zero-acrross ing moment
Out, output clock of the output of DDS digital frequency synthesizer as D/A conversion module, adjusts the defeated of DDS digital frequency synthesizer
The zero-acrross ing moment that D/A conversion module can be adjusted out, until D/A conversion module zero-acrross ing moment and trigger pulse arrival when
Carve basic synchronization.Adjustment process carrys out locking phase using PID regulative mode, and the rate-adaptive pacemaker moment of system is allowed to track upper trigger signal.
Due to interrupt response time be it is uncertain, in the case where modification of program or different control panels, all may cause interruption ring
Difference between seasonable, in order to accurately compensate the locking phase error as caused by interrupt response difference, on the software of host computer
It is provided with trigger delay compensation setting, an offset can be manually given before factory to adjust final synchronous error.
As shown in figure 4, the D.C. high-current standard source output device based on parallel connection confluence of the present embodiment includes host computer 1
With more than two DC output units 2, DC output unit 2 includes control unit 21, ripple output module 22, error amplification
Device 23, current amplification standard source 24 and direct current transducer 25, control unit 21 are connected with host computer 1 respectively, control unit 21
Output end is connected with ripple output module 22, the input terminal all the way of error amplifier 23 and the output end phase of ripple output module 22
Even, another way input terminal is connected with the output end of direct current transducer 25, the output end and current amplification standard of error amplifier 23
Source 24 is connected, and the input terminal of direct current transducer 25 is connected with the output end of current amplification standard source 24, and all direct current output lists
D.C. high-current standard source output terminal is used as after the output end of the current amplification standard source 24 of member 2 is in parallel.The present embodiment based on
The D.C. high-current standard source output device of parallel connection confluence controls DC output unit 2 by host computer 1, host computer 1
It is connect through Serial Port Line with DC output unit 2, sets output valve at 1 end of host computer, pass through the completely the same driving number of two-way
Signal drives the control unit 21 of DC output unit 2 to issue signal output order, under the synchronously control of control unit 21, leads to
22 output ripple of ripple output module is crossed, then passes through current amplification standard source after carrying out closed loop feedback adjusting by error amplifier 23
24 output DC currents, obtain distortionless high-precision linear high current after by D.C. high-current parallel connection confluence.
Referring to fig. 4, the present embodiment specifically includes two DC output units 2, when required output electric current is larger, passes through two
2 parallel output of platform DC output unit, one is used as host when in parallel, and one is used as slave, and is controlled by host computer 1
System, host computer 1 is connected through serial ports with host, slave, and the electric current of two equipment exports and together, and anode and anode are together, negative
End and negative terminal together, are connected in tested load.Host, slave control unit 21 according to current setting value size export dispersion number
Word signal to ripple output module 22, believe by the ripple obtained after ripple output module 22 carries out ripple synthesis and digital-to-analogue conversion
Number, ripple signal input current power amplifier standard source 24 after 23 closed-loop control of error amplifier, through current amplification standard source 24 into
Row power amplification simultaneously couples output constant current source.Meanwhile (the Zero flux current sense of direct current transducer 25 is equipped in analog circuit
Device), measure the output end current value I of current amplification standard source 24x, IxError amplifier 23 is fed back to, into error amplifier 23
Measured value Ix and user's setting value I0It is compared, the output valve of actual source is adjusted according to the difference that the two compares, to protect
The output valve moment in card source is consistent with setting value, guarantees that the load regulation in source controls within ± 0.05%RD and (loads from sky
It is loaded onto fully loaded).Current amplification standard source can produce each range DC current, design current amount by mV grades of small voltage signal
Journey are as follows: 0.2A, 1A, 5A, 10A, 30A, 60A, 120A, 300A, when using parallel connection confluence output, exportable 600A allows each amount
Journey maximum overshoot 120%, stability: 0.01%/3min.
As shown in figure 4, control unit 21 includes microprocessor 211 and communication interface 212, microprocessor 211 passes through communication
Interface 212 is connected with host computer, and ripple output module 22 is connected with the output end of microprocessor 211.
As shown in figure 4, control unit 21 further includes display 213 and Keysheet module 214, display 213, Keysheet module
214 are connected with microprocessor 211 respectively.
As shown in figure 4, control unit 21 further includes Pulse sampling device 215, the output end and micro process of Pulse sampling device 215
Device 211 is connected, and can be used for acquiring the active infrared pulse of tested direct current energy meter, realizes direct current energy meter error testing.
Ripple output module 22 carries out discrete signal fitting using DSP+DAC and realizes ripple output in the present embodiment.Such as Fig. 5
It is shown, ripple output module 22 include dsp processor 221, N adders 222, N-bit register 223, wave memorizer 224,
D/A conversion module 225 and reference clock module 226, dsp processor 221 are connected with microprocessor 211, N adders 222, N
Both bit registers 223 concatenation forms phase accumulator, the input terminal phase of the output end and phase accumulator of dsp processor 221
Even, the output of N-bit register 223 is connected with the address wire of wave memorizer 224, and the ripple Wave data of dsp processor 221 is defeated
Outlet, reference clock module 226 output end be connected jointly with wave memorizer 224, the input terminal of D/A conversion module 225 point
Be not connected with wave memorizer 224, reference clock module 226, dsp processor 221 tables look-up to wave memorizer 224,
The signal sampling value for being stored in binary coded value form in wave memorizer 224 is found to obtain ripple signal, and ripple is believed
Number carrying out D/A by D/A conversion module 225 is converted to the analog current signal of assigned frequency, D/A conversion module 225 it is defeated
Outlet is connected with error amplifier 23.According to Fourier transformation theorem, any periodic signal for meeting Dirichlet condition all may be used
To be decomposed into the sum of a series of sinusoidal or cosine signals, and according to nyquist sampling theorem, be greater than when sampling frequency or
When equal to twice of analog signal highest frequency, original analog letter can be recovered without distortions by the discrete series that sampling obtains
Number.Setting each harmonic content and harmonic phase value are inputted by keyboard in the software interface of host computer 1, using DC digital frequency
Rate synthetic technology obtains corresponding discrete digital signal sequence and is stored in wave memorizer 224, and wave memorizer 224 is defeated
Discrete digital signal out is sent to D/A conversion module 225, and dsp processor 221 tables look-up to wave memorizer 224, storage
The signal sampling value of binary coded value form is found to obtain ripple signal in wave memorizer 224, and ripple signal is led to
It crosses the progress of D/A conversion module 225 D/A and is converted to the analog current signal of assigned frequency, thus synthesize ripple signal, thus
Obtain the precision current source comprising each harmonic content and harmonic phase value.The direct current of host and slave output in the present embodiment
After flowing through confluence in parallel, output to corresponding equipment under test, 2 times of electromechanical stream, pass through more direct currents based on the current value of final output
The output of 2 sync of output unit, exportable bigger DC current.In the present embodiment, dsp processor 221 uses 32
DSP, D/A conversion module 225 uses and double 16 DAC, controls in dsp processor 221 and adjustable reference clock module 226
Under, by waveform synthetic circuit output digit signals, the high-precision with certain amplitude of continuous low distortion is obtained after D/A is converted
Analog DC signal.
At work, host computer 1 is first passed through in advance and sets each harmonic content and harmonic phase value, and host computer 1 is by setting value
Serial No. is sent to the microprocessor 211 of host and slave, and data information is sent to dsp processor by microprocessor 211
221, after the processing of dsp processor 221, ripple Wave data is exported to wave memorizer 224 and is stored, frequency control is simultaneously emitted by
Word K processed, K are binary-coded phase increment value, the input as phase accumulator.Phase accumulator is by N adders
222, N-bit register 223 cascades, it realizes the input terminal of output feedback to the N adders 222 of N-bit register 223
Cumulative function.In each clock pulses fc, phase accumulator accumulates once frequency word K, the output phase of phase accumulator
Should increase the phase increment of a step-length, the output data of phase accumulator be substantially using K as the linear increment sequence of step-length,
It reflects the phase information of composite signal.The output of phase accumulator is connected with the address wire of wave memorizer 224, at DSP
Reason device 221 tables look-up to wave memorizer 224, the signal sampling value (binary coding being stored in wave memorizer 224
Value) it finds.Under the action of system clock pulse, phase accumulator ceaselessly adds up, i.e., does not stop to table look-up.Wave memorizer 224
Output data be sent to D/A converter 225, the wave-shape amplitude value of digital quantity form is converted into certain frequency by D/A converter 225
Analog signal, waveform is recombined out.
The present embodiment has precision height based on the D.C. high-current standard source output device of parallel connection confluence, exports big, weight
Gently, feature easy to carry, and can satisfy the calibrating requirement to DC ammeter, meet State Grid Corporation of China's company standard
Q/GDW1826-201 " direct-current electric energy meter calibrating device technical specification " and 842 " direct current energy meter of national metrological verification regulations JJG
Vertification regulation " requirement.The major function of D.C. high-current standard source output device of the present embodiment based on parallel connection confluence has: 1,
It provides and traces to the source for 0.1 grade and its metering of the above DC current.2, high-precision DC current is exported, precision is better than 0.05%.3,
It can be used as individual standard dc source to use, can individually export the DC current of 0~600A.4, the calibration for direct current table, mould
Quasi- DC charging process.5, electric automobile charging pile constant-current charge is simulated.D.C. high-current of the present embodiment based on parallel connection confluence
The important technological parameters of standard source output device are as follows: current range: 0.2A, 1A, 5A, 10A, 30A, 60A, 120A, 300A,
600A；Range of current output: 0~600A；Precision: 0.05RD%；Stability: 0.01%；Port voltage: maximum 3V；Load is adjusted
Whole rate: 0.01%；Operating voltage: AC 220V ± 5%, 50Hz ± 5%；Operating temperature: -10 DEG C~55 DEG C；Relative temperature :≤
85%；Machine volume: 830mm × 630mm × 600mm；The type of cooling: air blast cooling；Liquid crystal display: 800 × 600.
It can be with power supply, rectification in use, the present invention is based on the D.C. high-current standard source output devices of parallel connection confluence
Module, power amplifier, control module, DC current output integrate, and meet the needs of laboratory verification and on-site proving.
For example, realizing direct current energy meter error testing using pulse frequency multiplication mode.Intrusion Detection based on host and slave output electric current are simultaneously
Join the technology export DC current of confluence, the DC voltage that host output is set to tested direct current energy meter.Pass through current sense
The present invention is based on the output electricity of the D.C. high-current standard source output device of parallel connection confluence for device and the measurement of precision resistance potential-divider network
Measured value through high-speed data acquisition chip and analog-to-digital conversion module is converted to discrete digital signal, and be sent to by stream and voltage
DSP power generation module operation obtains host output power, and above procedure, which is equivalent to, constitutes a high-precision standard electric energy
Table.Meanwhile the Pulse sampling device 215 of host configuration acquires the tested active infrared pulse of direct current energy meter, due to flowing through host
Standard scale electric current only has flow into tested meter electric current 1/2, and the active power that Framework computing is obtained is multiplied by 2, with tested electric energy
Apparent power is compared, and obtains tested direct current energy Watch Error；Scaling down processing is carried out to acquisition pulse, realizes direct current energy performance
Field virtual load error testing.
For example, realizing direct current energy meter error testing using pulse frequency multiplication mode.As shown in fig. 6, realizing direct current energy
When Watch Error is tested, in upper different from of dividing the work between host and slave, and the DC output unit 2 on host uses one
The equipment that control unit 21 shares two sets of rear ends, the equipment of a set of rear end is using the classical knot of DC output unit 2 shown in Fig. 4
Structure, including ripple output module 22, error amplifier 23, current amplification standard source 24 and direct current transducer 25；Another set of rear end
Equipment include that ripple output module 22, error amplifier 23, voltage power amplifier standard source and voltage sensor, voltage sensor are adopted
The voltage of collecting voltage power amplifier standard source output terminal is simultaneously inputted as the closed loop of error amplifier 23；Slave then uses shown in Fig. 4
2 classical architecture of DC output unit.The electricity that the voltage of voltage power amplifier standard source output, the current amplification standard source 24 of host export
Stream, the electric current three that the current amplification standard source 24 of slave exports together respectively export voltage or electric current to tested direct current energy
Table, and the electric current and power production module that the voltage of voltage power amplifier standard source output, the current amplification standard source 24 of host export
Input terminal be connected, the output end of power production module is connected with an input terminal of application condition module, application condition module
Another input terminal then pass through Pulse sampling device and be connected with tested direct current energy meter.Referring to Fig. 6, at work, microprocessor
211 issue the dsp processor 221 of output magnitude signal to ripple output module 22, determine the size of output magnitude digital quantity, by
The signal source of the circuits such as dsp processor 221 and D/A converter 225 composition exports the analog quantity U of a fractional value0It is put to error
Big device 23 exports DC voltage through voltage power amplifier standard source, while voltage sensor measures defeated as DC voltage measurement module
Voltage and scaled to U outx, by UxError amplifier 23 is fed back to, with analog quantity U0Pass through subtraction (Ux-U0) after
It is exported to voltage difference △ U, voltage difference △ U as voltage compensation part to voltage power amplifier standard source, the output of voltage measurement module
Amount is with voltage power amplifier standard source output quantity at fixed proportion.The dsp processor 221 of host is storage in wave memorizer 224
Electric current, voltage data markers stamped by clock module, obtain the voltage u (j) of voltage power amplifier standard source output, the electricity of host
The electric current i (j) that power amplifier standard source 24 exports is flowed, the current amplification standard of voltage u (j), host that voltage power amplifier standard source exports
The electric current i (j) that source 24 exports is sent to power generation module, and power generation module corresponds voltage u (j), electric current i (j)
It is multiplied, obtains discrete power data sequence P0, since host output electric current is the half of input direct-current electric energy table electric current,
By formula (1) it is found that the power that host operation obtains is the 1/2 of tested direct current energy apparent power.Therefore main engine power generation module
By P0Multiplied by 2 times, become 2P0After export.
In formula (1), W indicates that power, u (j) indicate voltage, the i for the voltage power amplifier standard source output that jth time sampling obtains
(j) indicate that the electric current that the current amplification standard source 24 for the host that jth time sampling obtains exports, N indicate the quantity of sampled data, Δ
T indicates the sampling interval.The relatively more tested direct current energy meter power P x and 2 times of main engine power 2P of application condition module0, application condition mould
Block and it is indirect power is compared, but compare within the unit time, the two measures the size of electricity.The micro process of host
The external Pulse sampling device 215 of device 211 acquires the active pulse of tested electric energy meter, in two pulse spacing T times of acquisition, quilt
It surveys direct current energy meter to have good luck as shown in formula (2), standard direct current energy meter is had good luck as shown in formula (3)；
In formula (2) and formula (3), WxIndicate that tested direct current energy meter is had good luck, W0Expression standard direct current energy meter is had good luck, Px generation
Table is tested direct current energy apparent power, and P0 represents main engine power, and Δ t1 indicates host voltage, current sample time interval, Δ t2 table
Show that tested direct current energy meter voltage, current sample time interval, T are two pulse spacings.Application condition module is counted according to formula (4)
Calculation obtains tested direct current energy Watch Error, and more accurately tested direct current can be calculated in the mode for acquiring the tested multiple pulses of table
It can Watch Error.
η=(Wx-W0)/W0× 100% (4)
In formula (4), WxIndicate that tested direct current energy meter is had good luck, W0Expression standard direct current energy meter is had good luck, and η indicates tested straight
Flow electric energy meter error.
The above is only a preferred embodiment of the present invention, protection scope of the present invention is not limited merely to above-mentioned implementation
Example, all technical solutions belonged under thinking of the present invention all belong to the scope of protection of the present invention.It should be pointed out that for the art
Those of ordinary skill for, several improvements and modifications without departing from the principles of the present invention, these improvements and modifications
It should be regarded as protection scope of the present invention.
Claims (9)
1. a kind of D.C. high-current standard source output method based on parallel connection confluence, it is characterised in that implementation steps include:
1) in advance that the output end of each DC output unit for being used to export DC current is in parallel, by host computer to each straight
It flows output unit and issues synchronous trigger pulse, to judge whether signal output synchronizes between each DC output unit, if respectively
Signal output is asynchronous between a DC output unit, jumps and executes step 1)；Otherwise, it jumps and executes step 2)；
2) electric current output order is issued to each DC output unit by host computer；
3) each DC output unit parsing electric current output order obtains each harmonic content and harmonic phase of electric current to be generated
Value generates the analog current signal I of assigned frequency according to each harmonic content and harmonic phase value0；Each direct current output
Current output DC current is sampled and reduces specified multiple by unit obtains sample rate current Ix, by sample rate current IxWith simulation electricity
Flow signal I0It makes the difference to obtain current compensation part △ I, by current compensation part △ I input current power amplifier standard source, passes through electric current
Power amplifier standard source obtains the output DC current of each DC output unit；
4) the output DC current parallel connection of each DC output unit is converged and is exported.
2. the D.C. high-current standard source output method according to claim 1 based on parallel connection confluence, which is characterized in that step
1) detailed step includes:
1.1) synchronous trigger pulse is issued to each DC output unit by host computer, each DC output unit exports electric current
While, starting counter counts；
1.2) after specified time, while each DC output unit stops output electric current, by host computer to each straight
Stream output unit issues synchronous trigger pulse again, and the counter of each DC output unit is respectively in the case where lock-out pulse triggers
Stop timing；
1.3) DC output unit is specified, as slave, host, slave to be counted as host, remaining DC output unit
Numerical value subtracts each other, if subtracting each other result is all larger than preset threshold, determines that signal output is asynchronous between each DC output unit,
It jumps and executes step 1)；Otherwise determine that signal output synchronizes between each DC output unit, jumps and executes step 2).
3. the D.C. high-current standard source output method according to claim 1 based on parallel connection confluence, which is characterized in that step
3) analog current signal I is generated according to each harmonic content and harmonic phase value in0Detailed step include:
S1 each harmonic content and harmonic phase value) are generated into ripple Wave data；Meanwhile frequency control word K is issued as phase
The input of bit accumulator, the phase accumulator are made of N adders and N-bit register cascade, and the frequency control word K is
Binary-coded phase increment value；
S2) input terminal of output feedback to the N adders of N-bit register is realized cumulative function by phase accumulator, every
One clock pulses fc, N adders accumulate once frequency control word K, and increase accordingly one by N-bit register output
The phase increment of step-length, so that the output of phase accumulator is using K as the linear increment sequence of step-length, by described using K as step-length
Linear increment sequence be stored in wave memorizer；
S3 ripple signal) is obtained to the wave memorizer sampling that table look-up according to ripple Wave data, and by ripple signal
The analog current signal I that D/A is converted to assigned frequency is carried out by D/A conversion module0。
4. the D.C. high-current standard source output method according to claim 3 based on parallel connection confluence, which is characterized in that step
When ripple signal S3) being carried out D/A conversion, in particular to the synchronization trigger pulse issued from host computer is received, often receives one
A synchronous trigger pulse, which then causes trigger pulse, to interrupt, at the same the source of synchronising signal by being set as PPS output mode to
The control unit of each DC output unit exports synchronization signal, and the control unit of each DC output unit uses genlock
Mechanism captures the zero-acrross ing moment of output waveform, when the zero-acrross ing moment for capturing D/A conversion module output waveform then causes a DAC
Zero passage is interrupted, and then obtains the time difference between adjacent trigger pulse interrupts, DAC zero passage is interrupted, and the time difference is inputted
DDS digital frequency synthesizer obtains DAC frequency control signal, by the control of DAC frequency control signal input D/A conversion module
The ripple signal of input is carried out D/A conversion, obtains the analog current signal I of assigned frequency by end processed, control D/A conversion module0。
5. a kind of D.C. high-current standard source output device based on parallel connection confluence, it is characterised in that: including host computer (1) and two
A above DC output unit (2), the DC output unit (2) include control unit (21), ripple output module (22),
Error amplifier (23), current amplification standard source (24) and direct current transducer (25), described control unit (21) respectively with it is upper
Machine (1) is connected, and the output end of described control unit (21) is connected with ripple output module (22), the error amplifier (23)
All the way input terminal be connected with the output end of ripple output module (22), the output end of another way input terminal and direct current transducer (25)
It is connected, the output end of the error amplifier (23) is connected with current amplification standard source (24), the direct current transducer (25)
Input terminal is connected with the output end of current amplification standard source (24), and the current amplification standard source of all DC output units (2)
(24) D.C. high-current standard source output terminal is used as after output end is in parallel；The host computer (1) is to each DC output unit
(2) synchronous trigger pulse is issued, to judge whether signal output synchronizes between each DC output unit (2), if each straight
It is synchronous then to each DC output unit (2) sending electric current output order to flow signal output between output unit；Each direct current is defeated
Unit (2) parsing electric current output order obtains each harmonic content and harmonic phase value of electric current to be generated out, according to described each
Subharmonic content and harmonic phase value generate the analog current signal I of assigned frequency0；Each DC output unit will be current defeated
DC current, which samples and reduces specified multiple, out obtains sample rate current Ix, by sample rate current IxWith analog current signal I0It makes the difference
Current compensation part △ I input current power amplifier standard source is obtained by current amplification standard source to current compensation part △ I
The output DC current of each DC output unit；The output DC current parallel connection of each DC output unit (2), which is converged, to be exported.
6. the D.C. high-current standard source output device according to claim 5 based on parallel connection confluence, it is characterised in that: institute
Stating control unit (21) includes microprocessor (211) and communication interface (212), and the microprocessor (211) passes through communication interface
(212) it is connected with host computer, the ripple output module (22) is connected with the output end of microprocessor (211).
7. the D.C. high-current standard source output device according to claim 5 based on parallel connection confluence, it is characterised in that: institute
Stating control unit (21) further includes display (213) and Keysheet module (214), the display (213), Keysheet module (214)
It is connected respectively with microprocessor (211).
8. the D.C. high-current standard source output device according to claim 5 based on parallel connection confluence, it is characterised in that: institute
Stating control unit (21) further includes Pulse sampling device (215), the output end and microprocessor of the Pulse sampling device (215)
(211) it is connected.
9. the D.C. high-current standard source output device according to claim 5 based on parallel connection confluence, it is characterised in that: institute
Stating ripple output module (22) includes dsp processor (221), N adders (222), N-bit register (223), wave memorizer
(224), D/A conversion module (225) and reference clock module (226), the dsp processor (221) and microprocessor (211) phase
Even, both the N adder (222), N-bit register (223) concatenation form phase accumulator, the dsp processor (221)
Output end be connected with the input terminal of phase accumulator, the output of the N-bit register (223) and wave memorizer (224)
Address wire is connected, and ripple Wave data output end, the output end of reference clock module (226) of the dsp processor (221) are total
Be connected with wave memorizer (224), the input terminal of the D/A conversion module (225) respectively with wave memorizer (224), ginseng
It examines clock module (226) to be connected, the dsp processor (221) tables look-up to wave memorizer (224), being stored in waveform
The signal sampling value of binary coded value form is found to obtain ripple signal in memory (224), and ripple signal is passed through D/A
Conversion module (225) carries out the analog current signal that D/A is converted to assigned frequency, the output of the D/A conversion module (225)
End is connected with error amplifier (23).
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| CN108646207B (en) * | 2018-05-31 | 2020-02-18 | 国网电力科学研究院武汉南瑞有限责任公司 | Current step standard source testing device and method for direct current measuring device |
| CN109905146B (en) * | 2019-03-06 | 2020-10-23 | 成都国星通信有限公司 | Storage spread spectrum code stream synchronization system based on burst reading |
| CN111413561A (en) * | 2020-03-24 | 2020-07-14 | 哈尔滨工业大学 | Power supply ripple simulation system with state monitoring function |
| CN111665460B (en) * | 2020-05-29 | 2021-07-06 | 南方电网数字电网研究院有限公司 | Sensor direct-current component compensation method and device and sensor device |
| CN112290795B (en) * | 2020-09-28 | 2022-05-10 | 广东电网有限责任公司佛山供电局 | Device and method for optimizing power consumption of linear current power amplifier |
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