CN106415834A - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN106415834A
CN106415834A CN201580026966.5A CN201580026966A CN106415834A CN 106415834 A CN106415834 A CN 106415834A CN 201580026966 A CN201580026966 A CN 201580026966A CN 106415834 A CN106415834 A CN 106415834A
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main terminal
semiconductor chip
ledge
extension
semiconductor
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CN106415834B (zh
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征矢野伸
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Abstract

本发明的半导体装置具备:多个主端子(41、42、43),所述多个主端子在基板(2)上从该基板的一端朝向该基板的另一端延伸;高电位侧的半导体芯片组U,其在主端子(41)的一侧的侧方并列地配置,并安装在基板(2)上;低电位侧的半导体芯片组L,其,在主端子(41)的另一侧并列地配置,并安装在基板(2)上。主端子(41)具有延伸突出部分(41a),该延伸突出部分(41a)在与主端子(41)的延伸方向正交的方向上且向主端子(41)的两侧方中的一侧方延伸,低电位侧的半导体芯片组L中的相邻的两个半导体芯片(53、54)相对于延伸突出部分(41a)线对称地配置。

Description

半导体装置
技术领域
本发明涉及半导体装置,特别是涉及安装有功率半导体元件的半导体装置。
背景技术
作为半导体装置,已知有将一个或者两个以上的功率半导体元件(半导体芯片)内置在外壳内,并且外壳内由密封材料密封的功率半导体模块。在用于逆变电路等的功率半导体模块中,使用例如IGBT(绝缘栅双极晶体管:Insulated Gate Bipolar Transistor)、MOSFET(Metal Oxide Semiconductor Field Effect Transistor)等开关元件以及FWD(Free Wheeling Diode)等无源元件作为半导体元件。
以往的功率半导体模块的一个例子如图11所示。
功率半导体元件作为由硅或者炭化硅(SiC)构成的半导体芯片105,安装在绝缘基板106的电路板106c上,通过焊料等接合。绝缘基板106的电路板106c形成构成电气电路的布线的图案。然后,使用铝制的键合线107使形成在功率半导体模块100的半导体芯片105的上表面的电极与电路板106c电连接,另外,端子141、142、143与电路板106c通过焊接或者利用焊料接合。也有使用铜制的引线(导电板)代替键合线107进行电连接的情况。
将多个功率半导体芯片安装到绝缘基板上而构成电气电路的情况容易使绝缘电路的电路板的布线图案复杂化。另外,形成在功率半导体芯片的上表面的电极与电路板等的电连接的键合线的数量增加,因此键合作业所需时间增多,另外布线区域的面积增大,因此有可能使功率半导体模块大型化。
存在如下电力用半导体装置,该电力用半导体装置为了功率半导体模块的小型化,使外部端子的一端侧露出到外壳外侧,另一方面使另一端侧在外壳内且接合到不同于安装有功率半导体芯片的电路图案的另一电路图案,并且经由键合线与功率半导体芯片连接布线(专利文献1)。
另外,存在如下电力用半导体装置,该电力用半导体装置隔着绝缘层将利用树脂使多个主端子一体化而成的树脂块体以在外壳内将散热板分成两部分的方式设置在散热板上,功率半导体芯片通过键合线连接到该树脂块体的主端子(专利文献2)。
此外,存在如下功率半导体模块,其使多个电极导出端子利用端子保持树脂被保持,该端子保持树脂在树脂外壳内具有以从树脂外壳的一边中央部遍及到其对边中央部的方式配置的第1搭接部和从该第1搭接部的中央部向两侧延伸配置的第2搭接部,在利用第1搭接部和第2搭接部被分割成四个部分的树脂外壳内的空间中的每一个接合有半导体开关元件,第1电极导出端子与接合了半导体开关元件的布线图案引线键合,第2电极导出端子形成在半导体开关元件的表面并与电极引线键合(专利文献3)。
现有技术文献
专利文献
专利文献1:日本特开2002-299552号公报
专利文献2:日本特开2004-153243号公报
专利文献3:日本特开2013-131590号公报
发明内容
技术问题
记载在专利文献1~3的技术有利于功率半导体模块的小型化等。但是,构成更复杂的电气电路的功率半导体模块,在例如含有构成逆变器的上桥臂和下桥臂的功率半导体模块的情况下还有改进的余地。
因此本发明的目的在于提供能够改进构成复杂的电气电路的功率半导体模块内的电路布线并实现小型化等的半导体装置。
技术方案
为了实现上述目的提供以下半导体装置。
本发明的实施方式的半导体装置具备:多个主端子,多个主端子在基板上从该基板的一端朝向该基板的另一端延伸;高电位侧的半导体芯片组,其在该主端子的一侧的侧方并列地配置,并安装在该基板上;以及低电位侧的半导体芯片组,其在该主端子的另一侧的侧方并列地配置,且安装在该基板上,一个主端子具有延伸突出部分,该延伸突出部分在与该主端子的延伸方向正交的方向上且向该主端子的两侧方中的一方延伸,高电位侧的半导体芯片组和该低电位侧的半导体芯片组中的一组中的相邻的两个半导体芯片相对于该延伸突出部分线对称地配置。
发明效果
根据本发明,能够改进构成复杂的电气电路的功率半导体模块内的电路布线并实现小型化等。
附图说明
图1是本发明的实施方式1的功率半导体模块的俯视图。
图2是图1的功率半导体模块的立体图。
图3是表示图1的功率半导体模块的内部构造的立体图。
图4是图1的功率半导体模块的电气电路图。
图5是图1的功率半导体模块的基板的翘曲的示意图。
图6是以往的功率半导体模块的基板的翘曲的示意图。
图7是图1的功率半导体模块的制造方法的说明图。
图8是本发明的实施方式2的功率半导体模块的立体图。
图9是表示图8的功率半导体模块的内部构造的立体图。
图10是表示图8的功率半导体模块的内部构造的立体图。
图11是以往的功率半导体模块的俯视图。
标记说明
1、10:功率半导体模块(半导体装置)
2:基板
3:树脂外壳
41:第1主端子(一个主端子)
42:第2主端子(另一主端子)
43:第3主端子(不同主端子)
51、52、53、54:半导体芯片(半导体元件)
6:绝缘基板
6c:电路板
71、72、73、74:键合线
81、82、83、84:控制端子
具体实施方式
使用附图具体地说明本发明的功率半导体模块(半导体装置)的实施方式。
(实施方式1)
图1表示作为本发明的实施方式1的半导体装置的功率半导体模块1的俯视图,图2表示图1的功率半导体模块1的立体图。图1和图2的功率半导体模块1具备金属制的基板2。应予说明,在以下的说明中,垂直方向是指相对于基板2的正面(主面)垂直的方向,水平方向是指相对于基板2的正面(主面)平行的方向。
基板2具有四边形的平面形状。在基板2上具备树脂外壳3。树脂外壳3从俯视图看具有与基板2几乎相同的大小,具有近似长方体且中空的形状。树脂外壳3从俯视图看具有近似四边形的开口。树脂外壳3在基板2的周边通过粘合剂(未图示)被固定。
第1主端子41、第2主端子42和第3主端子43通过***成型被一体地安装到树脂外壳3。第1主端子41与构成逆变电路的一个相中的中间端子对应。第2主端子42与构成逆变电路的一个相中的P端子对应。第3主端子43与构成逆变电路的一个相中的N端子对应。
图3以立体图示出功率半导体模块1中的除去树脂外壳3的内部构造。
第1主端子41的一端侧在树脂外壳3的上表面露出,另一端侧在树脂外壳3的中空空间内设置在从树脂外壳的开口的一边向对置的另一边延伸而将树脂外壳的开口分成两部分的位置。第2主端子42和第3主端子43在与第1主端子41的一端侧露出的一侧对置的一侧的树脂外壳3的上表面,另一端侧在树脂外壳3的中空空间内设置在从树脂外壳的开口的一边向对置的另一边延伸而将树脂外壳的开口分成两部分的位置。
第1主端子41与第2主端子42以隔开间隔地位于从基板2的正面引出的相同的垂线上的方式设置。换言之,第1主端子41与第2主端子42在树脂外壳3的中空空间内以隔开间隔地沿垂直方向部分重叠的方式设置。在该第1主端子41与第2主端子42之间以及在第2主端子42与基板2之间,设有由绝缘树脂构成的绝缘板或者树脂外壳3的梁3a,使与第1主端子41引线键合变得容易。另外,在树脂外壳3设置梁3a对于抑制功率半导体模块1的翘曲是有效的。
第2主端子42与第3主端子43被设置为在树脂外壳3的中空空间内沿水平方向相邻。
在通过第1主端子41、第2主端子42和第3主端子43被分成两部分的树脂外壳3的中空空间中的一个部分,沿第1主端子41的延伸方向并列设置半导体芯片51和半导体芯片52这两个半导体芯片,在另一个部分沿第1主端子41的延伸方向并列设置半导体芯片53和半导体芯片54这两个半导体芯片。
在本实施方式中,半导体芯片51~54皆为将IGBT和FWD单芯片化了的逆导通IGBT(RC-IGBT)。并且,在第1主端子41的一个侧方并列配置的半导体芯片51和半导体芯片52电并联。半导体芯片51和半导体芯片52相当于高电位侧的半导体芯片组U。半导体芯片组U构成上桥臂,该上桥臂是构成逆变电路的一个相中的上桥臂。另外,在第1主端子41的另一个侧方并列配置的半导体芯片53和半导体芯片54电并联。半导体芯片53和半导体芯片54相当于低电位侧的半导体芯片组L。半导体芯片组L构成下桥臂,该下桥臂为构成逆变电路的一个相中的下桥臂。
也就是说,在本实施方式中,在树脂外壳3的中空空间内,以夹着第1主端子41、第2主端子42和第3主端子43的方式配置高电位侧的半导体芯片组U和低电位侧的半导体芯片组L。
构成高电位侧的半导体芯片组U的半导体芯片51和半导体芯片52在图1~图3所示的例子中分别安装到单独的绝缘基板6上。另外,构成低电位侧的半导体芯片组L的半导体芯片53和半导体芯片54在如图1~图3所示的例中分别安装到单独的绝缘基板6上。这些绝缘基板6是依次层叠金属板6a、绝缘板6b,以及在绝缘板6b上形成有布线图案的电路板6c而成的。金属板6a与基板2对置并利用焊料等的接合材料接合;绝缘板6b由绝缘材料、例如绝缘陶瓷和/或绝缘树脂构成。
第1主端子41具有延伸突出部分41a,该延伸突出部分41a朝向低电位侧的半导体芯片组L,并且沿与该第1主端子41主体的前述的延伸方向正交的方向延伸。在延伸突出部分41a与基板2之间树脂外壳3的梁部分3b被设置为T字状。
该延伸突出部分41a以位于低电位侧的半导体芯片组L的半导体芯片53和半导体芯片54之间的方式延伸,与半导体芯片53和半导体芯片54电连接。更具体地,延伸突出部分41a与安装有半导体芯片53的绝缘基板6的电路板6c和安装有半导体芯片54的绝缘基板6的电路板6c中的每一个分别通过机械式连接而进行电连接。该机械式连接由使用例如超声波接合、激光焊接等的焊接,或者使用焊料等的接合材料的接合来进行。
也就是说,半导体芯片53和半导体芯片54相对于第1主端子41的延伸突出部分41a线对称地配置。这里所谓的“线对称”意味着以隔着延伸突出部分41a的方式使半导体芯片53位于延伸突出部分41a的一侧的侧方,使半导体芯片54位于延伸突出部分41a的另一侧的侧方。并不是意味着在数学上精确地使半导体芯片53和半导体芯片54相对于延伸突出部分41a等间隔的定位。根据半导体芯片的大小、半导体芯片的安装精度等,也包括不以等间隔定位的情况。具体地可以允许例如3mm左右的间隔的不同。
第1主端子41通过键合线71与设置在高电位侧的半导体芯片组U的半导体芯片51的正面的发射极以及阳极连接。相同地,第1主电极通过键合线72与设置在半导体芯片52的正面的发射极以及阳极连接。该键合线71和键合线72朝向位于与第1主端子41的延伸突出部分41a的延伸突出方向相反的一侧的高电位侧的半导体芯片组U而延伸。键合线71和键合线72相对于使延伸突出部分41a假想地朝向高电位侧的半导体芯片组U延伸时的其延伸突出部分而线对称地配置。这里所谓的“线对称”意味着以隔着假想的延伸突出部分(的中心线)的方式使键合线71和键合线72定位。并不是意味着在数学上精确地使键合线71和键合线72相对于延伸突出部分等间隔的定位。根据半导体芯片的大小、半导体芯片的安装精度等,也包括不以等间隔定位的情况。具体地可以允许例如3mm左右的间隔的不同。
第2主端子42被设置为在垂直方向上比第1主端子41更靠近基板2。换言之,第2主端子42设置在从基板2的正面起算的高度低于第1主端子41的位置。第2主端子42具有延伸突出部分42a,该延伸突出部分42a朝向高电位侧的半导体芯片组U,并且沿与该第2主端子42主体的前述的延伸方向正交的方向延伸。这里的延伸突出部分42a以位于高电位侧的半导体芯片组U的半导体芯片51和半导体芯片52之间的方式延伸,与半导体芯片51和半导体芯片52电连接。更具体而言,延伸突出部分42a与安装有半导体芯片51的绝缘基板6的电路板6c和安装有半导体芯片52的绝缘基板6的电路板6c中的每一个通过机械式连接而进行电连接。该机械式连接由使用例如超声波接合、激光焊接等的焊接,或者使用焊料等的接合材料的接合来进行。
优选地,该延伸突出部分42a位于与第1主端子41的延伸突出部分41a在图1的俯视图中的同一直线L1上。延伸突出部分41a的中心线与延伸突出部分42a的中心线在俯视功率半导体模块1时大致一致。
半导体芯片51和半导体芯片52相对于第2主端子42的延伸突出部分42a线对称地配置。这里所谓的“线对称”意味着以隔着延伸突出部分42a的方式使半导体芯片51位于延伸突出部分42a的一侧的侧方,使半导体芯片52位于延伸突出部分42a的另一侧的侧方。并不是意味着在数学上精确地使半导体芯片51和半导体芯片52相对于延伸突出部分42a等间隔的定位。根据半导体芯片的大小、半导体芯片的安装精度等,也包括不以等间隔定位的情况。具体地可以允许例如3mm左右的间隔的不同。
与第2主端子42沿水平方向并列设置的第3主端子43与设置于低电位侧的半导体芯片组L的半导体芯片53的正面的发射极以及阳极通过键合线73连接。同样地,第3主端子43与设置于半导体芯片54的正面的发射极以及阳极通过键合线74连接。
与第3主端子43连接的键合线73和键合线74朝向低电位侧的半导体芯片组L延伸。键合线73和键合线74相对于第1主端子41的延伸突出部分41a线对称地配置。这里所谓的“线对称”意味着以隔着延伸突出部分41a的方式定位键合线73和键合线74。并不是意味着在数学上精确地使键合线73和键合线74相对于延伸突出部分41a等间隔的定位。根据半导体芯片的大小、半导体芯片的安装精度等,也含有不以等间隔定位的情况。具体地可以允许例如3mm左右的间隔的不同。
另外,图2所示,安装在树脂外壳3上的控制端子81通过键合线75与形成在半导体芯片51的正面的栅极连接。相同地,控制端子82通过键合线76与形成在半导体芯片52的正面的栅极连接。另外,控制端子83通过键合线77与形成在半导体芯片53的正面的栅极连接。进而,控制端子84通过键合线78与形成在半导体芯片54的正面的栅极连接。
收容在树脂外壳3的中空空间内的第1主端子41、第2主端子42、第3主端子43、半导体芯片51、52、53、54、绝缘基板6的电路板6c、键合线71、72、73、74、75、76、77、78通过从树脂外壳3的开口注入的密封材料例如环氧树脂、硅凝胶而绝缘。在图1~3中,为了容易理解本发明,未图示出密封材料。
图4表示图1和图2所示的功率半导体模块1的电气电路。高电位侧的半导体芯片组U的半导体芯片51和52构成上桥臂,低电位侧的半导体芯片组L的半导体芯片53和54构成下桥臂。
本实施方式的功率半导体模块1以隔着将树脂外壳3的中空空间分成两部分的第1主端子41的方式配置高电位侧的半导体芯片组U和低电位侧的半导体芯片组L。另外,构成高电位侧的半导体芯片组U的多个半导体芯片51和半导体芯片52沿着第1主端子41的延伸方向并列配置。并且,构成低电位侧的半导体芯片组L的多个半导体芯片53和半导体芯片54沿着第1主端子41的延伸方向并列配置。此外,第1主端子41的延伸突出部分41a以夹在低电位侧的半导体芯片组L的相邻的两个半导体芯片、即半导体芯片53和半导体芯片54中间的方式配置。由以上可知,树脂外壳3的中空空间内的布线的构成简单。因此,与布线复杂的以往的功率半导体模块100相比能够进行小型化,另外,能够降低布线电感。
另外,本实施方式的功率半导体模块1使半导体芯片53和半导体芯片54相对于第1主端子41的延伸突出部分41a线对称地配置,因此半导体芯片53和半导体芯片54的布线长度均等,由此半导体芯片53和半导体芯片54的开关动作的同时性提高。进而,延伸突出部分41a使键合线71和键合线72相对于假想地向高电位侧的半导体芯片组U延伸时的其延伸突出部分线对称地配置,因此半导体芯片51和半导体芯片52的布线长度均等,由此半导体芯片51和半导体芯片52的开关动作的同时性提高。
此外,本实施方式的功率半导体模块1在树脂外壳3的中空空间内使四个半导体芯片51、52、53和54相互隔开均等的距离而配置,因此各半导体芯片能够通过基板2良好地进行散热,并且各半导体芯片能够通过主端子或者键合线良好地进行散热。
还有,本实施方式的功率半导体模块1与由第1主端子41分成了两部分的树脂外壳3的内部空间对应,在高电位的半导体芯片组U与低电位侧的半导体芯片组L中可以使用单独的绝缘基板6。由此像以往的功率半导体模块100那样,与使用与树脂外壳3的开口的大小大致相同的大小的绝缘基板的情况相比,可以抑制因热应力在基板2产生翘曲,进而提高冷却效果从而提高功率半导体模块1的可靠性。另外,能够降低绝缘基板6的成本。
特别是在构成高电位侧的半导体芯片组U的半导体芯片51与半导体芯片52中使用单独的绝缘基板6,在构成低电位侧的半导体芯片组L的半导体芯片53和半导体芯片54中使用单独的绝缘基板6,特别能够抑制因热应力在基板2产生翘曲。另外,在这种情况下各绝缘基板6形成相同的布线图案,因此能够实现绝缘基板6的共用化,进而能够降低绝缘基板6的成本。
图5示意性地表示本实施方式的功率半导体模块1的基板2的翘曲W1。图5(a)为俯视图,图5(b)为主视图,图5(c)为侧视图。为了比较,图6示意性地表示以往的功率半导体模块100的基板102的翘曲W0。图6(a)是俯视图,图6(b)是主视图,图6(c)是侧视图。通过图5与图6的对比可知,由于本实施方式的功率半导体模块1的基板2在半导体芯片51、半导体芯片52、半导体芯片53、半导体芯片54中分别使用单独的绝缘基板6,因此与以往的功率半导体模块100相比能够抑制基板2的翘曲。
进而,本实施方式的功率半导体模块1以使第1主端子41与第2主端子42沿垂直方向部分重叠的方式设置,因此可以抑制布线区域的面积的增大。另外,第1主端子41与第2主端子42隔着绝缘性的树脂板等而平行地接近,由此能够降低互感。
另外,第1主端子41的延伸突出部分41a与第2主端子的延伸突出部分42a位于同一直线上,由此配置为半导体芯片53和半导体芯片54相对于第1主端子41的延伸突出部分41a线对称,另外,由于配置为半导体芯片51和半导体芯片52相对于第2主端子42的延伸突出部分42a线对称,因此能够将四个半导体芯片在树脂外壳3的中空空间内更均等地配置。
第1主端子41的延伸突出部分41a优选具有前端部41d的宽度比第1主端子41的与主体部分41b连接的基部41c的宽度窄的形状。延伸突出部分41a的前端部41d具有梳形,将梳形的部分从位于相对于基板2的主面高的位置的第1主端子41朝向绝缘基板6弯折并连接。由于具有前端部41d的宽度比基部41c的宽度窄的形状,因此容易进行弯折加工。
与第1主端子41的延伸突出部分41a相同地,第2主端子42的延伸突出部分42a优选为具有前端部42d的宽度比第2主端子42的与主体部分42b连接的基部42c的宽度窄的形状。由此,容易对延伸突出部分42a的前端部42d的梳形进行弯折加工。
第2主端子42的延伸突出部分42a设置在相对于基板2的正面高度比第1主端子41低的位置。并且,在第2主端子42的延伸突出部分42a的基部42c具有沿远离基板2的正面的方向延伸的立起部42e(参照图3)。由于在延伸突出部分42a具有立起部42e,能够从与第1主端子41的延伸突出部分41a几乎相同的高度将延伸突出部分42a的前端部42d的梳形的部分朝向绝缘基板6弯折而接合。由此,能够提高接合的可靠性。
由于第3主端子43与第2主端子42沿水平方向并列而接近地设置,因此能够降低互感。
优选地,与第3主端子43连接的键合线73和键合线74相对于第1主端子41的延伸突出部分41a线对称地配置。由此,半导体芯片53和半导体芯片54的布线长度均等,因此,提高半导体芯片53和半导体芯片54的开关动作的同时性。
在图示的本实施方式的功率半导体模块1中,半导体芯片51、52、53和54使用RC-IGBT,但也可以单独地具备IGBT芯片和FWD芯片。另外,作为开关元件不限于IGBT芯片,还可以使用公知的MOSFET芯片等。
另外,在图示的本实施方式的功率半导体模块1中,具备在高电位侧的半导体芯片组U中设有半导体芯片51和半导体芯片52这两个半导体芯片,在低电位侧的半导体芯片组L中设有半导体芯片53和半导体芯片54这两个半导体芯片的结构,但高电位侧的半导体芯片组U和低电位侧的半导体芯片组L中的半导体芯片的个数不限于两个。但是,优选地高电位侧的半导体芯片组U的半导体芯片的个数与低电位侧的半导体芯片组L的半导体芯片的个数相同。例如,在高电位侧的半导体芯片组U和低电位侧的半导体芯片组L的半导体芯片的个数分别为三个的情况下,第1主端子41的延伸突出部分41a以在低电位侧的半导体芯片组L中位于相邻的半导体芯片之间的方式在合计两处设置在第1主端子41上。另外,第2主端子42的延伸突出部分42a以在高电位侧的半导体芯片组U中位于相邻的半导体芯片之间的方式在合计两处设置在第2主端子42上。
接着对本实施方式的功率半导体模块1的制造方法的一个例子进行说明。
如图7(a)所示,将树脂外壳3与主端子41、42、43和控制端子81、82、83、84利用***成型而一体成形。
如图7(b)所示,利用焊料等将半导体芯片51、52、53和54接合到绝缘基板6,利用焊料等将该绝缘基板6接合到基板2。
将***成型而成的树脂外壳3和接合了绝缘基板6的基板2利用粘合剂进行固定。
半导体芯片51、52的发射极以及阳极与第1主端子41通过键合线71、72连接。将第1主端子41的延伸突出部分41a的前端部41d与安装有半导体芯片53、54的各绝缘基板6的电路板接合。将第2主端子42的延伸突出部分42a的前端部42d与安装有半导体芯片51、52的各绝缘基板6的电路板6c接合。半导体芯片53、54的发射极以及阳极与第3主端子43通过键合线73、74连接。
半导体芯片51的栅极与控制端子81通过键合线75连接。半导体芯片52的栅极与控制端子82通过键合线76连接。半导体芯片53的栅极与控制端子83通过键合线77连接。半导体芯片54的栅极与控制端子84通过键合线78连接。
经过以上的工序可以得到图1和图2所示的功率半导体模块1。
(实施方式2)
接下来,使用图8~图10说明本发明的功率半导体模块的实施方式2。图8是本实施方式的功率半导体模块10的立体图。图9是除去图8的树脂外壳3的功内部构造的立体图。图10是还除去图9的第1主端子的内部构造的立体图。应予说明,在图8~图10中对于与图3相同部件标注相同标号。因此,关于本实施方式的功率半导体模块,在以下的说明中省略说明使用图1~3已经重复说明的部分。
本实施方式的功率半导体模块10,使用引线来取代在图1所示的实施方式1的功率半导体模块中使用的键合线71、72来使第1主端子41与形成在半导体芯片51和半导体芯片52的正面的电极电连接。另外,使用引线来取代在图1所示的实施方式1的功率半导体模块中使用的键合线73、74来使第3主端子43与形成在半导体芯片53和半导体芯片54的正面的电极电连接。应予说明,在图8~图10中,该引线与第1主端子41或第3主端子43一体化。其结果是,引线成为第1主端子41的第2延伸突出部分41f、42f、第3主端子43的延伸突出部分43f、44f。在本实施方式中,从半导体芯片上表面的散热性和组装的容易性的观点出发,在第1主端子41的第2延伸突出部分41f和半导体芯片51之间设置铜块41g,在第2延伸突出部分42f和半导体芯片52之间设置铜块42g。第2延伸突出部分41f、42f与铜块41g、42g优选通过激光焊接接合。另外,铜块41g、42g与半导体芯片51、52优选通过焊料等的接合材料来接合。同样地,从半导体芯片上表面的散热性和组装的容易性的观点出发,在第3主端子43的延伸突出部分43f和半导体芯片53之间设置铜块43g,在延伸突出部分44f和半导体芯片54之间设置铜块44g。第2延伸突出部分43f、44f与铜块43g、44g优选通过激光焊接来接合。另外,铜块43g、44g与半导体芯片53、54优选通过焊料等的接合材料来接合。
在本实施方式的功率半导体模块10中也具有与实施方式1的功率半导体模块1相同的效果。另外,通过使用引线来替代键合线,能够降低功率半导体模块10的高度。
以上,使用各实施方式和附图说明本发明的半导体装置,但本发明的半导体装置不限于各实施方式和附图的记载,在不脱离本发明的主旨的范围内可以进行多种变形。

Claims (11)

1.一种半导体装置,其特征在于,具备:
多个主端子,所述多个主端子在基板上从该基板的一端朝向该基板的另一端延伸;
高电位侧的半导体芯片组,其在该主端子的一侧的侧方并列地配置,并安装在该基板上;以及
低电位侧的半导体芯片组,其在该主端子的另一侧的侧方并列地配置,且安装在该基板上,
一个主端子具有延伸突出部分,该延伸突出部分在与该主端子的延伸方向正交的方向上且向该主端子的两侧方中的一方延伸,高电位侧的半导体芯片组和该低电位侧的半导体芯片组中的一组中的相邻的两个半导体芯片相对于该延伸突出部分线对称地配置。
2.根据权利要求1记载的半导体装置,其特征在于,所述一个主端子的延伸突出部分与所述相邻的两个半导体芯片电连接,并且该主端子通过键合线或者引线与形成于配置在具有该延伸突出部分的一侧的相反侧的半导体芯片组的半导体芯片的正面的电极连接,该键合线或者引线配置为具有所述延伸突出部分的一侧的相反侧的延伸突出方向上线对称。
3.根据权利要求1记载的半导体装置,其特征在于,所述一个主端子的延伸突出部分具有前端部的宽度比基部的宽度窄的形状。
4.根据权利要求2记载的半导体装置,其特征在于,不同于所述一个主端子的另一主端子具有延伸突出部分,该延伸突出部分在与该另一主端子的延伸方向正交的方向上且向与所述一个主端子相反的一侧延伸,所述线对称是高电位侧的半导体芯片组和该低电位侧的半导体芯片组中的一组中的相邻的两个半导体芯片相对于该延伸突出部分的线对称。
5.根据权利要求1或4记载的半导体装置,其特征在于,所述半导体芯片组隔着电路板安装于绝缘基板,所述主端子的延伸突出部分与电路板接合,所述电路板形成于安装所述相邻的两个半导体芯片的绝缘基板的正面。
6.根据权利要求4记载的半导体装置,其特征在于,所述另一主端子的延伸突出部分具有前端部的宽度比基部的宽度窄的形状。
7.根据权利要求4记载的半导体装置,其特征在于,所述一个主端子的延伸突出部分与所述另一主端子的延伸突出部分位于同一直线上。
8.根据权利要求4记载的半导体装置,其特征在于,所述一个主端子与所述另一主端子位于从所述基板的正面引出的相同的垂线上。
9.根据权利要求8记载的半导体装置,其特征在于,在所述一个主端子与所述另一主端子之间具有绝缘板。
10.根据权利要求8记载的半导体装置,其特征在于,所述另一主端子设置在与所述一个主端子相比从所述基板的正面起算的高度更低的位置,并且在所述另一主端子的所述延伸突出部分的基部具有沿远离基板的正面的方向延伸的立起部。
11.根据权利要求4记载的半导体装置,其特征在于,还具备与所述一个主端子和所述另一主端子不同的主端子,该不同主端子通过键合线或者引线与形成于配置在所述一个主端子的具有延伸突出部分一侧的相同侧的半导体芯片组的半导体芯片的正面的电极连接。
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