CN106325159B - A kind of high speed acquisition board and acquiring and processing method based on electronic filtering techniques - Google Patents
A kind of high speed acquisition board and acquiring and processing method based on electronic filtering techniques Download PDFInfo
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Abstract
The invention discloses a kind of high speed acquisition board and acquiring and processing method based on electronic filtering techniques, the collection plate include ARM chip, client, server and the preamplifier being sequentially connected, follower, differential circuit, first stage amplifier, two-stage amplifier, sign-changing amplifier, analog-digital converter, FPGA, GPU；The FPGA and GPU is transmitted to client through ARM chip by serial ports, while client sends instruction, the treatment process of control wave to FPGA or GPU；Two-way communication is carried out by network between client and server.The present invention makes full use of GPU to support Floating-point Computation, programmability strong；Multithreading calculates, and calculating speed is fast；The advantages such as data transmission bauds is fast.To solve the problems, such as that pulse pile-up provides reliable hardware foundation, the present invention can crack the technological difficulties of pulse pile-up processing, improve pulse signal utilization rate, final lifting system detection accuracy.
Description
Technical field
The invention belongs to the fields more particularly to one such as nuclear physics scope, including core medical treatment, core geological prospecting, industrial detection
High speed acquisition board and acquiring and processing method of the kind based on electronic filtering techniques.
Background technique
Currently, common X-ray and nuclear particle collection plate do not have spectrum unscrambling function, and are only to accumulate pulse
Judgement, the pulse of accumulation is abandoned, the pulse that do not accumulate is retained if being judged as pulse pile-up.Though this way guarantees
Signal it is accurate, but reduce the utilization rate of signal, and then reduce the energy resolution of system.
Pulse pile-up (such as Fig. 2) refers to that the same detection channels detect multiple core things within a scintillation pulse duration
Part.Counting rate is higher, pulse pile-up then more serious (relation curve of actual count rate and effective counter rate, such as Fig. 3, it is seen that real
Border counting rate is higher, and pulse pile-up is more serious), pulse pile-up causes multiple impulse waveforms to be overlapped, and influences data collection system pair
The pulse of accumulation all can be given up to fall by the reading of single pulse information under normal conditions.This is because spectrum unscrambling process is related to greatly
Data transmission and operation are measured, is 80MHz/s according to arithmetic speed, resolution ratio is that 12 AD converters are calculated, and is needed at least
The data of 960Mb/s are transmitted and operation, this undoubtedly proposes high requirement to hardware, and portable particularly with small volume sets
It is standby.The processing difficulty of visible impulse accumulation essentially consists in hardware, to performance requirements such as data transmission bauds, the arithmetic speeds of system
It is higher, it implements more difficult.
The signal that pulsing is accumulated is discarded, though avoiding a large amount of operations, affects the detection essence of system entirety
Degree.With the raising of the new detector energy resolution and detection efficient, pulse pile-up is increasingly becoming lifting system detection accuracy
Major obstacle.
GPU full name is Graphics Processing Unit (graphics processor), is that one kind is dedicated to image procossing work
The microprocessor of work, and as the programmability of GPU constantly enhances, application power far beyond the scope of image procossing,
The developing direction that general-purpose computations are increasingly becoming the field is carried out using GPU.GPU mainly has three aspect advantages for general-purpose computations:
1) support Floating-point Computation, programmability strong；2) multithreading calculates, and calculating speed is fast (per second up to trillion times)；3) PCIe is supported
Parallel interface, data transmission bauds are fast (reaching as high as 8Gb/s).
Summary of the invention
For above-mentioned prior art situation, the present invention provides a kind of high speed acquisition board and acquisition based on electronic filtering techniques
Processing method.The present invention is able to solve the technological difficulties of pulse pile-up processing, improves pulse signal utilization rate, final lifting system
Detection accuracy.
In order to achieve the above object, The technical solution adopted by the invention is as follows: a kind of high speed based on electronic filtering techniques
Collection plate is put including ARM chip, client, server and the preamplifier being sequentially connected, follower, differential circuit, level-one
Big device, two-stage amplifier, sign-changing amplifier, analog-digital converter, FPGA, GPU；What the analog-digital converter was used to export front end
Analog signal is converted to digital signal through over sampling, quantization, cataloged procedure；The FPGA is for exporting the analog-digital converter
Digital signal be filtered forming and accumulation identification, by pulsing accumulation and can the data of spectrum unscrambling be transmitted to GPU, by GPU
Carry out spectrum unscrambling operation；The FPGA and GPU is transmitted to client through ARM chip by serial ports, while client is to FPGA or GPU
Send instruction, the treatment process of control wave；Two-way communication is carried out by network between client and server, being used for will
The spectrogram information file that spectrum unscrambling operation obtains is transmitted to server, destination file that server analysis is calculated is transmitted to visitor
Family end.
Further, the follower be connected with differential circuit constitute circuit include: signal acquiring board connector P1, resistance
R1-R3, resistance R5, capacitor C1 and amplifier U1；One end of signal acquiring board connector P1 is connected with one end of resistance R1, resistance R1's
The other end is connected with the electrode input end of amplifier U1, and one end of resistance R2 is connected with the negative input of amplifier U1, resistance R2's
The other end is connected after being connected with the output end of amplifier U1 with one end of resistance R3, one end phase of the other end and capacitor C1 of resistance R3
Even, the other end of capacitor C1 is connected with one end of resistance R5, the other end of signal acquiring board connector P1 and the other end of resistance R5
It is grounded；The positive and negative power input of amplifier U1 meets+5V and -5V power supply respectively.
Further, the circuit that the first stage amplifier and two-stage amplifier are constituted includes: amplifier U2, amplifier U3, capacitor
C2, capacitor C3, resistance R6-R13, channel to channel adapter U5 and channel to channel adapter U6；The common end of capacitor C1 and resistance R5 and amplifier
The electrode input end of U2 is connected, and the channel output end of channel to channel adapter U5 is connected afterwards and the cathode of amplifier U2 with one end of capacitor C2
Input terminal is connected, and the other end of capacitor C2 is connected with the gain compensation port of amplifier U2；The first passage of channel to channel adapter U5 is defeated
Inbound port is connected with one end of one end of resistance R6 and resistance R21, the second channel input port D2 of channel to channel adapter U5 with
One end of resistance R7 and one end of resistance R22 are connected, the third channel input port D3's and resistance R13 of channel to channel adapter U5
One end and one end of resistance R23 are connected, one end of the fourth lane input port D1 and resistance R8 of channel to channel adapter U5 and
One end of resistance R24 is connected, the other end of resistance R6, the other end of resistance R7, the other end of resistance R13, resistance R8 it is another
The output end of end and amplifier U2 are connected with the electrode input end mouth of amplifier U3；Resistance R21, resistance R22, resistance R23 and
The other end of resistance R24 is grounded；
The channel output end of channel to channel adapter U6 is connected after being connected with one end of capacitor C3 with the negative input of amplifier U3,
The other end of capacitor C3 is connected with the gain compensation port of amplifier U3；The first passage input port D1 and electricity of channel to channel adapter U6
One end of one end and resistance R17 for hindering R9 is connected, and the one of the second channel input port D2 and resistance R10 of channel to channel adapter U6
End and one end of resistance R18 are connected, one end of the third channel input port D3 and resistance R11 of channel to channel adapter U6 and electricity
The one end for hindering R19 is connected, one end of the fourth lane input port D1 and resistance R12 of channel to channel adapter U6 and resistance R20's
One end be connected, the other end of resistance R9, the other end of resistance R10, the other end of resistance R11, resistance R12 the other end and fortune
The output end for putting U3 passes through resistance R4 and is connected with the negative input mouth of amplifier U2.Resistance R17, resistance R18, resistance R19 with
And the other end of resistance R20 is grounded.
Further, the sign-changing amplifier includes: amplifier U4, resistance R4, resistance R14-R16, capacitor C4 and capacitor C5；
Resistance R9, resistance R10, resistance R11, resistance R12 and amplifier U3 common end be connected with one end of resistance R4, resistance R4's is another
One end of one end, one end of resistance R15 and capacitor C5 is connected with the negative input of amplifier U4, the other end of resistance R15
It is connected with the output end of amplifier U4 with the other end of capacitor C5, the electrode input end of amplifier U4, one end of resistance R16 and electricity
The one end for holding C4 is connected with+5V power supply, and the other end of resistance R16 and the other end of capacitor C4 are grounded.
A kind of acquiring and processing method of the high speed acquisition board based on electronic filtering techniques, this method comprises:
(1) signal pre-treatment
The collected sawtooth signal of collection plate receiving transducer institute is transferred to follower after preamplifier amplifies,
It is improved the driving capability of its sawtooth wave, then passes through differential circuit, sawtooth wave passes through after differential circuit, forms negative refer to
Number wave；Negative exponent wave amplifies negative exponent wave by first stage amplifier and two-stage amplifier；Negative exponent wave is put by second level
After big, using sign-changing amplifier, its negative exponent waveform is made to become positive exponent wave；
(2) analog-to-digital conversion and filtering molding
The positive exponent wave that front end exports is converted to digital signal through over sampling, quantization, cataloged procedure by analog-digital converter；
The digital signal that analog-digital converter exports is filtered forming to FPGA and accumulation identifies；
In accumulation identification, if judging, signal has occurred pulse pile-up and can enter step if spectrum unscrambling (3)；If judging signal not
Pulsing accumulation is then directly entered step (4)；If judging, signal has occurred pulse pile-up and can not be abandoned if spectrum unscrambling；
(3) spectrum unscrambling operation
By pulsing accumulation and can the data of spectrum unscrambling be transmitted to GPU, spectrum unscrambling operation, the spectrum unscrambling operation are carried out by GPU
Include the following steps:
(3.1) spectrum unscrambling calculates
The exponential damping part for several pulses that fitting is accumulated respectively, obtains fitted trend line；
(3.2) baseline restorer, amplitude are extracted, amplitude adjusts
There are mainly two types of methods for the recovery of baseline: 1. counting rate is less than 105When cps, determine that a certain number of baselines click through
Row weighted average, obtains baseline position；2. when counting rate is greater than 105When cps, due to determining that the difficulty of baseline point becomes larger, by arteries and veins
Signal deduction is rushed, remaining is baseline point, is weighted and averaged, obtains baseline position.
Amplitude is extracted: extracting the amplitude for several pulses accumulated, the amplitude of the pulse is the pole of pulse signal
Big value；
Amplitude adjustment: the first pulse fit line is the first impulse waveform after spectrum unscrambling, and the second impulse wave after spectrum unscrambling
Shape is the difference of the second pulse fit line and the first pulse fit line；Third impulse waveform after spectrum unscrambling is third pulse fit line
With the difference of the first and second pulse fit line, and so on can be represented by the formula:
In formula: U (t)iFor the amplitude of i-th of pulse after spectrum unscrambling；u(t)iFor the amplitude of i-th of pulse；ubIt (t) is baseline electricity
Pressure.
(4) when FPGA non-pulsing accumulation or when GPU pulsing is accumulated, by processed pulse information file by
Register is transmitted to client through ARM chip by serial ports, while client sends instruction, control pulse letter to FPGA or GPU
Number treatment process；Two-way communication is carried out by network between client and server, for spectrogram information file to be transmitted to
Destination file is transmitted to client by server.
Further, the filtering is configured to gaussian filtering forming, matched filtering forming or trapezoidal filtering forming.
Further, the filtering forming includes a fast channel and a slow channel.
Further, the fast channel is for obtaining pulse interval, and the time interval is for accumulating type judgement；Together
When obtain fast channel counts rate, be used for correction of the count rate；The slow channel is extracted for realizing amplitude and baseline restorer, Jin Erjin
Line amplitude adjustment.
Further, accumulation identification in, the judgement signal have occurred pulse pile-up and can the specific deterministic process of spectrum unscrambling such as
Under:
Whether pulsing is accumulated, time difference Δ ti and i-th pulse depending on i+1 subpulse and i-th pulse
Duration ti, the non-pulsing accumulation if Δ ti >=ti；Pulse pile-up has occurred if Δ ti < ti；Whether pulse pile-up
The size of Δ ti can be depended on spectrum unscrambling, the smaller spectrum unscrambling difficulty of Δ ti is bigger, and accuracy is poorer, otherwise spectrum unscrambling difficulty is smaller, quasi-
True property is higher.
Further, a certain number of baseline points are the arbitrary point numerical value between 1024-16384.
The beneficial effects of the present invention are: make full use of GPU to support Floating-point Computation, programmability strong；Multithreading calculates, meter
It is fast to calculate speed；The advantages such as data transmission bauds is fast.To solve the problems, such as that pulse pile-up provides reliable hardware foundation, energy of the present invention
The technological difficulties of pulse pile-up processing are enough cracked, pulse signal utilization rate, final lifting system detection accuracy are improved.Furthermore due to
GPU small volume, present invention can apply to various types of detectors in the fields such as core medical treatment, core geological prospecting, industrial detection
Device, use scope are wider.
Detailed description of the invention
The present invention is described further with reference to the accompanying drawings and examples.
Fig. 1 is work flow diagram of the invention；
Fig. 2 is pulse pile-up schematic diagram, in figure: 1 accumulates for dipulse；2 be three pulse pile-ups；3 be four pulse pile-ups；
Fig. 3 is the graph of relation of actual count rate and effective counter rate；
Fig. 4 is follower and the connected circuit diagram constituted of differential circuit；
Fig. 5 is the connected circuit diagram constituted of firsts and seconds amplifying circuit；
Fig. 6 is inverting amplifier circuit figure；
Fig. 7 is the overall schematic of Fig. 4,5,6；
Fig. 8 is collected sawtooth wave of popping one's head in the embodiment of the present invention；
Fig. 9 is that sawtooth wave passes through the negative exponent wave formed after differential circuit；
Figure 10 is the amplified negative exponent wave schematic diagram of level-one；
Figure 11 is the amplified negative exponent wave schematic diagram of second level；
Figure 12 is the positive exponent wave schematic diagram formed after reversely amplifying；
Figure 13 is the pulse schematic diagram of non-pulsing accumulation；
Figure 14 is pulse spectrum unscrambling schematic diagram；Δ t indicates pulse interval, t1Indicate the first pulse duration, t2It indicates
The pulse pile-up time, if Δ t < t1, then pulsing is accumulated.
Figure 15 is the pulse schematic diagram after superimposed pulses and spectrum unscrambling.
Specific embodiment
As shown in Figure 1, a kind of high speed acquisition board based on electronic filtering techniques of the present invention, including ARM chip, client,
Server and the preamplifier being sequentially connected, follower, differential circuit, first stage amplifier, two-stage amplifier, reversed amplification
Device, analog-digital converter (AD), field programmable gate array (FPGA), GPU；The analog-digital converter is used for the mould for exporting front end
Quasi- signal is converted to digital signal through over sampling, quantization, cataloged procedure；What the FPGA was used to export the analog-digital converter
Digital signal is filtered forming and accumulation identification, by pulsing accumulation and can the data of spectrum unscrambling be transmitted to GPU, by GPU into
Row spectrum unscrambling operation；The FPGA and GPU is transmitted to client through ARM chip by serial ports, while client is sent out to FPGA or GPU
Send instruction, the treatment process of control wave；Two-way communication is carried out by network between client and server, for that will solve
The spectrogram information file that spectrum operation obtains is transmitted to server, destination file that server analysis is calculated is transmitted to client
End.Constituent content information is calculated by constituent content quantitative analysis algorithm in server, forms destination file.
As shown in figure 4, for follower of the present invention be connected with differential circuit constitute circuit a kind of embodiment, it packet
It includes: signal acquiring board connector P1, resistance R1-R3, resistance R5, capacitor C1 and amplifier U1；One end of signal acquiring board connector P1 with
One end of resistance R1 is connected, and the other end of resistance R1 is connected with the electrode input end of amplifier U1, one end of resistance R2 and amplifier U1
Negative input be connected, the other end of resistance R2 be connected with the output end of amplifier U1 afterwards be connected with one end of resistance R3, resistance
The other end of R3 is connected with one end of capacitor C1, and the other end of capacitor C1 is connected with one end of resistance R5, signal acquiring board connector
The other end of P1 and the other end of resistance R5 are grounded；The positive and negative power input of amplifier U1 meets+5V and -5V power supply respectively.
As shown in figure 5, a kind of embodiment of the circuit constituted for first stage amplifier of the present invention and two-stage amplifier, it
It include: amplifier U2, amplifier U3, capacitor C2, capacitor C3, resistance R6-R13, channel to channel adapter U5 and channel to channel adapter U6；Capacitor C1
It is connected with the common end of resistance R5 with the electrode input end of amplifier U2, the channel output end of channel to channel adapter U5 and the one of capacitor C2
End is connected after being connected with the negative input of amplifier U2, and the other end of capacitor C2 is connected with the gain compensation port of amplifier U2；It is logical
The first passage input port of track selector U5 is connected with one end of one end of resistance R6 and resistance R21, channel to channel adapter U5
Second channel input port D2 be connected with one end of one end of resistance R7 and resistance R22, the third of channel to channel adapter U5 is logical
Road input port D3 is connected with one end of one end of resistance R13 and resistance R23, the fourth lane input terminal of channel to channel adapter U5
Mouth D1 is connected with one end of one end of resistance R8 and resistance R24, the other end of resistance R6, the other end of resistance R7, resistance R13
The other end, the other end of resistance R8 and the output end of amplifier U2 be connected with the electrode input end mouth of amplifier U3；Resistance
R21, resistance R22, resistance R23 and resistance R24 the other end be grounded.
The channel output end of channel to channel adapter U6 is connected after being connected with one end of capacitor C3 with the negative input of amplifier U3,
The other end of capacitor C3 is connected with the gain compensation port of amplifier U3；The first passage input port D1 and electricity of channel to channel adapter U6
One end of one end and resistance R17 for hindering R9 is connected, and the one of the second channel input port D2 and resistance R10 of channel to channel adapter U6
End and one end of resistance R18 are connected, one end of the third channel input port D3 and resistance R11 of channel to channel adapter U6 and electricity
The one end for hindering R19 is connected, one end of the fourth lane input port D1 and resistance R12 of channel to channel adapter U6 and resistance R20's
One end be connected, the other end of resistance R9, the other end of resistance R10, the other end of resistance R11, resistance R12 the other end and fortune
The output end for putting U3 passes through resistance R4 and is connected with the negative input mouth of amplifier U2.Resistance R17, resistance R18, resistance R19 with
And the other end of resistance R20 is grounded.
As shown in fig. 6, being a kind of embodiment of sign-changing amplifier of the present invention, it includes: amplifier U4, resistance R4, electricity
Hinder R14-R16, capacitor C4 and capacitor C5；Common end and the electricity of resistance R9, resistance R10, resistance R11, resistance R12 and amplifier U3
The one end for hindering R4 is connected, and one end of the other end of resistance R4, one end of resistance R15 and capacitor C5 is defeated with the cathode of amplifier U4
Enter end to be connected, the other end of resistance R15 and the other end of capacitor C5 are connected with the output end of amplifier U4, and the anode of amplifier U4 is defeated
The one end for entering end, one end of resistance R16 and capacitor C4 passes through resistance R14 and is connected with+5V power supply, the other end of resistance R16
It is grounded with the other end of capacitor C4.
Fig. 7 is follower of the present invention, differential circuit, first stage amplifier, two-stage amplifier, sign-changing amplifier are sequentially connected structure
At circuit diagram.
A kind of acquiring and processing method of the high speed acquisition board based on electronic filtering techniques, this method comprises:
(1) signal pre-treatment
The collected sawtooth signal of collection plate receiving transducer institute is transferred to follower after preamplifier amplifies,
It is improved the driving capability of its sawtooth wave, then passes through differential circuit, sawtooth wave passes through after differential circuit, forms negative refer to
Number wave；Negative exponent wave amplifies negative exponent wave by first stage amplifier and two-stage amplifier；Negative exponent wave is put by second level
After big, using sign-changing amplifier, its negative exponent waveform is made to become positive exponent wave；
(2) analog-to-digital conversion and filtering molding
The positive exponent wave that front end exports is converted to digital signal through over sampling, quantization, cataloged procedure by analog-digital converter；
The digital signal that analog-digital converter exports is filtered forming to FPGA and accumulation identifies；
The filtering forming can shape for gaussian filtering forming, matched filtering forming or trapezoidal filtering, described to be filtered into
Shape includes a fast channel and a slow channel；For obtaining pulse interval, which is used for heap in the fast channel
Product type judgement；Fast channel counts rate is obtained simultaneously, is used for correction of the count rate；The slow channel is extracted for realizing amplitude and base
Line restores, and then carries out amplitude adjustment.
Accumulation identification in, the judgement signal have occurred pulse pile-up and can the specific deterministic process of spectrum unscrambling it is as follows:
Whether pulsing is accumulated, time difference Δ ti and i-th pulse depending on i+1 subpulse and i-th pulse
Duration ti, the non-pulsing accumulation if Δ ti >=ti；Pulse pile-up has occurred if Δ ti < ti；Whether pulse pile-up
The size of Δ ti can be depended on spectrum unscrambling, the smaller spectrum unscrambling difficulty of Δ ti is bigger, and accuracy is poorer, otherwise spectrum unscrambling difficulty is smaller, quasi-
True property is higher.
In accumulation identification, if judging, signal has occurred pulse pile-up and can enter step if spectrum unscrambling (3)；If judging signal not
Pulsing accumulation is then directly entered step (4)；If judging, signal has occurred pulse pile-up and can not be abandoned if spectrum unscrambling；
(3) spectrum unscrambling operation
By pulsing accumulation and can the data of spectrum unscrambling be transmitted to GPU, spectrum unscrambling operation, the spectrum unscrambling operation are carried out by GPU
Include the following steps (by taking the spectrum unscrambling of dipulse accumulation as an example):
(3.1) the exponential damping part (as shown in Figure 2) for several pulses that fitting is accumulated respectively, it is general using double
Exponential fitting, such as formula (1), naturally it is also possible to use other various approximating methods；
U (t)=aexp (bt)-cexp (dt) (1)
In formula: a, b, c, d are fitting coefficient；U (t) is amplitude；T is the time；
(3.2) baseline restorer, amplitude are extracted, amplitude adjusts
There are mainly two types of methods for the recovery of baseline: 1. counting rate is less than 105When cps, determine that a certain number of baselines click through
Row weighted average, obtains baseline position；2. when counting rate is greater than 105When cps, due to determining that the difficulty of baseline point becomes larger, by arteries and veins
Signal deduction is rushed, remaining is baseline point, is weighted and averaged, obtains baseline position.Here a certain number of baseline points one
As be arbitrary point numerical value between 1024-16384.
Amplitude is extracted: extracting the amplitude for several pulses accumulated, the amplitude of the pulse is the pole of pulse signal
Big value；
Amplitude adjustment: since the amplitude that previous step (amplitude extraction) is extracted is not consider the amplitude of pulse pile-up, and be
Amplitude adjustment need to be carried out by eliminating influence of the pulse pile-up to amplitude, and amplitude adjustment is extracted based on previous step (amplitude extraction)
The baseline position that amplitude and upper previous step (baseline restorer) obtain.
First pulse fit line is the first impulse waveform after spectrum unscrambling, and the second impulse waveform after spectrum unscrambling is the second arteries and veins
Rush the difference of fit line and the first pulse fit line；Third impulse waveform after spectrum unscrambling is third pulse fit line and first and second
The difference of pulse fit line, can be represented by the formula:
U (t) in formulai--- the amplitude of i-th of pulse after spectrum unscrambling；
u(t)i--- the amplitude of i-th of pulse；
ub(t) --- baseline voltage.
(4) when FPGA non-pulsing accumulation or when GPU pulsing is accumulated, by processed pulse information file by
Register is transmitted to client through ARM chip by serial ports, while client sends instruction, control pulse letter to FPGA or GPU
Number treatment process；Two-way communication is carried out by network (3G, 4G, WiFi) between client and server, for believing spectrogram
Breath file is transmitted to server, destination file is transmitted to client.
Claims (10)
1. a kind of high speed acquisition board based on electronic filtering techniques, which is characterized in that including ARM chip, client, server and
Preamplifier, follower, differential circuit, first stage amplifier, two-stage amplifier, sign-changing amplifier, the modulus being sequentially connected turn
Parallel operation, FPGA, GPU；The analog signal that the analog-digital converter is used to export front end turns through over sampling, quantization, cataloged procedure
It is changed to digital signal；The FPGA is used to for the digital signal that the analog-digital converter exports to be filtered forming and accumulation is known
Not, by pulsing accumulate and can the data of spectrum unscrambling be transmitted to GPU, spectrum unscrambling operation is carried out by GPU；The FPGA and GPU pass through
Serial ports is transmitted to client through ARM chip, while client sends instruction to FPGA or GPU, and control wave processes
Journey；Two-way communication is carried out by network between client and server, the spectrogram information file for obtaining spectrum unscrambling operation passes
Transport to server, destination file that server analysis is calculated is transmitted to client.
2. the high speed acquisition board according to claim 1 based on electronic filtering techniques, which is characterized in that the follower and
The connected circuit constituted of differential circuit includes: signal acquiring board connector P1, resistance R1-R3, resistance R5, capacitor C1 and amplifier U1；
One end of signal acquiring board connector P1 is connected with one end of resistance R1, the electrode input end phase of the other end and amplifier U1 of resistance R1
Even, one end of resistance R2 is connected with the negative input of amplifier U1, after the other end of resistance R2 is connected with the output end of amplifier U1
It is connected with one end of resistance R3, the other end of resistance R3 is connected with one end of capacitor C1, and the other end of capacitor C1 is with resistance R5's
One end is connected, and the other end of signal acquiring board connector P1 and the other end of resistance R5 are grounded；The positive and negative power input of amplifier U1
End meets+5V and -5V power supply respectively.
3. the high speed acquisition board according to claim 2 based on electronic filtering techniques, which is characterized in that the level-one amplification
The circuit that device and two-stage amplifier are constituted includes: amplifier U2, amplifier U3, capacitor C2, capacitor C3, resistance R6-R13, channel selecting
Device U5 and channel to channel adapter U6；Capacitor C1 is connected with the common end of resistance R5 with the electrode input end of amplifier U2, channel to channel adapter
The channel output end of U5 is connected after being connected with one end of capacitor C2 with the negative input of amplifier U2, the other end and fortune of capacitor C2
The gain compensation port for putting U2 is connected；The first passage input port of channel to channel adapter U5 and one end of resistance R6 and resistance
One end of R21 is connected, one end of the second channel input port D2 and resistance R7 of channel to channel adapter U5 and one end of resistance R22
It is connected, the third channel input port D3 of channel to channel adapter U5 is connected with one end of one end of resistance R13 and resistance R23, leads to
The fourth lane input port D1 of track selector U5 is connected with one end of one end of resistance R8 and resistance R24, and resistance R6's is another
One end, the other end of resistance R7, the other end of resistance R13, the other end of resistance R8 and amplifier U2 output end and amplifier
The electrode input end mouth of U3 is connected；Resistance R21, resistance R22, resistance R23 and resistance R24 the other end be grounded；
The channel output end of channel to channel adapter U6 is connected after being connected with one end of capacitor C3 with the negative input of amplifier U3, capacitor
The other end of C3 is connected with the gain compensation port of amplifier U3；The first passage input port D1 and resistance R9 of channel to channel adapter U6
One end and one end of resistance R17 be connected, one end of the second channel input port D2 and resistance R10 of channel to channel adapter U6 with
And one end of resistance R18 is connected, one end of the third channel input port D3 and resistance R11 of channel to channel adapter U6 and resistance
One end of R19 is connected, and the one of one end of the fourth lane input port D1 and resistance R12 of channel to channel adapter U6 and resistance R20
End be connected, the other end of resistance R9, the other end of resistance R10, the other end of resistance R11, resistance R12 the other end and amplifier
The output end of U3 passes through resistance R4 and is connected with the negative input mouth of amplifier U2.Resistance R17, resistance R18, resistance R19 and
The other end of resistance R20 is grounded.
4. the high speed acquisition board according to claim 3 based on electronic filtering techniques, which is characterized in that the reversed amplification
Device includes: amplifier U4, resistance R4, resistance R14-R16, capacitor C4 and capacitor C5；Resistance R9, resistance R10, resistance R11, resistance
The common end of R12 and amplifier U3 are connected with one end of resistance R4, the other end of resistance R4, one end of resistance R15 and capacitor
One end of C5 is connected with the negative input of amplifier U4, the other end of the other end of resistance R15 and capacitor C5 with amplifier U4
Output end be connected, one end of the electrode input end of amplifier U4, one end of resistance R16 and capacitor C4 is connected with+5V power supply,
The other end of resistance R16 and the other end of capacitor C4 are grounded.
5. a kind of acquiring and processing method of the high speed acquisition board based on electronic filtering techniques, which is characterized in that this method comprises:
(1) signal pre-treatment
The collected sawtooth signal of collection plate receiving transducer institute is transferred to follower after preamplifier amplifies, and makes it
The driving capability of sawtooth wave is improved, and then passes through differential circuit, and sawtooth wave passes through after differential circuit, forms negative exponent
Wave；Negative exponent wave amplifies negative exponent wave by first stage amplifier and two-stage amplifier；Negative exponent wave amplifies by second level
Afterwards, using sign-changing amplifier, its negative exponent waveform is made to become positive exponent wave；
(2) analog-to-digital conversion and filtering molding
The positive exponent wave that front end exports is converted to digital signal through over sampling, quantization, cataloged procedure by analog-digital converter；FPGA will
The digital signal of analog-digital converter output is filtered forming and accumulation identification；
In accumulation identification, if judging, signal has occurred pulse pile-up and can enter step if spectrum unscrambling (3)；If judging, signal does not occur
Pulse pile-up is then directly entered step (4)；If judging, signal has occurred pulse pile-up and can not be abandoned if spectrum unscrambling；
(3) spectrum unscrambling operation
By pulsing accumulation and can the data of spectrum unscrambling be transmitted to GPU, spectrum unscrambling operation is carried out by GPU, the spectrum unscrambling operation includes
Following steps:
(3.1) spectrum unscrambling calculates
The exponential damping part for several pulses that fitting is accumulated respectively, obtains fitted trend line；
(3.2) baseline restorer, amplitude are extracted, amplitude adjusts
There are mainly two types of methods for the recovery of baseline: 1. counting rate is less than 105When cps, determine that a certain number of baseline points are weighted
It is average, obtain baseline position；2. when counting rate is greater than 105When cps, due to determining that the difficulty of baseline point becomes larger, by pulse signal
It deducts, remaining is baseline point, is weighted and averaged, obtains baseline position；
Amplitude is extracted: extracting the amplitude for several pulses accumulated, the amplitude of the pulse is the maximum of pulse signal；
Amplitude adjustment: the first pulse fit line is the first impulse waveform after spectrum unscrambling, and the second impulse waveform after spectrum unscrambling is
The difference of second pulse fit line and the first pulse fit line；Third impulse waveform after spectrum unscrambling is third pulse fit line and the
One, the difference of two pulse fit lines, and so on can be represented by the formula:
In formula: U (t)iFor the amplitude of i-th of pulse after spectrum unscrambling；u(t)iFor the amplitude of i-th of pulse；ubIt (t) is baseline voltage；
(4) when the non-pulsing accumulation of FPGA or when GPU pulsing is accumulated, by processed pulse information file by depositing
Device is transmitted to client through ARM chip by serial ports, while client sends instruction to FPGA or GPU, control wave
Treatment process；Two-way communication is carried out by network between client and server, for spectrogram information file to be transmitted to service
Destination file is transmitted to client by device.
6. the acquiring and processing method of the high speed acquisition board according to claim 5 based on electronic filtering techniques, feature exist
In the filtering is configured to gaussian filtering forming, matched filtering forming or trapezoidal filtering forming.
7. the acquiring and processing method of the high speed acquisition board according to claim 6 based on electronic filtering techniques, feature exist
In the filtering forming includes a fast channel and a slow channel.
8. the acquiring and processing method of the high speed acquisition board according to claim 7 based on electronic filtering techniques, feature exist
In the fast channel is for obtaining pulse interval, and the time interval is for accumulating type judgement；Fast channel meter is obtained simultaneously
Digit rate is used for correction of the count rate；The slow channel is extracted for realizing amplitude and baseline restorer, and then carries out amplitude adjustment.
9. the acquiring and processing method of the high speed acquisition board according to claim 8 based on electronic filtering techniques, feature exist
In, accumulation identification in, the judgement signal have occurred pulse pile-up and can the specific deterministic process of spectrum unscrambling it is as follows:
Whether pulsing is accumulated, time difference Δ ti and i-th pulse persistance depending on i+1 subpulse and i-th pulse
Time ti, the non-pulsing accumulation if Δ ti >=ti；Pulse pile-up has occurred if Δ ti < ti；Whether pulse pile-up can be with
Spectrum unscrambling depends on the size of Δ ti, and the smaller spectrum unscrambling difficulty of Δ ti is bigger, and accuracy is poorer, otherwise spectrum unscrambling difficulty is smaller, accuracy
It is higher.
10. the acquiring and processing method of the high speed acquisition board according to claim 8 based on electronic filtering techniques, feature exist
In a certain number of baseline points are the arbitrary point numerical value between 1024-16384.
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| CN107785085A (en) * | 2017-10-23 | 2018-03-09 | 中国核动力研究设计院 | A kind of impulse waveform measurement apparatus with network communications capability |
| CN110779942B (en) * | 2018-07-31 | 2022-02-11 | 丹东东方测控技术股份有限公司 | Accumulation recovery digital multi-channel pulse amplitude analyzer suitable for X fluorescence multi-element analyzer |
| CN109873622B (en) * | 2019-03-27 | 2020-09-04 | 成都理工大学 | Nuclear signal digital processing method and device and digital nuclear instrument |
| CN112764082B (en) * | 2020-12-08 | 2023-05-23 | 武汉第二船舶设计研究所(中国船舶重工集团公司第七一九研究所) | FPGA-based nuclear pulse digital forming sampling method |
| CN114236594A (en) * | 2021-12-09 | 2022-03-25 | 电子科技大学 | Nuclear pulse signal digital triangle-trapezoid two-channel forming method |
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