CN106226963A - A kind of array base palte, display floater and display device - Google Patents

A kind of array base palte, display floater and display device Download PDF

Info

Publication number
CN106226963A
CN106226963A CN201610601460.9A CN201610601460A CN106226963A CN 106226963 A CN106226963 A CN 106226963A CN 201610601460 A CN201610601460 A CN 201610601460A CN 106226963 A CN106226963 A CN 106226963A
Authority
CN
China
Prior art keywords
cabling
sub
array base
base palte
equal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201610601460.9A
Other languages
Chinese (zh)
Other versions
CN106226963B (en
Inventor
毛大龙
吴海龙
周焱
但艺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chongqing BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chongqing BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chongqing BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201610601460.9A priority Critical patent/CN106226963B/en
Publication of CN106226963A publication Critical patent/CN106226963A/en
Application granted granted Critical
Publication of CN106226963B publication Critical patent/CN106226963B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)

Abstract

nullThe invention discloses a kind of array base palte、Display floater and display device,Periphery cabling in the non-display area of array base palte include in sector arrangement at least two group the first cablings and with each first cabling one_to_one corresponding and the second cabling of the fold-line-shaped of electric connection,Compared with the structure arranged in sector overall with the periphery cabling in the non-display area of existing array base palte,The negligible amounts of each the first cabling comprised in one group of first cabling of arrangement in sector,Often organize the first cabling being positioned at zone line in the first cabling less with the resistance difference of the first cabling being positioned at two side areas,It is easy to the length by increasing the first cabling in zone line or increases the live width of the first cabling in two side areas to realize often organizing the resistance of each first cabling in the first cabling equal,And,The length of each second cabling is equal and live width is equal,The resistance of the most each second cabling is equal,Therefore,The resistance difference of periphery cabling can be compensated well for.

Description

A kind of array base palte, display floater and display device
Technical field
The present invention relates to Display Technique field, particularly relate to a kind of array base palte, display floater and display device.
Background technology
In existing display floater, organic EL display panel (Organic Light Emitting Diode, OLED) have that preparation technology is simple, low cost, luminous efficiency high and is easily formed the advantages such as flexible structure;Display panels (Liquid Crystal Display, LCD) have low in energy consumption, display quality is high, electromagnetic-radiation-free and applied range etc. Advantage.
As a example by display panels, generally comprise array base palte, opposite substrate and the liquid crystal between two substrates Layer.Array base palte, generally comprises viewing area and surrounds the non-display area of viewing area;Wherein, general in viewing area It is provided with pixel and for transmitting the holding wire of signal, such as, grid line, data wire, it is provided with in non-display area for inciting somebody to action Holding wire in viewing area is connected to the periphery cabling of drive circuit, and such as, grid line is connected to grid by periphery cabling and drives Galvanic electricity road, data wire is connected to source electrode drive circuit by periphery cabling.
In the non-display area of array base palte, as it is shown in figure 1, periphery cabling 100 is arranged in sector, it is positioned at zone line The length of the periphery cabling 100 in a is less than the length of the periphery cabling 100 being positioned at two side areas b so that be positioned at zone line The resistance of the periphery cabling 100 in a is less than being positioned at the resistance of periphery cabling 100 of two side areas b, so, can cause with in Between the holding wire that is electrically connected with of periphery cabling 100 in a of region receive time delay of signal less than and the week in two side areas b Limit cabling 100 be electrically connected with holding wire receive signal time delay, thus can cause in viewing area with zone line a pair The charging duration answering the pixel in region is more than the charging duration with the pixel in two side areas b corresponding region, and then causes showing Show in region with the display brightness of zone line a corresponding region more than the display brightness with two side areas b corresponding region, make display It is bad that panel produces various displays.
The method of existing compensation periphery trace resistances difference has two kinds: a kind of is by increasing the periphery in zone line The length of cabling increases the resistance of the periphery cabling in zone line, and another kind is to be walked by the periphery in increase two side areas The live width of line reduces the resistance of the periphery cabling in two side areas.But, along with the improving constantly of resolution of display floater, In display floater, the quantity of pixel gets more and more, and correspondingly the quantity of holding wire and periphery cabling also gets more and more, so, middle The resistance difference of the periphery cabling in region and the periphery cabling in two side areas can be increasing, it is clear that above two method Can not compensate well for the resistance difference of periphery cabling.
Summary of the invention
In view of this, a kind of array base palte, display floater and display device are embodiments provided, in order to well Compensate the resistance difference of periphery cabling.
Therefore, embodiments provide a kind of array base palte, including: viewing area and non-display area;Wherein, institute There is in stating non-display area the periphery cabling that the holding wire in described viewing area is electrically connected to driving chip;
Described periphery cabling include in sector arrangement at least two group the first cablings and with each described first cabling one a pair Second cabling of the fold-line-shaped that should and be electrically connected with;Wherein,
The resistance of each described first cabling is equal, is electrically connected with described holding wire;
The length of each described second cabling is equal and live width is equal, is electrically connected with described driving chip.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, each described first The length of cabling is equal and live width is equal.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, every described the One cabling include the first sub-cabling being electrically connected with corresponding described second cabling and with described holding wire be electrically connected with the Two sub-cablings;
Often organize in described first cabling, every described first sub-cabling be shaped as straight line, each described first sub-cabling Extended line converges to a little less, and convergent point is positioned at each described first sub-cabling near the side of described driving chip, along described The arragement direction of the first cabling, the length of described first sub-cabling is first gradually reduced and is gradually increased afterwards;
Often organize in described first cabling, be positioned at zone line described second sub-cabling be shaped as curve, be positioned at two Described second sub-cabling in side region be shaped as straight line, along the arragement direction of described first cabling, described second sub-cabling Length be first gradually increased and be gradually reduced afterwards.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, often organize described the In one cabling, along the arragement direction of described first cabling, the live width of described first cabling is first gradually reduced and is gradually increased afterwards, described The length of the first cabling is first gradually reduced and is gradually increased afterwards.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, every described the One cabling include the first sub-cabling being electrically connected with corresponding described second cabling and with described holding wire be electrically connected with the Two sub-cablings;
Often organize in described first cabling, every described first sub-cabling be shaped as straight line, each described first sub-cabling Extended line converges to a little less, and convergent point is positioned at each described first sub-cabling near the side of described driving chip, along described The arragement direction of the first cabling, the length of described first sub-cabling is first gradually reduced and is gradually increased afterwards;
Often organize in described first cabling, every described second sub-cabling be shaped as straight line, each described second sub-cabling Length is equal.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, each group described the The quantity of described first cabling comprised in one cabling is equal.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, described driving core Sheet is gate driver circuit;
Described holding wire is grid line.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, described driving core Sheet is source electrode drive circuit;
Described holding wire is data wire.
The embodiment of the present invention additionally provides a kind of display floater, including: the above-mentioned array base palte that the embodiment of the present invention provides.
The embodiment of the present invention additionally provides a kind of display device, including: the above-mentioned display floater that the embodiment of the present invention provides.
Above-mentioned array base palte, display floater and the display device that the embodiment of the present invention provides, the non-display area of array base palte Periphery cabling in territory include in sector arrangement at least two group the first cablings and with each first cabling one_to_one corresponding and electrically connecting Second cabling of the fold-line-shaped connect, with the periphery cabling entirety arrangement in sector in the non-display area of existing array base palte Structure is compared, the negligible amounts of each the first cabling comprised in one group of first cabling of arrangement in sector, often organizes the first cabling In to be positioned at the first cabling of zone line less with the difference in length of the first cabling being positioned at two side areas, often group first is walked The first cabling being positioned at zone line in line is less with the resistance difference of the first cabling being positioned at two side areas, it is easy to logical The length crossing the first cabling increased in zone line or the live width increasing the first cabling in two side areas realize often organizing the The resistance of each first cabling in one cabling is equal, and, the length of each second cabling is equal and live width is equal, and the most each second walks The resistance of line is equal, therefore, it can compensate well for the resistance difference of periphery cabling, it is to avoid owing to periphery cabling exists resistance difference Different and that cause display is bad.
Accompanying drawing explanation
Fig. 1 is the structural representation of the periphery cabling in existing array base palte;
Fig. 2-Fig. 4 is respectively the structural representation of the periphery cabling in the array base palte that the embodiment of the present invention provides.
Detailed description of the invention
Below in conjunction with the accompanying drawings, the concrete reality to array base palte, display floater and the display device that the embodiment of the present invention provides The mode of executing is described in detail.
A kind of array base palte that the embodiment of the present invention provides, including: viewing area and non-display area;Wherein, such as Fig. 2 and Shown in Fig. 3, there is in non-display area the periphery cabling 2 that the holding wire in viewing area is electrically connected to driving chip 1;
Periphery cabling 2 includes that in sector (Fig. 2 and Fig. 3 is shown respectively two group first at least two group the first cablings 21 of arrangement Cabling) and with each first cabling 21 one_to_one corresponding and the second cabling 22 of the fold-line-shaped of electric connection;Wherein,
The resistance of each first cabling 21 is equal, is electrically connected with holding wire;
The length of each second cabling 22 is equal and live width is equal, is electrically connected with driving chip 1.
The embodiment of the present invention provide above-mentioned array base palte, the periphery cabling in the non-display area of array base palte include in At least two group the first cablings of fan-shaped arrangement and with each first cabling one_to_one corresponding and the second cabling of the fold-line-shaped of electric connection, Overall with the periphery cabling in the non-display area of existing array base palte in sector compared with the structure of arrangement, each arrange in sector The negligible amounts of the first cabling comprised in one group of first cabling of cloth, often organizes and is positioned at the first of zone line in the first cabling Cabling is less with the difference in length of the first cabling being positioned at two side areas, often organizes and is positioned at the of zone line in the first cabling One cabling is less with the resistance difference of the first cabling being positioned at two side areas, it is easy to by increasing by first in zone line The length of cabling or the live width of the first cabling in two side areas of increasing realize often organizing each first cabling in the first cabling Resistance is equal, and, the length of each second cabling is equal and live width is equal, and the resistance of the most each second cabling is equal, therefore, it can Compensate well for the resistance difference of periphery cabling, it is to avoid the display caused owing to periphery cabling exists resistance difference is bad.
It should be noted that the above-mentioned array base palte that the embodiment of the present invention provides is particularly suited for high-resolution display surface Plate, this is that in display floater, the quantity of pixel is the most owing to the resolution of display floater is the highest, and correspondingly holding wire and periphery are walked The quantity of line is the most, and the difference in length of the periphery cabling in zone line and the periphery cabling in two side areas can be the biggest, in Between the resistance difference of periphery cabling in region and the periphery cabling in two side areas can be the biggest, utilize the embodiment of the present invention to provide Above-mentioned array base palte can improve the resistance difference of periphery cabling well.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, can be according to the number of periphery cabling Amount determines the group number of the first cabling of arrangement in sector of division, and such as, the quantity of periphery cabling is the most, arranging in sector of division The group number of the first cabling of cloth is the most.
In the specific implementation, the above-mentioned array base palte that the embodiment of the present invention provides can apply to display panels (Liquid Crystal Display,LCD);Or, the above-mentioned array base palte that the embodiment of the present invention provides can apply to Organic electro luminescent display floater (Organic Light Emitting Diode, OLED), does not limits at this.Below the present invention The embodiment be given all can apply to illustrate as a example by LCD by array base palte.
In the specific implementation, when the above-mentioned array base palte that the embodiment of the present invention provides is applied to LCD, driving chip is permissible For gate driver circuit;Or, driving chip can also be source electrode drive circuit, does not limits at this.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, it is raster data model at driving chip During circuit, the holding wire being positioned at viewing area is then grid line, and grid line is electrically connected to gate driver circuit by periphery cabling, Gate driver circuit can load gated sweep signal to each grid line.Specifically, gate driver circuit can be bound to array base In the non-display area of plate.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, it is source drive at driving chip During circuit, the holding wire being positioned at viewing area is then data wire, and data wire is electrically connected to source drive by periphery cabling Circuit, source electrode drive circuit can load grayscale signal to each data wire.Specifically, source electrode drive circuit can be directly arranged at In the non-display area of array base palte.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, in order to realize each first cabling Resistance is equal, specifically can arrange structure by following two and realize: can be set to equal by the length of each first cabling And live width is set to equal;Or, it is also possible in often organizing the first cabling, along the arragement direction of the first cabling, by the first cabling Live width be set to first be gradually reduced be gradually increased afterwards, be set to first be gradually reduced be gradually increased afterwards by the length of the first cabling; Do not limit at this.
The above-mentioned array base palte provided the embodiment of the present invention below by two concrete examples applies above-mentioned two respectively Plant specific implementation when arranging structure to be described in detail.
Example one: the length of each first cabling is equal and live width is equal.
As in figure 2 it is shown, every first cabling 21 includes and the first sub-cabling 211 of the second corresponding cabling 22 electric connection And with holding wire be electrically connected with the second sub-cabling 212;Often organize in the first cabling 21, being shaped as of every first sub-cabling 211 Straight line, the extended line of each first sub-cabling 211 converges to a little less, and convergent point is positioned at each first sub-cabling 211 near driving The side of chip 1, the arragement direction along the first cabling 21 (is i.e. perpendicular to the bearing of trend of the second sub-cabling 212, as shown in Figure 2 Arrow shown in direction), the length of the first sub-cabling 211 is first gradually reduced and is gradually increased afterwards;Often organize in the first cabling 21, be positioned at The second sub-cabling 212 in zone line a ' be shaped as curve, be positioned at two side areas b ' the shape of the second sub-cabling 212 For straight line, the arragement direction along the first cabling 21 (is i.e. perpendicular to the bearing of trend of the second sub-cabling 212, arrow as shown in Figure 2 Shown direction), the length of the second sub-cabling 212 is first gradually increased and is gradually reduced afterwards;Thereby may be ensured that and often organize the first cabling 21 In the length of each first cabling 21 equal.
Certainly, first it is gradually increased is gradually reduced afterwards to realize the length of the second sub-cabling, be not limited to as shown in Figure 2 The will be located in zone line a ' second sub-cabling 212 be shaped to curve, will be located in two side areas b ' in second Sub-cabling 212 is shaped to straight line, it is also possible to will be located in the in zone line second sub-cabling and is shaped to broken line, Will be located in the in two side areas second sub-cabling and be shaped to straight line, do not limit at this.
It should be noted that in the above-mentioned array base palte that the embodiment of the present invention provides, often organize in the first cabling, mesozone The each shared ratio of territory and two side areas can be configured according to actual needs, is not specifically limited at this.
It is preferred that in the above-mentioned array base palte that the embodiment of the present invention provides, can will each group of the first cabling comprise The quantity of the first cabling is set to equal, in this manner it is ensured that respectively the effect of group the first cabling compensation resistance difference is identical, thus The effect of Optimization Compensation periphery trace resistances difference further.
Example two: often organize in the first cabling, along the arragement direction of the first cabling, after the live width of the first cabling is first gradually reduced Being gradually increased, the length of the first cabling is first gradually reduced and is gradually increased afterwards.
As it is shown on figure 3, every first cabling 21 includes and the first sub-cabling 211 of the second corresponding cabling 22 electric connection And with holding wire be electrically connected with the second sub-cabling 212;Often organize in the first cabling 21, being shaped as of every first sub-cabling 211 Straight line, the extended line of each first sub-cabling 211 converges to a little less, and convergent point is positioned at each first sub-cabling 211 near driving The side of chip 1, the arragement direction along the first cabling 21 (is i.e. perpendicular to the bearing of trend of the second sub-cabling 212, as shown in Figure 3 Arrow shown in direction), the length of the first sub-cabling 211 is first gradually reduced and is gradually increased afterwards;Often organize in the first cabling 21, every Second sub-cabling 212 be shaped as straight line, the length of each second sub-cabling 212 is equal;Thereby may be ensured that and often organize the first cabling In 21, the length of the first cabling 21 is first gradually reduced and is gradually increased afterwards.
It is preferred that in the above-mentioned array base palte that the embodiment of the present invention provides, can will each group of the first cabling comprise The quantity of the first cabling is set to equal, in this manner it is ensured that respectively the effect of group the first cabling compensation resistance difference is identical, thus The effect of Optimization Compensation periphery trace resistances difference further.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, the second cabling of fold-line-shaped is not It is confined to structure as shown in Figures 2 and 3, it is also possible to for structure as shown in Figure 4, do not limit at this.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of display floater, including: the embodiment of the present invention carries The above-mentioned array base palte of confession.The enforcement of this display floater may refer to the embodiment of above-mentioned array base palte, the most superfluous in place of repetition State.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of display device, carries including the embodiment of the present invention The above-mentioned display floater of confession, this display device can be: mobile phone, panel computer, television set, display, notebook computer, number Any product with display function such as photo frame, navigator or parts.The enforcement of this display device may refer to above-mentioned display surface The embodiment of plate, repeats no more in place of repetition.
A kind of array base palte, display floater and the display device that the embodiment of the present invention provides, the non-display area of array base palte Periphery cabling in territory include in sector arrangement at least two group the first cablings and with each first cabling one_to_one corresponding and electrically connecting Second cabling of the fold-line-shaped connect, with the periphery cabling entirety arrangement in sector in the non-display area of existing array base palte Structure is compared, the negligible amounts of each the first cabling comprised in one group of first cabling of arrangement in sector, often organizes the first cabling In to be positioned at the first cabling of zone line less with the resistance difference of the first cabling being positioned at two side areas, it is easy to pass through The length increasing the first cabling in zone line or the live width increasing the first cabling in two side areas realize often organizing first The resistance of each first cabling in cabling is equal, and, the length of each second cabling is equal and live width is equal, the most each second cabling Resistance equal, therefore, it can compensate well for the resistance difference of periphery cabling.
Obviously, those skilled in the art can carry out various change and the modification essence without deviating from the present invention to the present invention God and scope.So, if these amendments of the present invention and modification belong to the scope of the claims in the present invention and equivalent technologies thereof Within, then the present invention is also intended to comprise these change and modification.

Claims (10)

1. an array base palte, including: viewing area and non-display area;Wherein, have described in described non-display area Holding wire in viewing area is electrically connected to the periphery cabling of driving chip;It is characterized in that:
Described periphery cabling include in sector arrangement at least two group the first cablings and with each described first cabling one_to_one corresponding and Second cabling of the fold-line-shaped being electrically connected with;Wherein,
The resistance of each described first cabling is equal, is electrically connected with described holding wire;
The length of each described second cabling is equal and live width is equal, is electrically connected with described driving chip.
2. array base palte as claimed in claim 1, it is characterised in that the length of each described first cabling is equal and live width phase Deng.
3. array base palte as claimed in claim 2, it is characterised in that every described first cabling includes and corresponding described the The first sub-cabling that two cablings are electrically connected with and the second sub-cabling of being electrically connected with described holding wire;
Often organize in described first cabling, every described first sub-cabling be shaped as straight line, the prolongation of each described first sub-cabling Line converges to a little less, and convergent point is positioned at each described first sub-cabling near the side of described driving chip, along described first The arragement direction of cabling, the length of described first sub-cabling is first gradually reduced and is gradually increased afterwards;
Often organize in described first cabling, be positioned at zone line described second sub-cabling be shaped as curve, be positioned at two lateral areas Described second sub-cabling in territory be shaped as straight line, along the arragement direction of described first cabling, the length of described second sub-cabling Degree is first gradually increased and is gradually reduced afterwards.
4. array base palte as claimed in claim 1, it is characterised in that often organize in described first cabling, along described first cabling Arragement direction, the live width of described first cabling is first gradually reduced and is gradually increased afterwards, and the length of described first cabling first gradually subtracts It is gradually increased after little.
5. array base palte as claimed in claim 4, it is characterised in that every described first cabling includes and corresponding described the The first sub-cabling that two cablings are electrically connected with and the second sub-cabling of being electrically connected with described holding wire;
Often organize in described first cabling, every described first sub-cabling be shaped as straight line, the prolongation of each described first sub-cabling Line converges to a little less, and convergent point is positioned at each described first sub-cabling near the side of described driving chip, along described first The arragement direction of cabling, the length of described first sub-cabling is first gradually reduced and is gradually increased afterwards;
Often organize in described first cabling, every described second sub-cabling be shaped as straight line, the length of each described second sub-cabling Equal.
6. the array base palte as described in any one of claim 1-5, it is characterised in that the institute comprised in described first cabling of each group The quantity stating the first cabling is equal.
7. the array base palte as described in any one of claim 1-5, it is characterised in that described driving chip is raster data model electricity Road;
Described holding wire is grid line.
8. the array base palte as described in any one of claim 1-5, it is characterised in that described driving chip is source drive electricity Road;
Described holding wire is data wire.
9. a display floater, it is characterised in that including: the array base palte as described in any one of claim 1-8.
10. a display device, it is characterised in that including: display floater as claimed in claim 9.
CN201610601460.9A 2016-07-27 2016-07-27 Array substrate, display panel and display device Active CN106226963B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610601460.9A CN106226963B (en) 2016-07-27 2016-07-27 Array substrate, display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610601460.9A CN106226963B (en) 2016-07-27 2016-07-27 Array substrate, display panel and display device

Publications (2)

Publication Number Publication Date
CN106226963A true CN106226963A (en) 2016-12-14
CN106226963B CN106226963B (en) 2021-04-30

Family

ID=57533867

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610601460.9A Active CN106226963B (en) 2016-07-27 2016-07-27 Array substrate, display panel and display device

Country Status (1)

Country Link
CN (1) CN106226963B (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107491217A (en) * 2017-08-30 2017-12-19 厦门天马微电子有限公司 A kind of display panel and display device
CN107490885A (en) * 2017-09-05 2017-12-19 武汉天马微电子有限公司 Display device
CN107845663A (en) * 2017-10-27 2018-03-27 武汉天马微电子有限公司 Display panel and display device
CN107887399A (en) * 2017-11-30 2018-04-06 武汉天马微电子有限公司 Array substrate, organic light-emitting display panel and organic light-emitting display device
CN109064908A (en) * 2018-10-31 2018-12-21 厦门天马微电子有限公司 Array substrate and display panel
CN109581769A (en) * 2018-12-11 2019-04-05 合肥鑫晟光电科技有限公司 Dot structure, array substrate and display panel
CN112017531A (en) * 2020-09-14 2020-12-01 武汉华星光电技术有限公司 Display panel
CN112652272A (en) * 2019-10-11 2021-04-13 合肥京东方卓印科技有限公司 Array substrate, manufacturing method thereof and display device
CN112838116A (en) * 2021-02-26 2021-05-25 厦门天马微电子有限公司 Display panel and display device
CN113421890A (en) * 2021-06-24 2021-09-21 武汉天马微电子有限公司 Array substrate, preparation method thereof, display panel and display device
CN114509901A (en) * 2022-02-08 2022-05-17 武汉华星光电技术有限公司 Display panel and mobile terminal
WO2022174612A1 (en) * 2021-02-22 2022-08-25 京东方科技集团股份有限公司 Display substrate, display apparatus, and wiring method
WO2022198793A1 (en) * 2021-03-25 2022-09-29 Tcl华星光电技术有限公司 Display panel and display device
US20230091187A1 (en) * 2021-09-18 2023-03-23 Beijing Xiaomi Mobile Software Co., Ltd. Display panel and display apparatus

Citations (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW293093B (en) * 1994-09-08 1996-12-11 Hitachi Ltd
US20010020995A1 (en) * 2000-03-02 2001-09-13 Jeom-Jae Kim Liquid crystal display device
KR20020004772A (en) * 2000-07-07 2002-01-16 구본준, 론 위라하디락사 Liquid Crystal Display Device and Method of Giving Line number thereon
US6686987B1 (en) * 1999-06-10 2004-02-03 Sharp Kabushiki Kaisha Liquid crystal display device
CN1495700A (en) * 2002-08-07 2004-05-12 ���ǵ�����ʽ���� Integrated circuit and display containing the same
US20040256966A1 (en) * 2003-06-18 2004-12-23 Su Lee Deuk Liquid crystal panel having compensation capacitors for balancing rc delay effect
CN1677201A (en) * 2004-03-29 2005-10-05 Nec液晶技术株式会社 Active matrix substrate and liquid crystal display device with the same
CN1892322A (en) * 2005-06-30 2007-01-10 三星电子株式会社 Display substrate, display device having the same, and method thereof
TW200732738A (en) * 2006-02-21 2007-09-01 Au Optronics Corp Electronic device with uniform-resistance fan-out blocks
KR20080048688A (en) * 2006-11-29 2008-06-03 엘지디스플레이 주식회사 Liquid crystal display
CN100485498C (en) * 2003-08-18 2009-05-06 株式会社日立显示器 Display device
CN101493590A (en) * 2008-04-16 2009-07-29 友达光电股份有限公司 Elctronic molde, electric connector and collocation method
CN101673016A (en) * 2009-10-23 2010-03-17 友达光电股份有限公司 Active element array substrate and display device
CN101728344A (en) * 2008-10-10 2010-06-09 华映视讯(吴江)有限公司 Signal connection circuit capable of compensating difference of transmission time delay of routing signal
CN102053434A (en) * 2009-10-27 2011-05-11 乐金显示有限公司 Array substrate for liquid crystal display device, liquid crystal display device and method of fabricating the same
CN201867562U (en) * 2010-11-15 2011-06-15 华映视讯(吴江)有限公司 Active device array substrate and liquid crystal display panel
CN203133453U (en) * 2013-03-28 2013-08-14 京东方科技集团股份有限公司 Peripheral circuit of array substrate, array substrate and display device
CN103823314A (en) * 2012-11-19 2014-05-28 乐金显示有限公司 Display device
CN203673170U (en) * 2013-11-26 2014-06-25 深圳晶华显示器材有限公司 LCD display panel with anti-static function
CN103886844A (en) * 2013-12-31 2014-06-25 深圳市华星光电技术有限公司 Display panel assembly and adjusting method thereof, and display device
CN203721714U (en) * 2014-01-24 2014-07-16 京东方科技集团股份有限公司 Fan-out structure, array substrate and display device
CN103995373A (en) * 2014-05-21 2014-08-20 南京中电熊猫液晶显示科技有限公司 Array substrate and electro-optic display device thereof
CN104062789A (en) * 2014-07-21 2014-09-24 深圳市华星光电技术有限公司 Display device
KR20150034892A (en) * 2013-09-26 2015-04-06 엘지디스플레이 주식회사 Liquid crystal display device
CN104914606A (en) * 2015-06-16 2015-09-16 深圳市华星光电技术有限公司 Touch control panel and driving method thereof
CN104977766A (en) * 2011-09-12 2015-10-14 株式会社日本显示器 Display device
CN105609070A (en) * 2016-01-04 2016-05-25 重庆京东方光电科技有限公司 Display apparatus and driving method thereof

Patent Citations (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW293093B (en) * 1994-09-08 1996-12-11 Hitachi Ltd
US6686987B1 (en) * 1999-06-10 2004-02-03 Sharp Kabushiki Kaisha Liquid crystal display device
US20010020995A1 (en) * 2000-03-02 2001-09-13 Jeom-Jae Kim Liquid crystal display device
KR20020004772A (en) * 2000-07-07 2002-01-16 구본준, 론 위라하디락사 Liquid Crystal Display Device and Method of Giving Line number thereon
CN1495700A (en) * 2002-08-07 2004-05-12 ���ǵ�����ʽ���� Integrated circuit and display containing the same
US20040256966A1 (en) * 2003-06-18 2004-12-23 Su Lee Deuk Liquid crystal panel having compensation capacitors for balancing rc delay effect
CN100485498C (en) * 2003-08-18 2009-05-06 株式会社日立显示器 Display device
CN1677201A (en) * 2004-03-29 2005-10-05 Nec液晶技术株式会社 Active matrix substrate and liquid crystal display device with the same
CN1892322A (en) * 2005-06-30 2007-01-10 三星电子株式会社 Display substrate, display device having the same, and method thereof
TW200732738A (en) * 2006-02-21 2007-09-01 Au Optronics Corp Electronic device with uniform-resistance fan-out blocks
KR20080048688A (en) * 2006-11-29 2008-06-03 엘지디스플레이 주식회사 Liquid crystal display
CN101493590A (en) * 2008-04-16 2009-07-29 友达光电股份有限公司 Elctronic molde, electric connector and collocation method
CN101728344A (en) * 2008-10-10 2010-06-09 华映视讯(吴江)有限公司 Signal connection circuit capable of compensating difference of transmission time delay of routing signal
CN101673016A (en) * 2009-10-23 2010-03-17 友达光电股份有限公司 Active element array substrate and display device
CN102053434A (en) * 2009-10-27 2011-05-11 乐金显示有限公司 Array substrate for liquid crystal display device, liquid crystal display device and method of fabricating the same
CN201867562U (en) * 2010-11-15 2011-06-15 华映视讯(吴江)有限公司 Active device array substrate and liquid crystal display panel
CN104977766A (en) * 2011-09-12 2015-10-14 株式会社日本显示器 Display device
CN103823314A (en) * 2012-11-19 2014-05-28 乐金显示有限公司 Display device
CN203133453U (en) * 2013-03-28 2013-08-14 京东方科技集团股份有限公司 Peripheral circuit of array substrate, array substrate and display device
KR20150034892A (en) * 2013-09-26 2015-04-06 엘지디스플레이 주식회사 Liquid crystal display device
CN203673170U (en) * 2013-11-26 2014-06-25 深圳晶华显示器材有限公司 LCD display panel with anti-static function
CN103886844A (en) * 2013-12-31 2014-06-25 深圳市华星光电技术有限公司 Display panel assembly and adjusting method thereof, and display device
CN203721714U (en) * 2014-01-24 2014-07-16 京东方科技集团股份有限公司 Fan-out structure, array substrate and display device
CN103995373A (en) * 2014-05-21 2014-08-20 南京中电熊猫液晶显示科技有限公司 Array substrate and electro-optic display device thereof
CN104062789A (en) * 2014-07-21 2014-09-24 深圳市华星光电技术有限公司 Display device
CN104914606A (en) * 2015-06-16 2015-09-16 深圳市华星光电技术有限公司 Touch control panel and driving method thereof
CN105609070A (en) * 2016-01-04 2016-05-25 重庆京东方光电科技有限公司 Display apparatus and driving method thereof

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107491217B (en) * 2017-08-30 2020-11-13 厦门天马微电子有限公司 Display panel and display device
CN107491217A (en) * 2017-08-30 2017-12-19 厦门天马微电子有限公司 A kind of display panel and display device
CN107490885A (en) * 2017-09-05 2017-12-19 武汉天马微电子有限公司 Display device
CN107845663A (en) * 2017-10-27 2018-03-27 武汉天马微电子有限公司 Display panel and display device
CN107887399A (en) * 2017-11-30 2018-04-06 武汉天马微电子有限公司 Array substrate, organic light-emitting display panel and organic light-emitting display device
CN107887399B (en) * 2017-11-30 2020-10-23 武汉天马微电子有限公司 Array substrate, organic light-emitting display panel and organic light-emitting display device
CN109064908B (en) * 2018-10-31 2021-04-02 厦门天马微电子有限公司 Array substrate and display panel
CN109064908A (en) * 2018-10-31 2018-12-21 厦门天马微电子有限公司 Array substrate and display panel
CN109581769A (en) * 2018-12-11 2019-04-05 合肥鑫晟光电科技有限公司 Dot structure, array substrate and display panel
CN112652272A (en) * 2019-10-11 2021-04-13 合肥京东方卓印科技有限公司 Array substrate, manufacturing method thereof and display device
CN112652272B (en) * 2019-10-11 2022-04-26 合肥京东方卓印科技有限公司 Array substrate, manufacturing method thereof and display device
US11508295B2 (en) 2019-10-11 2022-11-22 Hefei Boe Joint Technology Co., Ltd. Array substrate and manufacturing method thereof, and display device
CN112017531A (en) * 2020-09-14 2020-12-01 武汉华星光电技术有限公司 Display panel
WO2022174612A1 (en) * 2021-02-22 2022-08-25 京东方科技集团股份有限公司 Display substrate, display apparatus, and wiring method
CN112838116A (en) * 2021-02-26 2021-05-25 厦门天马微电子有限公司 Display panel and display device
CN112838116B (en) * 2021-02-26 2022-10-21 厦门天马微电子有限公司 Display panel and display device
WO2022198793A1 (en) * 2021-03-25 2022-09-29 Tcl华星光电技术有限公司 Display panel and display device
CN113421890A (en) * 2021-06-24 2021-09-21 武汉天马微电子有限公司 Array substrate, preparation method thereof, display panel and display device
US20230091187A1 (en) * 2021-09-18 2023-03-23 Beijing Xiaomi Mobile Software Co., Ltd. Display panel and display apparatus
CN114509901A (en) * 2022-02-08 2022-05-17 武汉华星光电技术有限公司 Display panel and mobile terminal

Also Published As

Publication number Publication date
CN106226963B (en) 2021-04-30

Similar Documents

Publication Publication Date Title
CN106226963A (en) A kind of array base palte, display floater and display device
CN100338523C (en) Display device and manufacturing method thereof
CN1162746C (en) Image display device
CN102243405B (en) Liquid crystal display panel and method for manufacturing the same
CN103578418B (en) Display device and the method forming display device
CN109087608A (en) Gating drive circuit and the display device for utilizing the gating drive circuit
CN104600200B (en) Array substrate and display panel
CN106094272B (en) A kind of display base plate, its production method and display device
US9552759B2 (en) Display with gate lines in a diagonal direction
CN109739040A (en) A kind of light modulation piece, backlight module, display device and its driving method
CN1319834A (en) Active matrix type LCD device
CN1847967A (en) Electrophoretic display
CN1932594A (en) Liquid crystal display and driving method thereof
CN106154666A (en) A kind of array base palte, its driving method, display panels and display device
CN1760737A (en) OCB mode transflective liquid crystal display device
US20160335975A1 (en) Array Substrate and Driving Method Thereof, Display Panel, and Display Apparatus
CN104360556A (en) Liquid crystal display panel and array substrate
CN109584833A (en) Display panel and display device
CN1794045A (en) Display device
CN104280963A (en) Array substrate, manufacturing method of array substrate, and display device
CN205080891U (en) Display device and display panel
CN105097832A (en) Array substrate and manufacturing method thereof and display device
CN102981336A (en) Array substrate, display module and preparation method for array substrate
CN202563216U (en) Color film substrate, liquid crystal panel and display equipment
CN101008758A (en) Switch element array panel and liquid crystal display

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant