CN106128957A - A kind of manufacture method of GaAs nano wire - Google Patents

A kind of manufacture method of GaAs nano wire Download PDF

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Publication number
CN106128957A
CN106128957A CN201610615915.2A CN201610615915A CN106128957A CN 106128957 A CN106128957 A CN 106128957A CN 201610615915 A CN201610615915 A CN 201610615915A CN 106128957 A CN106128957 A CN 106128957A
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China
Prior art keywords
ozone
nano wire
hydrochloric acid
minutes
gaas
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CN201610615915.2A
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Chinese (zh)
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CN106128957B (en
Inventor
王勇
王瑛
丁超
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Guangdong University of Technology
Dongguan South China Design and Innovation Institute
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Guangdong University of Technology
Dongguan South China Design and Innovation Institute
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Publication of CN106128957A publication Critical patent/CN106128957A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30612Etching of AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66469Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with one- or zero-dimensional channel, e.g. quantum wire field-effect transistors, in-plane gate transistors [IPG], single electron transistors [SET], Coulomb blockade transistors, striped channel transistors

Abstract

The invention discloses a kind of GaAs nano wire manufacture method, this manufacture method step is as follows: prepare a gallium arsenide substrate, an InGaP cushion and the material structure of a gallium arsenide channel layer;The carinate figure that 50 nanometers are wide is etched in gallium arsenide channel layer;Then in ozone resist remover, carry out the process of 20 minutes;Using concentrated hydrochloric acid to clean 1 minute, dilute hydrochloric acid cleans 2 minutes;The ozone carried out in ozone resist remover 20 minutes processes;Using concentrated hydrochloric acid to clean 1 minute, dilute hydrochloric acid cleans 2 minutes;The ozone carried out in ozone resist remover 20 minutes processes, then the method using the phosphoric acid of dilution to be carried out processes 5 10 times;Finally obtain the GaAs nano wire that 10 20 nanometers are wide.

Description

A kind of manufacture method of GaAs nano wire
Technical field
The present invention relates to semiconductor integrated circuit manufacturing technology field, be specifically related to the making side of a kind of GaAs nano wire Method, is applied to high-performance Group III-V semiconductor CMOS technology.
Background technology
For III-V compound semiconductor materials is relative to silicon materials, there is high carrier mobility, big energy gap etc. Advantage, and have excellent characteristics at aspects such as calorifics, optics and electromagnetism.In recent years, along with iii-v MOSFET element The continuous propelling of research, iii-v MOS interfacial characteristics achieves huge progress, interface state density have already decreased to 1-3 × 1011eV·cm-2;The structure of iii-v MOS device from planar device iterative method to nanowire MOS device.Up-to-date grind Study carefully report to show: silicon-based semiconductor devices device architecture after 10 nm technology node is probably FinFET or receives Nanowire device structure.But Group III-V semiconductor is due to the corrosion opposite sex in its each crystal orientation, causes the difficulty making nano wire. Accordingly, it would be desirable to a kind of new approach realizes nano thread structure in III-V group semi-conductor material, to meet high-performance iii-v The requirement of semiconductor nanowires MOS device technology.
Summary of the invention
(1) to solve the technical problem that
The main object of the present invention is to provide the manufacture method of a kind of GaAs nano wire, to realize with GaAs nanometer being The cmos device of raceway groove, improves the grid-control performance of device and good channel surface characteristic, reduces surface roughness scattering, improves The mobility characteristics of MOS device, to meet the requirement of high-performance Group III-V semiconductor CMOS technology.
(2) technical scheme
For reaching above-mentioned purpose, the invention provides the manufacture method of a kind of GaAs nano wire.Its making step is successively It is:
(1) prepare extension in a gallium arsenide substrate and have 50 nanometer thickness InGaP cushions and the gallium arsenide channel of 50 nanometer thickness The wafer of layer;
(2) in gallium arsenide channel layer, the carinate figure that 50 nanometers are wide is etched;
(3) in ozone resist remover, carry out the process of 20 minutes;
(4) using concentrated hydrochloric acid to clean 1 minute, dilute hydrochloric acid cleans 2 minutes, the InGaP layer under etching away GaAs nano wire;
(5) ozone carried out in ozone resist remover 20 minutes processes;
(6) using concentrated hydrochloric acid to clean 1 minute, dilute hydrochloric acid cleans 2 minutes;
(7) ozone carried out in ozone resist remover 20 minutes processes, then uses the method that the phosphoric acid of dilution is carried out Process 5-10 time, use this kind of method that GaAs nano wire is refined;
In such scheme, in ozone resist remover, when utilizing ozone oxidation GaAs material, resist remover to be carried out pre-opening Machine, after starting shooting 5 minutes, puts into sample, to ensure the concordance of oxidation rate.
In such scheme, the proportioning of the hydrochloric acid solution of dilution is hydrochloric acid: water=1:10.
In such scheme, the proportioning of the phosphoric acid solution of dilution is phosphoric acid: water=1:10.
In such scheme, the width of GaAs nano wire corrodes this from 50 nanometers follow according to ozone process and phosphoric acid,diluted Ring number of times, this kind of caustic solution is numeral corrosion, and the GaAs thickness of corrosion is 2 nanometers every time, corrodes 10 times, GaAs nanometer The width of line can be reduced to 10 ran.
(3) beneficial effect
From technique scheme it can be seen that the method have the advantages that a kind of GaAs that the present invention provides receives The manufacture method of nanowire structure, utilizes InGaP material as cushion and bottom sacrifice layer, uses ICP etching and hcl corrosion Method the most tentatively realize wider GaAs nano thread structure, then recycle the method oxygen of ozone oxidation Change GaAs nano wire, with the oxidized GaAs top layer of dilute hydrochloric acid solution and dilution phosphoric acid solution corrosion, use this slow Slow digital caustic solution corrosion refinement GaAs nano wire.High-performance Group III-V semiconductor CMOS technology pair is met to make GaAs nano wire is in the requirement of the aspects such as shape, width, surface roughness and diameter.
Accompanying drawing explanation
Fig. 1 is the process flow diagram of the making GaAs nano wire that the present invention provides;
Detailed description of the invention
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference Accompanying drawing, the present invention is described in more detail.
Present embodiments provide the manufacture method of a kind of GaAs nano thread structure.Its making step is successively:
(1) prepare extension in a gallium arsenide substrate and have 50 nanometer thickness In0.49Ga0.51P cushion and the GaAs of 50 nanometer thickness The wafer of channel layer, wherein the doping type of InGaP Yu GaAs is all N-type, and impurity is silicon, doping content is 4 × 1017cm-3
(2) on the wafer that ready growth has InGaP and GaAs, etch the carinate figure that 50 nanometers are wide, carve The erosion degree of depth is 100 nanometers, and the mask of employing is SiO2 mask, and lithographic method is ICP dry etching, and etching gas is Cl2/BCl3, After having etched, HF acid solution is used to erode SiO2 mask;
(3) wafer that etching completes is put into the process carried out in ozone resist remover 20 minutes, before treatment, will remove photoresist Machine is started shooting 20 minutes in advance;
(4) using concentrated hydrochloric acid to clean 1 minute, dilute hydrochloric acid cleans 2 minutes, the InGaP layer under etching away GaAs nano wire;
(5) ozone carried out in ozone resist remover 20 minutes processes, and resist remover to be started shooting 20 minutes in advance before treatment;
(6) using concentrated hydrochloric acid to clean 1 minute, dilute hydrochloric acid cleans 2 minutes, to be placed on by wafer between twice process In deionized water at least 3 minutes;
(7) ozone carried out in ozone resist remover 20 minutes processes, then uses the method that the phosphoric acid of dilution is carried out Process 5-10 time, use this kind of method that GaAs nano wire is refined.
In the present embodiment, in ozone resist remover, when utilizing ozone oxidation GaAs material, in order to ensure whole process ratio Relatively clean, it should be ensured that do not have other techniques that this technique is interrupted during whole.
In the present embodiment, the proportioning of the hydrochloric acid solution of dilution is hydrochloric acid: water=1:10.
In the present embodiment, the proportioning of the phosphoric acid solution of dilution is phosphoric acid: water=1:10.
In the present embodiment, the width of GaAs nano wire corrodes this from 50 nanometers follow according to ozone process and phosphoric acid,diluted Ring number of times, this kind of caustic solution is numeral corrosion, and the GaAs thickness of corrosion is 2 nanometers every time, corrodes 10 times, GaAs nanometer The width of line can be reduced to 10 ran.
In the present embodiment, for ensureing the yield of nano wire, all process steps does not use ultrasonic and nitrogen to dry up, and employing is got rid of Dry mode, dries wafer.
Particular embodiments described above, has been carried out the purpose of the present invention, technical scheme and beneficial effect the most in detail Describe in detail bright, be it should be understood that the specific embodiment that the foregoing is only the present invention, be not limited to the present invention, all Within the spirit and principles in the present invention, any modification, equivalent substitution and improvement etc. done, should be included in the guarantor of the present invention Within the scope of protecting.

Claims (4)

1. a GaAs nano wire manufacture method, its step is as follows:
(1) prepare extension in a gallium arsenide substrate and have the gallium arsenide channel layer of 50 nanometer thickness InGaP cushions and 50 nanometer thickness Wafer;
(2) in gallium arsenide channel layer, the carinate figure that 50 nanometers are wide is etched;
(3) in ozone resist remover, carry out the process of 20 minutes;
(4) using concentrated hydrochloric acid to clean 1 minute, dilute hydrochloric acid cleans 2 minutes, the InGaP layer under etching away GaAs nano wire;
(5) ozone carried out in ozone resist remover 20 minutes processes;
(6) using concentrated hydrochloric acid to clean 1 minute, dilute hydrochloric acid cleans 2 minutes;
(7) ozone carried out in ozone resist remover 20 minutes processes, then the method using the phosphoric acid of dilution to be carried out processes 5-10 time, use this kind of method that GaAs nano wire is refined.
A kind of GaAs nano wire manufacture method the most according to claim 1, it is characterised in that in described ozone treating process, Oxidation rate to GaAs surface is 0.1 nm/minute.
A kind of GaAs nano wire manufacture method the most according to claim 1, it is characterised in that joining of described dilute hydrochloric acid solution Ratio is hydrochloric acid: water=1:10.
A kind of GaAs nano wire manufacture method the most according to claim 1, it is characterised in that the proportioning of described phosphoric acid,diluted is Phosphoric acid: water=1:10.
CN201610615915.2A 2016-07-29 2016-07-29 A kind of production method of GaAs nano wire Active CN106128957B (en)

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CN106128957B CN106128957B (en) 2019-02-01

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001023951A (en) * 1999-07-12 2001-01-26 Nec Corp Manufacture of semiconductor device
CN102017064A (en) * 2008-03-27 2011-04-13 康宁股份有限公司 Semiconductor buried grating fabrication method
US20150344825A1 (en) * 2012-12-05 2015-12-03 Entegris, Inc. Compositions for cleaning iii-v semiconductor materials and methods of using same
WO2015190637A1 (en) * 2014-06-11 2015-12-17 한국표준과학연구원 Process for fabricating vertically-assigned gallium arsenide semiconductor nanowire array of large area

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001023951A (en) * 1999-07-12 2001-01-26 Nec Corp Manufacture of semiconductor device
CN102017064A (en) * 2008-03-27 2011-04-13 康宁股份有限公司 Semiconductor buried grating fabrication method
US20150344825A1 (en) * 2012-12-05 2015-12-03 Entegris, Inc. Compositions for cleaning iii-v semiconductor materials and methods of using same
WO2015190637A1 (en) * 2014-06-11 2015-12-17 한국표준과학연구원 Process for fabricating vertically-assigned gallium arsenide semiconductor nanowire array of large area

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Application publication date: 20161116

Assignee: Dongguan chain core semiconductor technology Co.,Ltd.

Assignor: DONGGUAN SOUTH CHINA DESIGN INNOVATION INSTITUTE

Contract record no.: X2022980013285

Denomination of invention: A kind of fabrication method of GaAs nanowire

Granted publication date: 20190201

License type: Common License

Record date: 20220824