CN105655353A - Tft阵列基板结构及其制作方法 - Google Patents

Tft阵列基板结构及其制作方法 Download PDF

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CN105655353A
CN105655353A CN201610040034.2A CN201610040034A CN105655353A CN 105655353 A CN105655353 A CN 105655353A CN 201610040034 A CN201610040034 A CN 201610040034A CN 105655353 A CN105655353 A CN 105655353A
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silicon nitride
tft
nitride layer
array substrate
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陈辰
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to CN201610040034.2A priority Critical patent/CN105655353A/zh
Publication of CN105655353A publication Critical patent/CN105655353A/zh
Priority to PCT/CN2016/086129 priority patent/WO2017124686A1/zh
Priority to US15/115,912 priority patent/US20180069033A1/en
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Abstract

本发明提供的一种TFT阵列基板结构及其制作方法，采用下氮化硅层(31)、氧化硅层(32)、和上氮化硅层(33)三层结构的层间介电层(3)，下氮化硅层(31)含氢为氢化工艺提供氢离子，上氮化硅层(33)提升层间介电层(3)对杂质离子的隔绝防护能力，相比于现有技术中仅包括一氧化硅层与一氮化硅层的双层结构的中间介电层，能够在不影响氢化效果的前提下，提升层间介电层对杂质离子的隔绝防护能力，避免杂质离子污染的风险，缩短氢化时间，提升产能。

Description

TFT阵列基板结构及其制作方法
技术领域
本发明涉及显示技术领域，尤其涉及一种TFT阵列基板结构及其制作方法。
背景技术
液晶显示器(LiquidCrystalDisplay，LCD)具有机身薄、省电、无辐射等众多优点，得到了广泛的应用。如：液晶电视、移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本电脑屏幕等，在平板显示领域中占主导地位。
现有市场上的液晶显示器大部分为背光型液晶显示器，其包括液晶显示面板及背光模组(backlightmodule)。液晶显示面板的工作原理是在薄膜晶体管阵列基板(ThinFilmTransistorArraySubstrate，TFTArraySubstrate)与彩色滤光片基板(ColorFilter，CF)之间灌入液晶分子，并在两片基板上施加驱动电压来控制液晶分子的旋转方向，以将背光模组的光线折射出来产生画面。
TFT阵列基板是对液晶层进行驱动的电路基板，包括多条栅极线和数据线，相互垂直的多条栅极线和多条数据线形成了多个像素单元，且每个像素单元内均设置有薄膜晶体管、像素电极及存储电容等。薄膜晶体管包括一栅电极连接至栅极线，源电极连接至数据线，漏电极连接至像素电极。当栅极线被驱动时，薄膜晶体管处于导通状态，对应的数据线送入灰阶电压信号并将其加载至像素电极，从而使得像素电极产生相应的电场，液晶层中的液晶分子则在电场的作用下发生取向变化，因此可以实现不同的图像显示。
在TFT阵列基板中薄膜晶体管的栅电极与栅极线位于同一层，共同构成第一金属层，薄膜晶体管的源电极、漏电极、和数据线位于同一层，共同构成第二金属层，在第一金属层和第二金属层之间需要设置层间介电(InterlayerDielectric，ILD)层作为隔离第一金属层与第二金属层的绝缘层。现有的ILD层一般由一氧化硅(SiOx)层和一氮化硅(SiNx)层组成，其中，氧化硅层拥有良好的保温性及膜内应力，氮化硅层拥有高氢含量及良好的杂质离子隔绝作用，因此在各大厂商的产品中ILD层的成膜顺序上氧化硅层在先或者氮化硅层在先都有所应用。进一步地，考虑到氮化硅层拥有高氢含量，在高温中可以产生大量的H+，可以被用作氢化工艺的氢离子来源，及其对产能的影响，如图1所示，各大厂商更青睐先在基板10上成膜一氮化硅层20(含氢)、然后在氮化硅层上成膜一氧化硅层30的这种成膜顺序。氧化硅层30置于氮化硅层20之上的结构虽然可以保证氢化工艺的生产效率和产能，但由于氧化硅层30对杂质离子隔绝效果较差，使用这种结构就需要承担杂质离子污染的风险。
发明内容
本发明的目的在于提供一种TFT阵列基板结构，能够在不影响氢化效果的前提下，提升层间介电层对杂质离子的隔绝防护能力，避免杂质离子污染的风险，缩短氢化时间，提升产能。
本发明的目的还在于提供一种TFT阵列基板的制作方法，能够提升层间介电层对杂质离子的隔绝防护能力，避免杂质离子污染的风险，缩短氢化时间，提升产能。
为实现上述目的，本发明提供了一种TFT阵列基板结构，包括：基板、设于所述基板上的第一金属层、覆盖所述第一金属层的层间介电层、及设于所述层间介电层上第二金属层；
所述层间介电层包括设于所述第一金属层上的下氮化硅层、设于所述下氮化硅层上的氧化硅层、及设于所述氧化硅层上的上氮化硅层；
所述下氮化硅层含氢。
所述TFT阵列基板结构还包括：设于所述第一金属层下方的第一绝缘层、设于所述第一绝缘层下方的半导体层、设于所述半导体层下方的缓冲层、以及设于所述缓冲层下方的遮光层。
以及设于所述第二金属层上的平坦层、设于所述平坦层上的底层电极、设于所述底层电极上的保护层、以及设于所述保护层上的顶层电极。
所述第一金属层包括：TFT的栅极、及与所述TFT的栅极连接的栅极线。
所述第二金属层包括：TFT的源极、TFT的漏极、及与所述TFT的源极连接的数据线。
本发明还提供一种TFT阵列基板的制作方法，包括如下步骤：
步骤1、提供一基板，在所述基板上沉积并图案化第一金属层；
步骤2、在所述第一金属层上成膜下氮化硅层，所述下氮化硅层含氢；
步骤3、在所述下氮化硅层上成膜氧化硅层；
步骤4、在所述氧化硅层上成膜上氮化硅层，所述下氮化硅层、氧化硅层、及上氮化硅层共同构成层间介电层；
步骤5、在所述层间介电层上制作第二金属层。
所述步骤2采用化学气相沉积工艺成膜下氮化硅层，所述步骤3采用化学气相沉积工艺成膜氧化硅层，所述步骤4采用化学气相沉积工艺成膜上氮化硅层。
所述步骤1之前还包括：在所述基板上自下而上依次制作遮光层、缓冲层、半导体层、和第一绝缘层。
所述步骤5之后还包括：在所述第二金属层上自下而上依次制作平坦层、底层电极、保护层、和顶层电极。
所述第一金属层包括：TFT的栅极、及与所述TFT的栅极连接的栅极线；所述第二金属层包括：TFT的源极、TFT的漏极、及与所述TFT的源极连接的数据线。
本发明的有益效果：本发明提供的一种TFT阵列基板结构及其制作方法，采用下氮化硅层、氧化硅层、和上氮化硅层三层结构的层间介电层，下氮化硅层含氢为氢化工艺提供氢离子，上氮化硅层提升层间介电层对杂质离子的隔绝防护能力，相比于现有技术中仅包括一氧化硅层与一氮化硅层的双层结构的中间介电层，能够在不影响氢化效果的前提下，提升层间介电层对杂质离子的隔绝防护能力，避免杂质离子污染的风险，缩短氢化时间，提升产能。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的层间介电层的结构示意图；
图2为本发明的TFT阵列基板结构的示意图；
图3为本发明的TFT阵列基板的制作方法的流程图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2，本发明首先提供一种TFT阵列基板结构，包括：基板1、设于所述基板1上的第一金属层2、覆盖所述第一金属层2的层间介电层3、及设于所述层间介电层3上第二金属层4。所述层间介电层3包括设于所述第一金属层2上的下氮化硅层31、设于所述下氮化硅层31上的氧化硅层32、及设于所述氧化硅层32上的上氮化硅层33；所述下氮化硅层31含氢。
本发明采用下氮化硅层31、氧化硅层32、和上氮化硅层33三层结构的层间介电层3，下氮化硅层31含氢能够在进行氢化时作为氢离子的来源，相比于现有技术中将一氮化硅层设于一氧化硅层之上的双层的层间介电层结构，氢化的时间更短，可以提升产能，所述上氮化硅层33具有比氧化硅层32更强的杂质离子隔离防护能力，相比于现有技术中将一氧化硅层设于一氮化硅层之上的双层的层间介电层结构，能够有效避免杂质离子污染的风险。
具体地，所述阵列基板的第一金属层2下方还包括：设于所述第一金属层2下方的第一绝缘层、设于所述第一绝缘层下方的半导体层、设于所述半导体层下方的缓冲层、和设于所述缓冲层下方的遮光层；以及设于所述第二金属层4上的平坦层、设于所述平坦层上的底层电极、设于所述底层电极上的保护层、和设于所述保护层上的顶层电极，这与现有的TFT阵列基板结构无异，此处不再展开进行详细描述。优选的，所述基板1为玻璃基板，所述第一金属层2和第二金属层4的材料为钼(Mo)、钛(Ti)、铝(Al)、铜(Cu)中的一种或多种的堆栈组合，所述顶层电极和底层电极的材料为氧化铟锡(IndiumTinOxide，ITO)。
具体地，所述第一金属层2包括：TFT的栅极、及与所述TFT的栅极连接的栅极线；所述第二金属层4包括：TFT的源极、TFT的漏极、及与所述TFT的源极连接的数据线。
进一步地，所述半导体层包括位于中间区域的沟道区、和位于沟道区两端的接触区。所述TFT的源极、漏极分别通过贯穿层间介电层3和第一绝缘层的过孔与半导体层两端的接触区相接触；所述顶层电极通过贯穿保护层、底层电极、和平坦层的过孔与TFT的漏极相接触。
请参阅图3并结合图2，本发明还提供一种阵列基板的制作方法，包括如下步骤：
步骤1、提供一基板1，在所述基板1上沉积并图案化第一金属层2。
具体地，所述基板1上预先自下而上依次制作有遮光层、缓冲层、半导体层、和第一绝缘层。
所述基板1为玻璃基板；所述第一金属层2的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。
所述半导体层包括位于中间区域的沟道区、和位于沟道区两端的接触区。所述第一金属层2包括：TFT的栅极、及与所述TFT的栅极连接的栅极线。
步骤2、采用化学气相沉积工艺(ChemicalVaporDeposition，CVD)在所述第一金属层2上成膜下氮化硅层31，所述下氮化硅层31含氢。
步骤3、采用化学气相沉积工艺在所述下氮化硅层31上成膜氧化硅层32。
步骤4、采用化学气相沉积工艺在所述氧化硅层32上成膜上氮化硅层33，所述下氮化硅层31、氧化硅层32、及上氮化硅层33共同构成层间介电层3。
步骤5、在所述层间介电层3上沉积并图案化第二金属层4。
具体地，所述第二金属层4包括：TFT的源极、TFT的漏极、及与所述TFT的源极连接的数据线。
随后在所述第二金属层4上自下而上依次制作平坦层、底层电极、保护层、顶层电极。所述TFT的源极、漏极分别通过贯穿层间介电层3和第一绝缘层的过孔与半导体层两端的接触区相接触；所述顶层电极通过贯穿保护层、底层电极、和平坦层的过孔与TFT的漏极相接触。
本发明的TFT阵列基板的制作方法，连续通过化学气相沉积工艺成膜下氮化硅层31、氧化硅层32、及上氮化硅层33，制得包括所述下氮化硅层31、氧化硅层32、及上氮化硅层33三层结构的层间介电层3，下氮化硅层31含氢能够在进行氢化时作为氢离子的来源，相比于现有技术中将一氮化硅层设于一氧化硅层之上的双层的层间介电层结构，氢化的时间更短，可以提升产能，所述上氮化硅层33具有比氧化硅层32更强的杂质离子隔离防护能力，相比于现有技术中将一氧化硅层设于一氮化硅层之上的双层的层间介电层结构，能够有效避免杂质离子污染的风险。
综上所述，本发明的TFT阵列基板结构及其制作方法，采用下氮化硅层、氧化硅层、和上氮化硅层三层结构的层间介电层，下氮化硅层含氢为氢化工艺提供氢离子，上氮化硅层提升层间介电层对杂质离子的隔绝防护能力，相比于现有技术中仅包括一氧化硅层与一氮化硅层的双层结构的中间介电层，能够在不影响氢化效果的前提下，提升层间介电层对杂质离子的隔绝防护能力，避免杂质离子污染的风险，缩短氢化时间，提升产能。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

1.一种TFT阵列基板结构，其特征在于，包括：基板(1)、设于所述基板(1)上的第一金属层(2)、覆盖所述第一金属层(2)的层间介电层(3)、及设于所述层间介电层(3)上第二金属层(4)；
所述层间介电层(3)包括设于所述第一金属层(2)上的下氮化硅层(31)、设于所述下氮化硅层(31)上的氧化硅层(32)、及设于所述氧化硅层(32)上的上氮化硅层(33)；所述下氮化硅层(31)含氢。
2.如权利要求1所述的TFT阵列基板结构，其特征在于，还包括：设于所述第一金属层(2)下方的第一绝缘层、设于所述第一绝缘层下方的半导体层、设于所述半导体层下方的缓冲层、以及设于所述缓冲层下方的遮光层。
3.如权利要求2所述的TFT阵列基板结构，其特征在于，还包括设于所述第二金属层(4)上的平坦层、设于所述平坦层上的底层电极、设于所述底层电极上的保护层、以及设于所述保护层上的顶层电极。
4.如权利要求1所述的TFT阵列基板结构，其特征在于，所述第一金属层(2)包括：TFT的栅极、及与所述TFT的栅极连接的栅极线。
5.如权利要求1所述的TFT阵列基板结构，其特征在于，所述第二金属层(4)包括：TFT的源极、TFT的漏极、及与所述TFT的源极连接的数据线。
6.一种TFT阵列基板的制作方法，其特征在于，包括如下步骤：
步骤1、提供一基板(1)，在所述基板(1)上沉积并图案化第一金属层(2)；
步骤2、在所述第一金属层(2)上成膜下氮化硅层(31)，所述下氮化硅层(31)含氢；
步骤3、在所述下氮化硅层(31)上成膜氧化硅层(32)；
步骤4、在所述氧化硅层(32)上成膜上氮化硅层(33)，所述下氮化硅层(31)、氧化硅层(32)、及上氮化硅层(33)共同构成层间介电层(3)；
步骤5、在所述层间介电层(3)上沉积并图案化第二金属层(4)。
7.如权利要求6所述的TFT阵列基板的制作方法，其特征在于，所述步骤2采用化学气相沉积工艺成膜下氮化硅层(31)，所述步骤3采用化学气相沉积工艺成膜氧化硅层(32)，所述步骤4采用化学气相沉积工艺成膜上氮化硅层(33)。
8.如权利要求6所述的TFT阵列基板的制作方法，其特征在于，所述步骤1之前还包括：在所述基板(1)上自下而上依次制作遮光层、缓冲层、半导体层、和第一绝缘层。
9.如权利要求8所述的TFT阵列基板的制作方法，其特征在于，所述步骤5之后还包括：在所述第二金属层(4)上自下而上依次制作平坦层、底层电极、保护层、和顶层电极。
10.如权利要求6所述的TFT阵列基板的制作方法，其特征在于，所述第一金属层(2)包括：TFT的栅极、及与所述TFT的栅极连接的栅极线；所述第二金属层(4)包括：TFT的源极、TFT的漏极、及与所述TFT的源极连接的数据线。
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Application publication date: 20160608