CN105652104A - Digital serial signal analyzer front channel self-correction apparatus and method - Google Patents
Digital serial signal analyzer front channel self-correction apparatus and method Download PDFInfo
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- CN105652104A CN105652104A CN201410632212.1A CN201410632212A CN105652104A CN 105652104 A CN105652104 A CN 105652104A CN 201410632212 A CN201410632212 A CN 201410632212A CN 105652104 A CN105652104 A CN 105652104A
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Abstract
The invention belongs to the field of an electronic measurement instrument, and discloses a digital serial signal analyzer front channel self-correction apparatus. The apparatus comprises a high/low-resistance selector, a high-resistance program control attenuator, an impedance converter, a radio frequency bidirectional selection switch, a low-resistance program control attenuator and a high-speed program control gain selectable amplifier. Front-channel gain is adjusted through the program control attenuators and the high-speed program control gain selectable amplifier, the program control attenuators and the high-speed program control gain selectable amplifier are accurately controlled, and voltage gain of each shift of a front channel is accurately controlled. Zero-bias correction is realized through displacement adjustment of bias voltages, yet the zero-bias correction can also cause change of static DC level of the channel, as a result, the program attenuators are corrected, after the process is repeated multiple times, if data output by the channel satisfies an error requirement, the correction succeeds, and otherwise, the correction fails.
Description
Technical field
The invention belongs to electronic measuring instrument field, the self-correcting device of specifically a kind of data serial signal analyzer analog channel.
Background technology
One of Main Means that data serial signal analyzer is measured as high-speed serial signals system electronic, can be applicable in radio communication, optical communication, network transmission, industry spot product test and quality control, national defense industry many departments and the fields such as radar signal test, quick reaction operations command net, sonar signal analysis, cannon shock wave test. Data serial signal analyzer whole system can be divided into analog channel system, digital collection and process system, serial signal analysis module and analyzing software system, control and display system.
The analog channel of data serial signal analyzer is the critical component of whole instrument and equipment, and the data serial signal analyzer acquisition channel that Tek company of the U.S. releases adopts special asic chip, and encryption performance is fine. The current domestic demand dependence on import of this quasi-instrument. Data serial signal analyzer needs special rectifying an instrument that analog channel performance indications are carried out manual synchronizing before dispatching from the factory. Along with the change using environment (such as temperature, humidity) after dispatching from the factory, and the aging zero point generation drift being likely to make analog channel of components and parts or gain change, and cause can not accurately measuring signal. This is accomplished by instrument with self-tuning function. After self-correcting, instrument enters best duty, can measure observed signal accurately.
Summary of the invention
The technique effect of the present invention can overcome drawbacks described above, it is provided that the self-correcting device of a kind of data serial signal analyzer analog channel, distortion factor when it is obviously improved analog channel high frequency big signal intensity and signal voltage noise.
For achieving the above object, the present invention adopts the following technical scheme that and includes high/low resistance selector, high resistant programmable attenuator, impedance transformer, RF bidirectional selection switch, the optional amplifier of low-resistance programmable attenuator, high speed programme-controlled gain, analog channel gain is regulated by the optional amplifier of programmable attenuator and high speed programme-controlled gain, accurately control programmable attenuator and the optional amplifier of high speed programme-controlled gain, accurately control the voltage gain of each gear of analog channel;According to analog channel self-correcting requirement, first to each gear setup control parameter of analog channel, control parameter is converted into control signal, control signal is converted correction signal, continue that correction signal is sent into analog channel to amplify, correction signal after amplifying is converted into digital signal, digital signal is carried out process and judges whether to be equal to desired value.
It is a further object to provide the automatic correcting method of a kind of data serial signal analyzer analog channel, comprise the steps:
(1) timing, first analog channel is placed in passage one, switching gear is to the maximum gear of analog channel, when not plus signal, pass through data sampling and processing, adjust offset voltage, make baseline be shown in the position of data serial signal analyzer liquid crystal display screen vertical centre, the correction voltage of respective notch can be inputted;
(2) if baseline is not shown in the position of data serial signal analyzer liquid crystal display screen vertical centre, then school is inclined, continues data sampling and processing; If baseline is shown in the position of data serial signal analyzer liquid crystal display screen vertical centre, then carry out next step;
(3) 3 lattice voltages are added;
(4) further to data sampling and processing;
(5) programmable step attenuator and the amplification pad value of the optional amplifier of high speed programme-controlled gain are changed, to adjust the signal correction to analog channel gain, until waveform is accurately located at 3 lattice;
(6) if waveform can not be accurately located at 3 lattice, then by school gain calibration; If waveform can not be accurately located at 3 lattice, then enter other grade of level correction of analog channel.
Zero inclined school is exactly based on what the adjustment of displacement to bias voltage realized, but correcting zero partially also can cause the change of static direct current level of passage, so correcting programmable attenuator again again, after this process is repeated multiple times, if passage output data meet error requirements. Then correct successfully; Otherwise, then make mistakes.
Accompanying drawing explanation
Fig. 1 is the theory diagram of data serial signal analyzer analog channel;
Fig. 2 is the self-correcting hardware circuit sketch of data serial signal analyzer analog channel;
Fig. 3 is the self-correcting flow chart of data serial signal analyzer analog channel.
Detailed description of the invention
Data serial signal analyzer analog channel is made up of high/low resistance selector, high resistant programmable attenuator, impedance transformer, low-resistance programmable attenuator, the optional amplifier of high speed programme-controlled gain. The operation principle of data serial signal analyzer analog channel is shown in shown in accompanying drawing 1. As shown in Figure 1, analog channel gain is regulated by the optional amplifier of programmable attenuator and high speed programme-controlled gain, accurately control programmable attenuator and the optional amplifier of high speed programme-controlled gain, also the voltage gain of each gear of analog channel is just accurately controlled, but due to passage, to have zero inclined, in the process regulating programmable attenuator and the optional amplifier of high speed programme-controlled gain, passage static direct current level and the change of passage output zero level can be caused. So also the zero of passage is corrected partially. Zero inclined school is exactly based on what the adjustment of displacement to bias voltage realized, but correcting zero partially also can cause the change of static direct current level of passage, so correcting programmable attenuator again again, after this process is repeated multiple times, if passage output data meet error requirements. Then correct successfully; Otherwise, then make mistakes. According to analog channel self-correcting requirement, first to each gear setup control parameter of analog channel, control parameter is converted into control signal, control signal is converted correction signal, continue that correction signal is sent into analog channel to amplify, the correction signal after amplifying is converted into digital signal, digital signal is carried out process and judges whether to be equal to desired value, if correct, then terminate.If mistake, re-calibrate.
Hardware circuit design
Analog channel is carried out self-correcting, it is necessary first to the gain of analog channel is corrected by an accurate calibration source. The design device provides the input correction voltage of operational amplifier by 12 DAC controlled by FPGA, then the output signal of operational amplifier joins the input of analog channel.
The hardware circuit sketch of vertical amplification channel self-correcting circuit is as in figure 2 it is shown, main chip has AD5623 and amplifier OP37.
1��AD5623
AD5623 is a couple of DAC of AD Company, and precision is 12, and the scope of its output voltage can be determined by selected reference voltage: if using internal reference voltage, optional two gears of 1.25V and 2.5V, full scale output voltage respectively 2.5V and 5V; If using External Reference voltage, its full scale output voltage can be controlled by input voltage, and input range is 2.7V and 5.5V. What the design device was selected is the internal reference voltage of 2.5V. Therefore, full scale output voltage is 5V, LSB=1.22mV. It has three serial input interfaces. When sync=0,24 bit data DIN are loaded into data to its shift register at the trailing edge of CLK, and when proceeding to the trailing edge of the 24th clock, 24 bit data are loaded in dac register from shift register. If write data next time, after sync need to being kept high level at least 15ns, then zero setting, can enter and write data next time.
2��OP37
OP37 is a operational amplifier of ADI company, and main technical specification has:
(1) slew rate: 17V/us
(2) low noise: 80nVp-p
(3) low input off-set voltage: 10uV
(4) good common mode rejection ratio: 126dB
Comprehensive above index, owing to this amplifier is for amplifying the DC voltage of DAC output, it is desirable to output voltage accuracy, degree of stability are high, ripple is little, so this amplifier that we select is low noise high-operational amplifier. In the design of circuit, note the process to ground connection. Stratum below operational amplifier to remove, it is prevented that the distribution capacity impact on amplifier, and devises RC filter circuit at the outfan of amplifier, reduces signal noise further. When placing decoupling capacitor, it should be noted that the lead-in wire of chip power and ground pin can not be long. In the selection of resistance, use precision resistance to reduce error.
Data serial signal analyzer vertical channel gear presses 1-2-5 stepping, has 11 gears from 2mV-5Vdiv. Owing to must all gears be corrected, and correction voltage is generally as the criterion with three lattice voltages, so just requiring that the voltage that circuit exports must is fulfilled for 6mV-15V. As shown in Figure 2, the in-phase input end voltage V+ of amplifier is determined by the dividing potential drop of the two of DAC 12 DAC output voltage. Wherein R5=100K, R4=1K. Therefore, as Voutb=0, the voltage of V+ is almost equal with Vouta; As Vouta=0, the voltage of V+ is almost the 1/100 of Voutb; And work as Vouta=0, during Voutb=0, it is possible to the output voltage calculating now amplifier is negative. As can be seen here, the output area of amplifier can meet requirement, and can realize Vouta voltage is carried out coarse adjustment. Voltage is carried out fine tuning by Voutb. In the design device, when selecting 5V-20mV gear, use coarse adjustment Vouta; Less than the gear of 20mV, use and adjust Voutb.
Software design
Software design is as shown in Figure 3. Numeral is when serial signal analyser analog channel is added without correction signal, and the data value that Acquisition Circuit is obtained carries out judgement process, if not meeting baseline in screen center's design parameter value, adjusts analog channel displacement deviation value.If met, adding 3 lattice correction voltages, the data value that Acquisition Circuit is obtained carries out judgement process, if not meeting inclined 3 lattice design parameter value on baseline, adjusts analog channel programmable attenuator and the optional amplifier of high speed programme-controlled gain. If meeting, entering other gear levels of analog channel and in like manner correcting.
The analog-digital converter (ADC) used due to the serial signal analyser Acquisition Circuit of design is 8 outputs, and what can accept voltage ranges for +/-250mV. When input is for-250mV, output numerical value is 0; When input is for+250mV, output numerical value is 500. Therefore, vertical channel must will input signal under various gears, by controlling corresponding attenuation network and by adjusting the input data controlling programmable attenuator and the optional amplifier magnification ratio of high speed programme-controlled gain when cpu emulates, ensure, in the scope that signal amplitude reaches the +/-1.5dB of desired location, data to be stored in FLASH. Making wherein accurate adjustment is regulated by ADC internal gain to control with an offset regulating circuit.
The data serial signal analyzer analog channel needing correction mainly has following two problem: not plus signal base line Bu center, after plus signal, the amplitude reading of signal is incorrect.
As shown in Figure 3, timing, first analog channel is placed in passage one, and switching gear is to the maximum gear of analog channel, when not plus signal, adjust offset voltage, make baseline be shown in the position of data serial signal analyzer liquid crystal display screen vertical centre, the correction voltage of respective notch can be inputted, change programmable step attenuator and the amplification pad value of the optional amplifier of high speed programme-controlled gain, to adjust the signal correction to analog channel gain, until waveform is accurately located at 3 lattice. This process realizes mainly by following steps in software control:
During without input, cpu judge that ADC gathers whether the output data of signal are 128, meanwhile, control the FPGA DAC to controlling passage and send corresponding data to adjust vertical shift. After baseline adjustment is normal, after input correction voltage, DSP judge that ADC gathers whether the data of signal output are 203, then, regulate the internal calibrations data of ADC to regulate gain, make ADC gather data stabilization in 203.
But owing to analog channel exists zero partially, in the process regulating programmable attenuator and the optional amplifier of high speed programme-controlled gain, passage static direct current level and the change of passage output zero level can be caused, so also the zero of passage should be corrected partially. Partially also can cause the change of the static direct current level of passage due to correcting zero, so that the optional amplifier output voltage skew of programme-controlled gain, amplify attenuation multiple error excessive. So also needing to re-calibrate analog channel voltage gain. This process is repeatedly after three times, exports data meet error requirements if gathering ADC, then correct successfully, preserve correction data; Otherwise, then failure is corrected. If repeatedly correcting failure, then show that hardware would be likely to occur problem, need manual intervention. Passage 1 corrects by rear, switch to 2,3,4, the identical gear of passage, keep correction voltage value constant, repetition above procedure.
From 5V-2mVdiv, by successively decreasing, order repeats above trimming process, until all correcting complete by 11 gears, preserving all data, data programming being entered in corresponding FLASH, reads during for opening initialization next time. This design apparatus has been applied in the serial signal analyser of design, and performance indications meet instrument requirements.
It is obvious to a person skilled in the art that the invention is not restricted to the details of above-mentioned one exemplary embodiment, and when without departing substantially from the spirit of the present invention or basic feature, it is possible to realize the present invention in other specific forms. Therefore, no matter from which point, embodiment all should be regarded as exemplary, and be nonrestrictive, the scope of the present invention is limited by affiliated claim rather than described above, it is intended that all changes in the implication of the equivalency dropping on claim and scope included in the present invention. Should not be considered as any accompanying drawing labelling in claim limiting involved claim.
Claims (2)
1. the self-correcting device of a data serial signal analyzer analog channel, it is characterized in that, the optional amplifier of switch, low-resistance programmable attenuator, high speed programme-controlled gain is selected including high/low resistance selector, high resistant programmable attenuator, impedance transformer, RF bidirectional, analog channel gain is regulated by the optional amplifier of programmable attenuator and high speed programme-controlled gain, accurately control programmable attenuator and the optional amplifier of high speed programme-controlled gain, accurately control the voltage gain of each gear of analog channel; According to analog channel self-correcting requirement, first to each gear setup control parameter of analog channel, control parameter is converted into control signal, control signal is converted correction signal, continue that correction signal is sent into analog channel to amplify, correction signal after amplifying is converted into digital signal, digital signal is carried out process and judges whether to be equal to desired value.
2. the automatic correcting method of a data serial signal analyzer analog channel, it is characterised in that comprise the steps:
(1) timing, first analog channel is placed in passage one, switching gear is to the maximum gear of analog channel, when not plus signal, pass through data sampling and processing, adjust offset voltage, make baseline be shown in the position of data serial signal analyzer liquid crystal display screen vertical centre, the correction voltage of respective notch can be inputted;
(2) if baseline is not shown in the position of data serial signal analyzer liquid crystal display screen vertical centre, then school is inclined, continues data sampling and processing; If baseline is shown in the position of data serial signal analyzer liquid crystal display screen vertical centre, then carry out next step;
(3) 3 lattice voltages are added;
(4) further to data sampling and processing;
(5) programmable step attenuator and the amplification pad value of the optional amplifier of high speed programme-controlled gain are changed, to adjust the signal correction to analog channel gain, until waveform is accurately located at 3 lattice;
(6) if waveform can not be accurately located at 3 lattice, then by school gain calibration; If waveform can not be accurately located at 3 lattice, then enter other grade of level correction of analog channel.
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Cited By (7)
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| CN108021172A (en) * | 2017-11-28 | 2018-05-11 | 深圳市航天新源科技有限公司 | A kind of high bandwidth input isolation sampling and precision calibration circuit and method |
| CN108344888A (en) * | 2018-01-26 | 2018-07-31 | 中国人民解放军战略支援部队信息工程大学 | Small signal circuit detection device and its method in communication line based on circuit transmission |
| CN110361552A (en) * | 2019-06-11 | 2019-10-22 | 北京博奥晶典生物技术有限公司 | The centrifugal portable microfluidic analysis device of one kind and its application method |
| CN110716076A (en) * | 2019-12-13 | 2020-01-21 | 深圳市鼎阳科技股份有限公司 | Digital oscilloscope and gain self-correction method for digital oscilloscope |
| CN112098702A (en) * | 2020-11-17 | 2020-12-18 | 深圳市鼎阳科技股份有限公司 | Digital oscilloscope and vertical gear correction method for digital oscilloscope |
| CN112417799A (en) * | 2020-12-04 | 2021-02-26 | 北京华大九天软件有限公司 | Multi-signal selection and response method |
| CN113067622A (en) * | 2021-02-25 | 2021-07-02 | 上海卫星工程研究所 | Composite scene multi-source signal generation autonomous deviation correcting device and method |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108021172A (en) * | 2017-11-28 | 2018-05-11 | 深圳市航天新源科技有限公司 | A kind of high bandwidth input isolation sampling and precision calibration circuit and method |
| CN108344888A (en) * | 2018-01-26 | 2018-07-31 | 中国人民解放军战略支援部队信息工程大学 | Small signal circuit detection device and its method in communication line based on circuit transmission |
| CN108344888B (en) * | 2018-01-26 | 2020-07-10 | 中国人民解放军战略支援部队信息工程大学 | Circuit transmission-based small signal circuit detection device and method in communication line |
| CN110361552A (en) * | 2019-06-11 | 2019-10-22 | 北京博奥晶典生物技术有限公司 | The centrifugal portable microfluidic analysis device of one kind and its application method |
| CN110361552B (en) * | 2019-06-11 | 2023-06-09 | 北京博奥晶典生物技术有限公司 | Centrifugal portable microfluidic analysis device and application method thereof |
| CN110716076A (en) * | 2019-12-13 | 2020-01-21 | 深圳市鼎阳科技股份有限公司 | Digital oscilloscope and gain self-correction method for digital oscilloscope |
| CN112098702A (en) * | 2020-11-17 | 2020-12-18 | 深圳市鼎阳科技股份有限公司 | Digital oscilloscope and vertical gear correction method for digital oscilloscope |
| CN112098702B (en) * | 2020-11-17 | 2021-02-09 | 深圳市鼎阳科技股份有限公司 | Digital oscilloscope and vertical gear correction method for digital oscilloscope |
| CN112417799A (en) * | 2020-12-04 | 2021-02-26 | 北京华大九天软件有限公司 | Multi-signal selection and response method |
| CN113067622A (en) * | 2021-02-25 | 2021-07-02 | 上海卫星工程研究所 | Composite scene multi-source signal generation autonomous deviation correcting device and method |
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Application publication date: 20160608 |