CN112098702A - Digital oscilloscope and vertical gear correction method for digital oscilloscope - Google Patents
Digital oscilloscope and vertical gear correction method for digital oscilloscope Download PDFInfo
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Abstract
The invention discloses a digital oscilloscope and a vertical gear correction method for the digital oscilloscope, wherein a bias adjusting circuit is corrected by an external input signal, after correction, the bias adjusting circuit can be equivalent to a standard signal source in the digital oscilloscope, and then the bias adjusting circuit equivalent to the standard signal source is used for correcting the gain precision and the offset precision of a vertical gear, so that the correction time is shortened, the production efficiency is greatly improved, and the use experience of a user is improved.
Description
Technical Field
The invention relates to the technical field of digital oscilloscopes, in particular to a digital oscilloscope and a vertical gear correction method for the digital oscilloscope.
Background
The digital oscilloscope is a widely used general instrument and is widely used. The oscilloscope needs to observe signals, and can only carry out effective observation after the signals are firstly regulated by an analog channel.
The accuracy of signal amplitude measurement is a key index of the oscilloscope, and represents the accuracy of the vertical system for signal measurement. The digital oscilloscope has two factors for measuring the signal amplitude, namely gain precision k and direct current offset precision b 0. Wherein the gain accuracy k is the accuracy of the attenuation or amplification of the signal by the vertical system, and the bias accuracy b0 is the accuracy of the position of the signal in the vertical direction.
Because the oscilloscopes have different use environments, such as different temperatures and different humidity, and electronic elements in the digital oscilloscopes in different batches of the same model have certain differences, in addition, the electronic elements in the digital oscilloscopes have aging phenomena in the long-term use process, and the factors inevitably cause measurement errors of the digital oscilloscopes, the vertical gear of the digital oscilloscopes needs to be corrected, so that the oscilloscopes can truly feed back measured signals.
Disclosure of Invention
The invention aims to provide a digital oscilloscope and a vertical gear correction method for the digital oscilloscope, so as to correct the vertical gear of the digital oscilloscope.
According to a first aspect, an embodiment provides a vertical tap correction method for a digital oscilloscope, the digital oscilloscope comprises a bias adjusting circuit for adjusting a signal bias position and an adjustable gain amplifier for amplifying a signal, and the method comprises the following steps:
correcting the bias adjusting circuit: receiving a plurality of input signals in response to a correction instruction of the bias adjusting circuit input by a user;
when an input signal is received, configuring the offset value of an offset adjusting circuit according to a first preset rule to obtain a plurality of offset adjusting signals, wherein the offset adjusting signals correspond to the offset values of the offset adjusting circuit one to one; obtaining a plurality of first signals based on a current input signal and a plurality of offset adjustment signals; gain amplification is carried out on the plurality of first signals to obtain a plurality of first display signals; searching a first display signal with the minimum absolute value of the voltage value in the plurality of first display signals, determining a corresponding offset adjusting signal based on the searched first display signal, namely obtaining a corresponding offset value, and taking the offset value as the offset value corresponding to the current input signal;
acquiring voltage values of a plurality of input signals input into the digital oscilloscope and corresponding offset values thereof;
fitting to obtain an offset correction curve based on the voltage values of the plurality of input signals and the offset values corresponding to the voltage values;
a vertical gear correction step: responding to a correction instruction of a vertical gear, cutting off an input signal, and configuring an attenuation multiple and a VGA fixed gain;
sequentially configuring a plurality of selected vertical gears according to a preset sequence;
when any selected vertical gear is configured, configuring a VGA configuration value referred by the currently selected vertical gear, wherein the VGA configuration value is used for adjusting the adjustable gain of an adjustable gain amplifier, and the amplification gain of the adjustable gain amplifier comprises VGA fixed gain and adjustable gain;
sequentially configuring a plurality of offset values of an offset adjusting circuit based on the offset correction curve;
when any offset value is configured, generating a standard offset adjusting signal based on the offset correction curve;
obtaining a second signal based on the current standard offset adjustment signal; gain amplification is carried out on the second signal to obtain a second display signal;
acquiring a voltage value of the second display signal and a voltage value of the standard bias adjusting signal; obtaining the voltage values of the second display signals and the voltage values of the standard bias adjusting signals corresponding to the plurality of bias values;
fitting to obtain a correction curve of the currently selected vertical gear based on the voltage values of the second display signals and the voltage values of the standard offset adjusting signals corresponding to the plurality of offset values;
and correcting the currently selected vertical gear based on the correction curve of the currently selected vertical gear.
According to a second aspect, there is provided in one embodiment a digital oscilloscope, comprising:
an attenuation network for attenuating a received input signal;
the bias adjusting circuit is used for generating a bias adjusting signal, and the bias value of the bias adjusting circuit is related to the voltage value of the bias adjusting signal generated by the bias adjusting circuit;
the impedance transformation network is used for generating a VGA input signal according to the attenuated input signal and the bias adjusting signal;
the adjustable gain amplifier is used for performing gain amplification on the VGA input signal;
the analog-to-digital converter is used for performing analog-to-digital conversion on the signal output by the adjustable gain amplifier to obtain a display signal;
the display module is used for displaying the signal waveform and the voltage value of the display signal;
the controller is used for responding to a correction instruction of the bias adjusting circuit input by a user, receiving an input signal, and inputting the input signal into the digital oscilloscope according to a first preset rule;
when an input signal is received, configuring the offset value of an offset adjusting circuit according to a first preset rule to obtain a plurality of offset adjusting signals, wherein the offset adjusting signals correspond to the offset values of the offset adjusting circuit one to one; obtaining a plurality of first signals based on a current input signal and a plurality of offset adjustment signals; gain amplification is carried out on the plurality of first signals to obtain a plurality of first display signals; searching a first display signal with the minimum absolute value of the voltage value in the plurality of first display signals, determining a corresponding offset adjusting signal based on the searched first display signal, namely obtaining a corresponding offset value, and taking the offset value as the offset value corresponding to the current input signal;
the controller acquires voltage values of all input signals of the input digital oscilloscope and bias values corresponding to the voltage values;
based on the voltage values of all the input signals and the corresponding offset values thereof, the controller fits to obtain an offset correction curve;
the controller responds to a correction instruction of a vertical gear, cuts off an input signal, and configures an attenuation multiple and VGA fixed gain;
the controller is sequentially configured with a plurality of selected vertical gears according to a preset sequence;
when any selected vertical gear is configured, the controller configures a VGA configuration value referred by the currently selected vertical gear, wherein the VGA configuration value is used for adjusting the adjustable gain of the adjustable gain amplifier, and the amplification gain of the adjustable gain amplifier comprises VGA fixed gain and adjustable gain;
based on the offset correction curve, the controller sequentially configures a plurality of offset values of the offset adjusting circuit;
when any bias value is configured, the controller generates a standard bias adjusting signal based on the bias correction curve;
the controller obtains a second signal based on the current standard offset adjusting signal; gain amplification is carried out on the second signal to obtain a second display signal;
the controller acquires a voltage value of the second display signal and a voltage value of the standard bias adjusting signal; obtaining the voltage values of the second display signals and the voltage values of the standard bias adjusting signals corresponding to the plurality of bias values;
the controller fits to obtain a correction curve of the currently selected vertical gear based on the voltage values of the second display signals and the voltage values of the standard offset adjusting signals corresponding to the plurality of offset values;
the controller corrects the currently selected vertical gear based on the correction curve of the currently selected vertical gear.
According to a third aspect, there is provided in one embodiment a digital oscilloscope, comprising:
an attenuation network for attenuating a received input signal;
the bias adjusting circuit is used for generating a bias adjusting signal, and the bias value of the bias adjusting circuit is related to the voltage value of the bias adjusting signal generated by the bias adjusting circuit;
the impedance transformation network is used for generating a VGA input signal according to the attenuated input signal and the bias adjusting signal;
the adjustable gain amplifier is used for performing gain amplification on the VGA input signal;
the analog-to-digital converter is used for performing analog-to-digital conversion on the signal output by the adjustable gain amplifier to obtain a display signal;
the display module is used for displaying the voltage value of the display signal;
a controller for executing to implement the method described in the above embodiments.
According to the digital oscilloscope and the vertical gear correction method for the digital oscilloscope, the offset adjusting circuit is corrected through a plurality of external input signals, after correction, the offset adjusting circuit can be equivalent to a standard signal source in the digital oscilloscope, and then the offset adjusting circuit equivalent to the standard signal source is used for correcting the gain precision and the offset precision of the vertical gear, so that the correction time is shortened, the production efficiency is greatly improved, and the use experience of a user is improved.
Drawings
FIG. 1 is a schematic diagram of a digital oscilloscope;
FIG. 2 is a schematic diagram of a circuit configuration of a digital oscilloscope;
FIG. 3 is a schematic diagram of a digital oscilloscope according to an embodiment;
FIG. 4 is a schematic flow chart of a vertical gear correction method for a digital oscilloscope according to an embodiment;
FIG. 5 is a flow chart of a method for calibrating the bias adjustment circuit according to an embodiment;
FIG. 6 is a schematic view of an offset calibration curve according to an embodiment;
FIG. 7 is a flowchart of a vertical gear correction method according to one embodiment;
FIG. 8 is a schematic diagram of the voltage level of the standard offset adjustment signal and the corresponding display signal displayed on the display screen;
fig. 9 is a diagram illustrating a corresponding relationship between the variable gain g and the VGA configuration value according to an embodiment.
Detailed Description
The present invention will be described in further detail with reference to the following detailed description and accompanying drawings. Wherein like elements in different embodiments are numbered with like associated elements. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, those skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.
Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the method descriptions may be transposed or transposed in order, as will be apparent to one of ordinary skill in the art. Thus, the various sequences in the specification and drawings are for the purpose of describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where such sequence must be followed.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings).
Referring to fig. 1, fig. 1 is a schematic structural diagram of a digital oscilloscope, which includes a signal input terminal 1, an attenuation network 2, an impedance transformation network 3, an adjustable gain amplifier (VGA) 4, a bias adjusting circuit 5, a controller 6, an analog-to-digital converter (ADC) 7, a programmable logic controller (FPGA) 8, and a display screen 9. An external input signal is input into the digital oscilloscope through the signal input end 1, the digital oscilloscope firstly attenuates the input signal through the attenuation network 2, and inputs the attenuated input signal into the impedance transformation network 3. The offset adjusting circuit 5 is composed of a first digital-to-analog converter (DAC 1) and a plurality of sets of operational amplifiers, and is respectively connected with the controller 6 and the impedance transformation network 3, the controller 6 directly or indirectly configures an offset value of the offset adjusting circuit 5, and the offset adjusting circuit 5 outputs an offset adjusting signal to the impedance transformation network 3 according to the configured offset value. The impedance transformation network 3 superimposes the received attenuated input signal and the bias adjusting signal and sends the superimposed signal to an adjustable gain amplifier (VGA) 4. The adjustable gain amplifier (VGA) 4 is respectively connected with the controller 6 and the analog-to-digital converter (ADC) 7, and the VGA configuration value of the adjustable gain amplifier (VGA) 4 is configured by the controller 6 so as to input the signal output by the impedance conversion network 3 to the VGA, amplify the signal and send the amplified signal to the analog-to-digital converter 7. The analog-to-digital converter 7 is used for converting the amplified VGA input signal into a digital signal and sending the digital signal to the FPGA 8. The FPGA8 is connected with the controller 6 and the display screen 9, and the FPGA8 is configured by the controller to perform waveform data processing and menu superposition on the received digital signals and then send the digital signals to the display screen 9. The display screen 9 is used to display the final waveform of the input signal and menu information.
Referring to fig. 2, fig. 2 is a schematic circuit diagram of a digital oscilloscope, in which a controller issues a command to configure a first digital-to-analog converter (DAC 1), and a DAC1 outputs a dc signal
，
And the input signal of the signal input terminal 1 are superimposed in the impedance transformation circuit 201.
When the vertical gear correction is carried out, the signal input by the signal input end 1 is a direct current voltage signal, and a VGA input signal V can be obtained through the formula (1)in_VGAComprises the following steps:
the anten in formula (1) is the attenuation multiple of the attenuation network.
Formula (1) can also be simplified to formula (2):
the amplification gain Vgain _ VGA of the adjustable gain amplifier (VGA) 4 is composed of a first stage having a plurality of fixed gain multiples G (e.g., G =1,2,5,10, etc.) and a first stage variable gain multiple G, that is, Vgain _ VGA = G. Where the variable gain g is controlled by a VGA configuration value which is controlled by a codeword of a second analog-to-digital converter DAC2 in the VGA.
At present, there are two methods for correcting the vertical gear of a digital oscilloscope, wherein one method is to continuously adjust the bias value and the VGA configuration value of a bias adjusting circuit to realize the correction, and the method comprises the following steps:
step 101, configuring and selecting a coarse adjustment vertical gear V/div.
Step 102, continuously adjusting the bias value of the bias adjusting circuit under the condition of not inputting signals, so that the zero level offset of the display signals is positioned in the middle of the display screen.
103, under the current configuration, inputting two known direct current signals Vin1 and Vin2 to a signal input end through an external signal source, continuously adjusting a VGA configuration value for each input signal, so that the input signal changes on a display screen, when the signal is near the n1 div and n2 div positions of the display screen and is smaller than a certain error, a vertical gear satisfies a relation V/div = (Vin 1-Vin 2)/(n 1 div-n 2 div), stopping adjusting the variable gain multiple of the VGA, recording the current VGA configuration value, and completing the correction.
The method realizes correction by continuously adjusting the bias value and the VGA configuration value of the bias adjusting circuit, needs to traverse more bias values and VGA configuration values, separates gain correction and bias precision correction, and has long time consumption and little flexibility.
Another method for selecting an internal reference source corrects the vertical gear, including the gain amplification factor and the offset precision of the VGA.
step 202, zero level offset precision correction: the controller configures the voltage output by the internal reference source to be 0V, reads the signal acquired by the ADC, continuously adjusts the output voltage of the bias circuit to be 0V if the voltage is not 0V, and records and maintains the current configuration value of the bias circuit;
step 203, the controller configures the output voltage of the internal reference source, and the output voltage amplitude is in the + n div position of the current gear to be corrected;
204, reading the signal acquired by the ADC by the controller, judging whether the signal is at the position of + n div, if not, continuously adjusting the gain multiple of the VGA to enable the VGA to be at the position of + n div, and recording and storing the current VGA configuration value;
step 205, offset precision correction: the internal reference source outputs a + n2 div signal, and the CPU configures the offset circuit configuration value to pull the signal on the display screen back to the 0V position, where the offset circuit configuration value is the offset value of the corrected channel.
According to the method, the gain of the vertical gear, the zero level offset precision and the non-zero offset precision are corrected separately, the correction process is complicated, and the hardware cost is increased by additionally adding a built-in reference source.
In the embodiment of the invention, a digital oscilloscope and a vertical gear correction method for the digital oscilloscope are disclosed, wherein an offset adjusting circuit is corrected through an external input signal, the corrected offset adjusting circuit can be equivalent to a standard signal source in the digital oscilloscope, and then the offset adjusting circuit equivalent to the standard signal source is used for correcting the gain precision and the offset precision of a vertical gear, so that the correction time is shortened, the production efficiency is greatly improved, and the use experience of a user is improved.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a digital oscilloscope according to an embodiment, where the digital oscilloscope includes a signal input terminal 10, an attenuation network 20, an impedance transformation network 30, an adjustable gain amplifier 40, a bias adjustment circuit 50, a controller 60, an analog-to-digital converter 80, and a display module 70. The attenuation network 20 is used for attenuating the input signal received by the signal input terminal 10; the bias adjusting circuit 50 is used for generating a bias adjusting signal, wherein the bias value of the bias adjusting circuit 50 is related to the voltage value of the bias adjusting signal generated by the bias adjusting circuit 50; the impedance transformation network 30 is configured to generate a VGA input signal according to the attenuated input signal and the bias adjustment signal; the adjustable gain amplifier 40 is used for gain amplifying the VGA input signal; the analog-to-digital converter 80 is configured to perform analog-to-digital conversion on the signal output by the adjustable gain amplifier 40 to obtain a display signal; the display module 70 is used for displaying the signal waveform and the voltage value of the display signal, and the display module 70 comprises an FPGA71 and a display screen 72. Wherein:
the controller 60 is used for receiving a plurality of input signals in response to a correction instruction of the offset adjusting circuit 50 input by a user; when the signal input terminal 10 receives an input signal, the controller 60 configures the offset values of the offset adjusting circuit 50 according to a first preset rule to generate a plurality of offset adjusting signals, wherein the offset adjusting signals correspond to the offset values of the offset adjusting circuit one to one; obtaining a plurality of first signals based on a current input signal and a plurality of offset adjustment signals; gain amplification is carried out on the plurality of first signals to obtain a plurality of first display signals; searching a first display signal with the minimum absolute value of the voltage value in the plurality of first display signals, determining a corresponding offset adjusting signal based on the searched first display signal, namely obtaining a corresponding offset value, and taking the offset value as the offset value corresponding to the current input signal; the controller 60 acquires voltage values of a plurality of input signals input into the digital oscilloscope and bias values corresponding to the voltage values; based on the voltage values of the plurality of input signals and their corresponding offset values, the controller 60 fits to obtain an offset correction curve; the controller 60 responds to the correction instruction of the vertical gear input by the user, and configures the attenuation multiple of the attenuation network 20 and the VGA fixed gain in the adjustable gain amplifier 40; the controller 60 sequentially configures a plurality of selected vertical gears according to a preset sequence; when any selected vertical gear is configured, the controller 60 configures the VGA configuration value referred to by the currently selected vertical gear of the adjustable gain amplifier 40, wherein the VGA configuration value is used for adjusting the adjustable gain of the adjustable gain amplifier 40, and the amplification gain of the adjustable gain amplifier 40 includes VGA fixed gain and adjustable gain; based on the offset correction curve, the controller 60 sequentially configures a plurality of offset values of the offset adjusting circuit 50; when any one of the offset values is configured, the controller 60 generates a standard offset adjustment signal based on the offset correction curve; the controller 60 obtains a second signal based on the current standard offset adjustment signal; gain amplification is carried out on the second signal to obtain a second display signal; the controller 60 acquires the voltage value of the second display signal and the voltage value of the standard bias adjustment signal; obtaining the voltage values of the second display signals and the voltage values of the standard bias adjusting signals corresponding to the plurality of bias values; the controller 60 fits to obtain a correction curve of the currently selected vertical gear based on the voltage values of the current display signal and the voltage values of the standard offset adjustment signals corresponding to the plurality of offset values; the controller 60 corrects the currently selected vertical gear based on the correction curve for the currently selected vertical gear.
In the embodiment of the present invention, the VGA input signal, the first signal and the second signal are both signals output by the impedance transforming network 30 based on the signals input to the impedance transforming network 30, and are the first signal, the second signal or the VGA input signal according to the difference between the signals input to the impedance transforming network 30. Similarly, the display signal, the first display signal and the second display signal are signals obtained by performing gain amplification on the VGA input signal, the first signal and the second signal respectively by the adjustable gain amplifier 40.
Referring to fig. 4, fig. 4 is a schematic flow chart illustrating a vertical gear calibration method for a digital oscilloscope according to an embodiment, where the calibration method includes: an S30 offset adjustment circuit correction step and an S40 vertical gear correction step.
Referring to fig. 5, fig. 5 is a flowchart illustrating a method for calibrating a bias adjustment circuit according to an embodiment, wherein the step of calibrating the bias adjustment circuit at S30 includes:
in step 301, a plurality of input signals are received in response to a correction command of the offset adjusting circuit input by a user.
In one embodiment, the input signal is a dc voltage signal, and the input signal is provided by an external standard signal source.
302, when an input signal is received, configuring a bias value of a bias adjusting circuit according to a first preset rule to obtain a plurality of bias adjusting signals, wherein the bias adjusting signals correspond to the bias values of the bias adjusting circuit one to one; obtaining a plurality of first signals based on a current input signal and a plurality of offset adjustment signals; gain amplification is carried out on the plurality of first signals to obtain a plurality of first display signals; and searching a first display signal with the minimum absolute value of the voltage value in the plurality of first display signals, determining a corresponding offset adjusting signal based on the searched first display signal, namely obtaining a corresponding offset value, and taking the offset value as the offset value corresponding to the current input signal.
In one embodiment, configuring the bias value of the bias adjusting circuit according to a first preset rule includes:
acquiring the value range of the bias value of the bias adjusting circuit; and configuring the offset values in the value range one by one according to a preset sequence.
The offset adjustment circuit in this embodiment comprises a first digital to analog converter, the offset value being a codeword of the first digital to analog converter DAC 1.
In one embodiment, step 302 includes:
in step 3021, it is assumed that the currently received input signal is Vin1, Vin1 is a standard dc signal, and the initial value of the maximum codeword of the first DAC1 in the offset adjusting circuit is Code _ max0, and the initial value of the minimum codeword is Code _ min 0.
Step 3022, configuring a Code word Code _1= (Code _ max0+ Code _ min0)/2, and acquiring a voltage value of the first display signal at this time; updating the value range of the Code word to obtain a maximum value Code _ max1 and a minimum value Code _ min1 of the Code word after one-time updating, wherein if the voltage value of the first display signal is greater than 0, Code _ min1= (Code _ max0+ Code _ min0)/2, and Code _ max1= Code _ max 0; if the voltage value of the first display signal is less than 0, Code _ max1= (Code _ max0+ Code _ min0)/2, and Code _ min1= Code _ min 0.
Step 3023, continuing to configure the Code word Code _2= (Code _ max1+ Code _ min1)/2, and acquiring the voltage value of the first display signal at this time; updating the value range of the Code word to obtain a maximum value Code _ max2 and a minimum value Code _ min2 of the Code word after secondary updating, wherein if the voltage value of the first display signal is greater than 0, Code _ min2= (Code _ max1+ Code _ min1)/2, and Code _ max2= Code _ max 1; if the voltage value of the first display signal is less than 0, Code _ max2= (Code _ max1+ Code _ min1)/2, and Code _ min2= Code _ min 1.
And step 3024, repeating the above iteration calculation for m times, and obtaining a maximum value Code _ max and a minimum value Code _ min of the updated codewords for m times, to obtain a latest value range of the codewords, where z is the number of the codewords in the latest value range, and z = (Code _ max-Code _ min +1), and for a 12-or 16-bit first dac, z is preferably selected to be 8. Wherein m is an integer greater than 1 and less than n, and n is the number of bits of the first digital-to-analog converter.
Step 3025, for z codewords within the codeword value range, configuring the z codewords to the first digital-to-analog converter one by one, storing the voltage value of the display signal on the display screen after each codeword is configured, obtaining the voltage values of the z display signals, obtaining a codeword corresponding to the display signal with the smallest absolute value of the voltage values in the z display signals, and using the codeword as a codeword corresponding to the current input signal Vin 1.
Step 303, obtaining voltage values of a plurality of input signals of the input digital oscilloscope and corresponding offset values thereof.
In this embodiment, the external standard source continues to output the dc voltages Vin2 and Vin3 … Vinq to the digital oscilloscope, and the calculation processes in steps 3022 to 3025 are repeated for each input voltage, so that the voltage values of the plurality of input signals and the offset values corresponding to the voltage values (the code words of DAC1) can be obtained.
And 304, fitting to obtain an offset correction curve based on the voltage values of the plurality of input signals and the corresponding offset values.
For a recorded set of data (Code1_1, Vin1), ((Code1_2, Vin2)) … … (Code1_ q, Vinq), where Code1_ q represents the offset value (codeword of DAC1) of the offset adjustment circuit to which the input signal Vinq corresponds,linear fitting is carried out by adopting a least square method to obtain a bias correction curve
。
Referring to fig. 6, fig. 6 is a schematic diagram of an offset calibration curve according to an embodiment, in which the offset calibration curve reflects the relationship between the offset value (the codeword of DAC1) of the offset adjustment circuit and the external standard signal source. Therefore, the offset adjusting circuit corrected according to the offset correction curve can be equivalent to an internal standard source, and the vertical gear of the oscilloscope can be corrected by using the standard source.
Referring to fig. 7, fig. 7 is a flowchart of a vertical gear correction method according to an embodiment, wherein the step of correcting the vertical gear at S40 includes:
and step 401, responding to a correction instruction of a vertical gear position input by a user, cutting off an input signal, and configuring an attenuation multiple and a VGA fixed gain. At this time, the digital oscilloscope no longer receives the input signal input by the external standard signal source, and the digital oscilloscope provides the standard signal as the internal standard signal source through the bias adjusting circuit.
Step 402, configuring a plurality of selected vertical gears in sequence according to a preset sequence.
In the present embodiment, a plurality of vertical gear positions may be selected at equal intervals as the selected vertical gear position.
And 403, when any selected vertical gear is configured, configuring a VGA configuration value referred by the currently selected vertical gear, wherein the VGA configuration value is used for adjusting the adjustable gain of the adjustable gain amplifier, and the amplification gain of the adjustable gain amplifier comprises VGA fixed gain and adjustable gain.
In this embodiment the adjustable gain amplifier comprises a second digital to analog converter DAC2, the VGA configuration values being codewords of the second digital to analog converter DAC 2.
Assuming that the currently selected uncorrected vertical gear selected at this time is V1_ uncal/div, the default VGA fixed gain for this vertical gear is G1, and the variable gain is G1. The codeword (VGA configuration value) of the DAC2 on VGA corresponding to the variable gain g1 is Code _ VGA _ DAC 1.
And step 404, sequentially configuring a plurality of offset values of the offset adjusting circuit based on the offset correction curve.
In one embodiment, the correction is based on an offset correction curve
The controller configures m DAC1 codewords, m =5 in this embodiment, to the bias adjustment circuit.
In step 405, a standard offset adjustment signal is generated based on the offset calibration curve when any offset value is configured.
In the embodiment, for a series of DAC1 codewords x 0-x 5, the voltage values of the standard bias adjustment signals output by the corresponding bias adjustment circuits are y 0-y 5.
Step 406, adjusting the signal based on the current standard offset to obtain a second signal; and gain amplification is carried out on the second signal to obtain a second display signal.
Step 407, acquiring a voltage value of the second display signal and a voltage value of the standard bias adjustment signal; namely, the voltage values of the second display signals and the voltage values of the standard offset adjusting signals corresponding to the plurality of offset values are obtained.
In this embodiment, when the voltage values of the standard bias adjustment signals output by the bias adjustment circuit are y 0-y 5, the positions falling on the vertical direction of the display screen are + n2 div, + n1 div, + n0 div, -n3 div, -n4 div, respectively, as shown in fig. 8. At this time, the voltage values of the 5 corresponding display signals measured by the digital oscilloscope are + V2, + V1, + V0, -V3, -V4, respectively, and since V1_ uncal/div is not corrected, the voltage values of the 5 corresponding display signals are also inaccurate.
Step 408, fitting to obtain a correction curve of the currently selected vertical gear based on the voltage values of the current display signal and the standard offset adjustment signal corresponding to the plurality of offset values
。
This example was linearly fitted to (+ v2, y2), (+ v1, y1), (+ v0, y0), (-v3, y3), (-v4, y4) according to the least squares method to obtain the current valueCorrection curve for selected vertical gear
。
And step 409, correcting the currently selected vertical gear based on the correction curve of the currently selected vertical gear.
In one embodiment, correcting the currently selected vertical gear based on the correction curve for the currently selected vertical gear includes:
obtaining gear value of currently selected vertical gear
。
Correction curve based on currently selected vertical gear and gear value of currently selected vertical gear
Obtaining the corrected gear value of the currently selected vertical gear
And intercept
。
Obtaining the gear value after the correction of the currently selected vertical gear
The corresponding VGA configuration value Code VGA DAC 1.
Saving the corrected gear value of the currently selected vertical gear
The VGA configuration value Code _ VGA _ DAC1 and the intercept corresponding to the corrected gear position value
。
The present embodiment obtains the corrected gear value of the currently selected vertical gear according to the following formula:
wherein the content of the first and second substances,
the corrected gear value for the currently selected vertical gear,
the range value for the currently selected vertical range,
the slope of the correction curve for the currently selected vertical gear.
In one embodiment, the correction method further includes:
under the configuration of the same attenuation multiple and VGA fixed gain, one selected vertical gear is continuously selected as the current selected vertical gear
Repeating the steps 401 to 409 to obtain the corrected vertical gear position of
And intercept
Preservation of
Corresponding VGA configuration value Code VGA DAC2 and intercept
Wherein
For currently selected vertical gear
Of the calibration curveThe slope.
After the multiple selected vertical gears are sequentially configured in the preset sequence in step 402 are repeatedly corrected, the corresponding relationship between the gear values of the multiple groups of corrected selected vertical gears and the corresponding VGA configuration values can be obtained. Acquiring corrected gear values of a plurality of selected vertical gears and VGA configuration values corresponding to the corrected gear values; obtaining a corresponding relation list of the corrected gear position value and the VGA configuration value based on the corrected gear position value of the selected vertical gear positions and the VGA configuration value corresponding to the corrected gear position value; based on the corresponding relation list of the gear value and the VGA configuration value after correction, correcting any selected vertical gear; any one selected vertical gear does not belong to the selected vertical gears in the correspondence list.
For an ideal VGA, the variable gain g and the codeword of DAC2 are strictly linear, but there is a certain nonlinearity between them in the actual VGA, please refer to fig. 9, fig. 9 is a diagram illustrating the corresponding relationship between the variable gain g and the VGA configuration value, because the linearity of the variable gain g and the VGA configuration value (codeword of DAC2 on VGA) on VGA is not very good as a whole. Therefore, if only the coarse adjustment vertical gear of the digital oscilloscope is corrected or the fine adjustment vertical gear correction mode is not reasonable, the measurement accuracy of the digital oscilloscope cannot be ensured, and a larger measurement error is caused. In this regard, after the curve of the variable gain g and the VGA configuration value is cut into a small segment, the VGA configuration value and the variable gain g can be approximately linearly related in the small segment.
Thus, for any selected vertical gear selected
Assuming the selected vertical gear
In corrected vertical gear
And
in between, the embodiment adopts a linear interpolation method to calculate the selected vertical gear
For the corresponding VGA configuration value, the corresponding variable gain gselect is obtained. According to the corrected coordinates (
Code _ VGA _ DAC1) and (c)
Code _ VGA _ DAC2) to obtain the selected vertical gear according to the following two equations
VGA configuration value (codeword of DAC2 on VGA) Code _ VGA _ DACx and intercept bselect:
wherein the content of the first and second substances,
indicating vertical gear
The corresponding VGA configuration value is set to be,
indicating selected vertical gear
The intercept of the corresponding correction curve.
The method corrects the gain of the display signal at the selected vertical gear, however, the intercept in the above step
Intercept of
And intercept
Respectively selected vertical gear
、
And
a zero offset error of a display signal on the display screen when no signal is input in the vertical direction. To correct for this zero offset error, the present embodiment selects the vertical gear
For example, the correction method further includes:
correction curve based on currently selected vertical gear
Obtaining the intercept corresponding to the currently selected vertical gear
；
According to the intercept corresponding to the currently selected vertical gear
Determining a bias compensation value of a bias adjusting circuit;
offset compensation value x based on offset adjusting circuitoCorrecting an offset correction curve, wherein the corrected offset correction curve is y = k0(x-x0)+b0To correct the bias adjustment circuit.
The method corrects the selected vertical gear under a certain configured attenuation multiple and VGA fixed gain, switches the attenuation multiple and VGA fixed gain after the correction is completed, and repeats the steps until all the gears of the voltage under the attenuation multiple and VGA fixed gain are corrected.
Those skilled in the art will appreciate that all or part of the functions of the various methods in the above embodiments may be implemented by hardware, or may be implemented by computer programs. When all or part of the functions of the above embodiments are implemented by a computer program, the program may be stored in a computer-readable storage medium, and the storage medium may include: a read only memory, a random access memory, a magnetic disk, an optical disk, a hard disk, etc., and the program is executed by a computer to realize the above functions. For example, the program may be stored in a memory of the device, and when the program in the memory is executed by the processor, all or part of the functions described above may be implemented. In addition, when all or part of the functions in the above embodiments are implemented by a computer program, the program may be stored in a storage medium such as a server, another computer, a magnetic disk, an optical disk, a flash disk, or a removable hard disk, and may be downloaded or copied to a memory of a local device, or may be version-updated in a system of the local device, and when the program in the memory is executed by a processor, all or part of the functions in the above embodiments may be implemented.
The present invention has been described in terms of specific examples, which are provided to aid understanding of the invention and are not intended to be limiting. For a person skilled in the art to which the invention pertains, several simple deductions, modifications or substitutions may be made according to the idea of the invention.
Claims (10)
1. A vertical gear correction method for a digital oscilloscope, wherein the digital oscilloscope comprises a bias adjusting circuit for adjusting the bias position of a signal and an adjustable gain amplifier for amplifying the signal, the method is characterized by comprising the following steps:
correcting the bias adjusting circuit: receiving a plurality of input signals in response to a correction instruction of the bias adjusting circuit input by a user;
when an input signal is received, configuring the offset value of an offset adjusting circuit according to a first preset rule to obtain a plurality of offset adjusting signals, wherein the offset adjusting signals correspond to the offset values of the offset adjusting circuit one to one; obtaining a plurality of first signals based on a current input signal and a plurality of offset adjustment signals; gain amplification is carried out on the plurality of first signals to obtain a plurality of first display signals; searching a first display signal with the minimum absolute value of the voltage value in the plurality of first display signals, determining a corresponding offset adjusting signal based on the searched first display signal, namely obtaining a corresponding offset value, and taking the offset value as the offset value corresponding to the current input signal;
acquiring voltage values of a plurality of input signals input into the digital oscilloscope and corresponding offset values thereof;
fitting to obtain an offset correction curve based on the voltage values of the plurality of input signals and the offset values corresponding to the voltage values;
a vertical gear correction step: responding to a correction instruction of a vertical gear input by a user, cutting off an input signal, and configuring an attenuation multiple and VGA (video graphics array) fixed gain;
sequentially configuring a plurality of selected vertical gears according to a preset sequence;
when any selected vertical gear is configured, configuring a VGA configuration value referred by the currently selected vertical gear, wherein the VGA configuration value is used for adjusting the adjustable gain of an adjustable gain amplifier, and the amplification gain of the adjustable gain amplifier comprises VGA fixed gain and adjustable gain;
sequentially configuring a plurality of offset values of an offset adjusting circuit based on the offset correction curve;
when any offset value is configured, generating a standard offset adjusting signal based on the offset correction curve;
obtaining a second signal based on the current standard offset adjustment signal; gain amplification is carried out on the second signal to obtain a second display signal;
acquiring a voltage value of the second display signal and a voltage value of the standard bias adjusting signal; obtaining the voltage values of the second display signals and the voltage values of the standard bias adjusting signals corresponding to the plurality of bias values;
fitting to obtain a correction curve of the currently selected vertical gear based on the voltage values of the second display signals and the voltage values of the standard offset adjusting signals corresponding to the plurality of offset values;
and correcting the currently selected vertical gear based on the correction curve of the currently selected vertical gear.
2. The method of claim 1, wherein configuring the bias value of the bias adjustment circuit according to a first predetermined rule comprises:
acquiring the value range of the bias value of the bias adjusting circuit;
and allocating the bias values in the value range to the bias adjusting circuit one by one.
3. The method of claim 2, wherein the offset adjustment circuit includes a first digital-to-analog converter, the offset value being a codeword of the first digital-to-analog converter;
the adjustable gain amplifier comprises a second digital-to-analog converter, and the VGA configuration value is a code word of the second digital-to-analog converter.
4. The method of claim 3, wherein obtaining the range of values of the bias value of the bias adjustment circuit comprises:
acquiring an initial value range of the offset value of the offset adjusting circuit, namely acquiring an initial maximum value Code _ max0 and an initial minimum value Code _ min0 of the offset value;
configuring a bias value Code _1= (Code _ max0+ Code _ min0)/2, and acquiring a voltage value of the first display signal at the moment; updating the value range of the offset value to obtain a maximum value Code _ max1 and a minimum value Code _ min1 of the offset value after one-time updating, wherein if the voltage value of the first display signal is greater than 0, Code _ min1= (Code _ max0+ Code _ min0)/2, and Code _ max1= Code _ max 0; if the voltage value of the first display signal is less than 0, Code _ max1= (Code _ max0+ Code _ min0)/2, Code _ min1= Code _ min 0;
configuring a bias value Code _2= (Code _ max1+ Code _ min1)/2, and acquiring a voltage value of the first display signal at the moment; updating the value range of the offset value to obtain a maximum value Code _ max2 and a minimum value Code _ min2 of the offset value after the second update, wherein if the voltage value of the first display signal is greater than 0, Code _ min2= (Code _ max1+ Code _ min1)/2, and Code _ max2= Code _ max 1; if the voltage value of the first display signal is less than 0, Code _ max2= (Code _ max1+ Code _ min1)/2, Code _ min2= Code _ min 1;
……
after m iterations, a maximum value Code _ maxm and a minimum value Code _ minm of the m updated offset values are obtained, and a value range of the offset value is obtained, wherein m is an integer larger than 1 and smaller than n, and n is the digit of the first digital-to-analog converter.
5. The method of claim 1, wherein correcting the currently selected vertical gear based on the correction curve for the currently selected vertical gear comprises:
acquiring a gear value of a currently selected vertical gear;
acquiring a gear value corrected by the currently selected vertical gear based on the correction curve of the currently selected vertical gear and the gear value of the currently selected vertical gear;
acquiring a VGA configuration value corresponding to the gear value corrected by the currently selected vertical gear;
and saving the gear position value after the correction of the currently selected vertical gear position and the VGA configuration value corresponding to the gear position value after the correction.
6. The method of claim 5, wherein the method further comprises:
acquiring corrected gear values of a plurality of selected vertical gears and VGA configuration values corresponding to the corrected gear values;
obtaining a corresponding relation list of the corrected gear position value and the VGA configuration value based on the corrected gear position value of the selected vertical gear positions and the VGA configuration value corresponding to the corrected gear position value;
based on the corresponding relation list of the gear value and the VGA configuration value after correction, correcting any selected vertical gear; the any selected vertical gear does not belong to the selected vertical gears in the correspondence list.
7. The method of claim 5, wherein the method further comprises:
acquiring an intercept corresponding to the currently selected vertical gear based on the correction curve of the currently selected vertical gear;
determining a bias compensation value of a bias adjusting circuit according to an intercept corresponding to the currently selected vertical gear;
and modifying the offset correction curve based on the offset compensation value of the offset adjusting circuit so as to modify the offset adjusting circuit.
8. A digital oscilloscope, comprising:
an attenuation network for attenuating a received input signal;
the bias adjusting circuit is used for generating a bias adjusting signal, and the bias value of the bias adjusting circuit is related to the voltage value of the bias adjusting signal generated by the bias adjusting circuit;
the impedance transformation network is used for generating a VGA input signal according to the attenuated input signal and the bias adjusting signal;
the adjustable gain amplifier is used for performing gain amplification on the VGA input signal;
the analog-to-digital converter is used for performing analog-to-digital conversion on the signal output by the adjustable gain amplifier to obtain a display signal;
the display module is used for displaying the signal waveform and the voltage value of the display signal;
the controller is used for responding to a correction instruction of the bias adjusting circuit input by a user, receiving an input signal, and inputting the input signal into the digital oscilloscope according to a first preset rule;
when an input signal is received, configuring the offset value of an offset adjusting circuit according to a first preset rule to obtain a plurality of offset adjusting signals, wherein the offset adjusting signals correspond to the offset values of the offset adjusting circuit one to one; obtaining a plurality of first signals based on a current input signal and a plurality of offset adjustment signals; gain amplification is carried out on the plurality of first signals to obtain a plurality of first display signals; searching a first display signal with the minimum absolute value of the voltage value in the plurality of first display signals, determining a corresponding offset adjusting signal based on the searched first display signal, namely obtaining a corresponding offset value, and taking the offset value as the offset value corresponding to the current input signal;
the controller acquires voltage values of all input signals of the input digital oscilloscope and bias values corresponding to the voltage values;
based on the voltage values of all the input signals and the corresponding offset values thereof, the controller fits to obtain an offset correction curve;
the controller responds to a correction instruction of a vertical gear input by a user, cuts off an input signal, and configures an attenuation multiple and VGA fixed gain;
the controller is sequentially configured with a plurality of selected vertical gears according to a preset sequence;
when any selected vertical gear is configured, the controller configures a VGA configuration value referred by the currently selected vertical gear, wherein the VGA configuration value is used for adjusting the adjustable gain of the adjustable gain amplifier, and the amplification gain of the adjustable gain amplifier comprises VGA fixed gain and adjustable gain;
based on the offset correction curve, the controller sequentially configures a plurality of offset values of the offset adjusting circuit;
when any bias value is configured, the controller generates a standard bias adjusting signal based on the bias correction curve;
the controller obtains a second signal based on the current standard offset adjusting signal; gain amplification is carried out on the second signal to obtain a second display signal;
the controller acquires a voltage value of the second display signal and a voltage value of the standard bias adjusting signal; obtaining the voltage values of the second display signals and the voltage values of the standard bias adjusting signals corresponding to the plurality of bias values;
the controller fits to obtain a correction curve of the currently selected vertical gear based on the voltage values of the second display signals and the voltage values of the standard offset adjusting signals corresponding to the plurality of offset values;
the controller corrects the currently selected vertical gear based on the correction curve of the currently selected vertical gear.
9. The digital oscilloscope of claim 8, wherein configuring the bias value of the bias adjustment circuit according to a first predetermined rule comprises:
acquiring the value range of the bias value of the bias adjusting circuit;
allocating the bias values in the value range to the bias adjusting circuit one by one;
the obtaining of the value range of the bias value of the bias adjusting circuit includes:
acquiring an initial value range of the offset value of the offset adjusting circuit, namely acquiring an initial maximum value Code _ max0 and an initial minimum value Code _ min0 of the offset value;
configuring a bias value Code _1= (Code _ max0+ Code _ min0)/2, and acquiring a voltage value of the first display signal at the moment; updating the value range of the offset value to obtain a maximum value Code _ max1 and a minimum value Code _ min1 of the offset value after one-time updating, wherein if the voltage value of the first display signal is greater than 0, Code _ min1= (Code _ max0+ Code _ min0)/2, and Code _ max1= Code _ max 0; if the voltage value of the first display signal is less than 0, Code _ max1= (Code _ max0+ Code _ min0)/2, Code _ min1= Code _ min 0;
configuring a bias value Code _2= (Code _ max1+ Code _ min1)/2, and acquiring a voltage value of the first display signal at the moment; updating the value range of the offset value to obtain a maximum value Code _ max2 and a minimum value Code _ min2 of the offset value after the second update, wherein if the voltage value of the first display signal is greater than 0, Code _ min2= (Code _ max1+ Code _ min1)/2, and Code _ max2= Code _ max 1; if the voltage value of the first display signal is less than 0, Code _ max2= (Code _ max1+ Code _ min1)/2, Code _ min2= Code _ min 1;
……
after m iterations, obtaining a maximum value Code _ maxm and a minimum value Code _ minm of the m updated offset values, namely obtaining a value range of the offset values, wherein m is an integer larger than 1 and smaller than n, and n is the digit of the first digital-to-analog converter;
the offset adjusting circuit comprises a first digital-to-analog converter, and the offset value is a code word of the first digital-to-analog converter.
10. A digital oscilloscope, comprising:
an attenuation network for attenuating a received input signal;
the bias adjusting circuit is used for generating a bias adjusting signal, and the bias value of the bias adjusting circuit is related to the voltage value of the bias adjusting signal generated by the bias adjusting circuit;
the impedance transformation network is used for generating a VGA input signal according to the attenuated input signal and the bias adjusting signal;
the adjustable gain amplifier is used for performing gain amplification on the VGA input signal;
the analog-to-digital converter is used for performing analog-to-digital conversion on the signal output by the adjustable gain amplifier to obtain a display signal;
the display module is used for displaying the signal waveform and the voltage value of the display signal;
a controller for execution to implement the method of any one of claims 1 to 7.
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| CN112904258A (en) * | 2021-02-08 | 2021-06-04 | 优利德科技(中国)股份有限公司 | Multi-stage bias correction method and device based on dynamic target value evaluation |
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