CN105529338A - 阵列基板、覆晶薄膜、显示面板及显示装置 - Google Patents

阵列基板、覆晶薄膜、显示面板及显示装置 Download PDF

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CN105529338A
CN105529338A CN201610083954.2A CN201610083954A CN105529338A CN 105529338 A CN105529338 A CN 105529338A CN 201610083954 A CN201610083954 A CN 201610083954A CN 105529338 A CN105529338 A CN 105529338A
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pad
array base
base palte
brilliant film
viewing area
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李红
陈立强
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BOE Technology Group Co Ltd
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Priority to PCT/CN2016/080646 priority patent/WO2017133089A1/zh
Priority to US15/538,712 priority patent/US10784187B2/en
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Abstract

本发明提供一种阵列基板、覆晶薄膜、显示面板及显示装置,属于显示技术领域,其可解决现有的阵列基板变形后其上的焊盘与覆晶薄膜上的焊盘对位不准的问题。本发明的显示面板,包括阵列基板和覆晶薄膜,所述阵列基板包括多个第一焊盘,所述覆晶薄膜包括多个第二焊盘,所述阵列基板通过所述第一焊盘与所述覆晶薄膜的所述第二焊盘绑定在一起,多个所述第一焊盘围绕着所述阵列基板的显示区排布,且所述第一焊盘的长度方向朝向所述显示区;多个所述第二焊盘按照多个所述第一焊盘的排布方式设置在所述覆晶薄膜上。本发明可用于柔性显示中。

Description

阵列基板、覆晶薄膜、显示面板及显示装置
技术领域
本发明属于显示技术领域,具体涉及一种阵列基板、覆晶薄膜、显示面板及显示装置。
背景技术
平板显示器为目前主要流行的显示器,其因为具有外形轻薄、省电以及无辐射等特点而被广泛地应用于电脑屏幕、移动电话等电子产品上。
显示装置主要包括彩膜基板、阵列基板、覆晶薄膜(COF,ChipOnFilm);其中,阵列基板具有用于进行显示的显示区和位于显示区***的绑定区(Bonding区),显示区中引线的端头(也即焊盘)位于连接区中;覆晶薄膜一面设有引线和芯片,覆晶薄膜上的引线一端与芯片连接,另一端上同样具有焊盘,用于与显阵列基板上绑定区的焊盘进行绑定,将芯片所提供的信号通过引线传输给阵列基板上的引线,以使显示区进行显示。
发明人发现现有技术中至少存在如下问题:当阵列基板为柔性阵列基板时,即阵列基板的基底常采用柔性材料,例如PI、PET等有机材料制成时,在其上形成其他膜层,以及刻蚀过孔时,会导致柔性基底变形,此时将覆晶薄膜上的焊盘与阵列基板上的焊盘进行绑定时,容易造成对位不准以及错位,致使两者绑定不牢固或者相邻焊盘之间发生短路的现象。
发明内容
本发明所要解决的技术问题包括,针对现有的显示装置存在的上述问题,提供一种兼容阵列基板膨胀和收缩变化的阵列基板、覆晶薄膜、显示面板及显示装置。
解决本发明技术问题所采用的技术方案是一种阵列基板,包括多个第一焊盘,多个所述第一焊盘围绕着所述阵列基板的显示区排布,且所述第一焊盘的长度方向朝向所述显示区。
优选的是,多个所述第一焊盘围绕着阵列基板的显示区均匀排布。
优选的是,所述阵列基板的基底为柔性基底。
优选的是,所述阵列基板的显示区为圆形、矩形、正多边形中任意一种。
解决本发明技术问题所采用的技术方案是一种覆晶薄膜,包括多个第二焊盘,多个所述第二焊盘呈环形排布,且所述第二焊盘的长度方向朝向所述环形排布的中心区。
优选的是,多个所述第二焊盘呈环形均匀排布。
优选的是,该覆晶薄膜还包括相对设置的第一驱动器和第二驱动器,以及多条引线;每个第二焊盘连接一条所述引线;其中一部分所述引线与第一驱动器连接,另一部分引线与所述第二驱动器连接。
优选的是,该覆晶薄膜还包括驱动器和多条引线;其中,每个第二焊盘连接一条所述引线,各个所述引线均与所述驱动器连接。
解决本发明技术问题所采用的技术方案是一种显示面板,包括阵列基板和覆晶薄膜,所述阵列基板包括多个第一焊盘,所述覆晶薄膜包括多个第二焊盘,所述阵列基板通过所述第一焊盘与所述覆晶薄膜的所述第二焊盘绑定在一起,多个所述第一焊盘围绕着所述阵列基板的显示区排布,且所述第一焊盘的长度方向朝向所述显示区;多个所述第二焊盘按照多个所述第一焊盘的排布方式设置在所述覆晶薄膜上。
解决本发明技术问题所采用的技术方案是一种显示装置,其包括上述的显示面板。
本发明的显示面板,包括阵列基板和覆晶薄膜,所述阵列基板包括多个第一焊盘,所述覆晶薄膜包括多个第二焊盘,所述阵列基板通过所述第一焊盘与所述覆晶薄膜的所述第二焊盘绑定在一起,多个所述第一焊盘围绕着所述阵列基板的显示区排布,且所述第一焊盘的长度方向朝向所述显示区;多个所述第二焊盘按照多个所述第一焊盘的排布方式设置在所述覆晶薄膜上。因此,无论阵列基板发生向外扩还是向内缩的形变,都可以保证足够的绑定位置,以使第一焊盘与第二焊盘仍然可以很好的绑定在一起。
附图说明
图1为本发明的实施例1的阵列基板的结构示意图;
图2为本发明的实施例1的阵列基板第一种情况变形后与覆晶薄膜的位置关系的示意图;
图3为本发明的实施例1的阵列基板第二种情况变形后与覆晶薄膜的位置关系的示意图;
图4为本发明的实施例1的阵列基板第三种情况变形后与覆晶薄膜的位置关系的示意图;
图5为本发明的实施例1的阵列基板第四种情况变形后与覆晶薄膜的位置关系的示意图;
图6为本发明的实施例1的阵列基板第五种情况变形后与覆晶薄膜的位置关系的示意图;
图7为本发明的实施例1的覆晶薄膜的单侧外接引线的示意图;
图8为本发明的实施例1的覆晶薄膜的双侧外接引线的示意图。
其中附图标记为:1、第一焊盘;2、第二焊盘;3、引线;4、驱动器;41、第一驱动器;42、第二驱动器;Q1、显示区;Q2、绑定区。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案,下面结合附图和具体实施方式对本发明作进一步详细描述。
实施例1:
结合图1-8所示,本实施例提供一种显示面板,包括阵列基板和覆晶薄膜;其中,阵列基板具有用于显示的显示区Q1,以及位于显示区Q1周边的绑定区Q2,在绑定区Q2设置有多个第一焊盘1,这多个第一焊盘1环绕显示区Q1排布,并且第一焊盘1的长度方向朝向显示区Q1。相应的覆晶薄膜上包括与第一焊盘1排布方式相同的第二焊盘2,也即第二焊盘2呈环形排布,且第二焊盘2的长度方向朝向环形排布的中心区。
本实施例中阵列基板上的第一焊盘1和覆晶薄膜上的第二焊盘2采用围绕显示区Q1环形排布方式,且其长度方向朝向显示区Q1,可以有效的改善由于阵列基板在制备过程中出现的向外扩张或者向内收缩的变形,导致的第一焊盘1和第二焊盘2绑定不良的问题。具体结合几下四种情况进行说明。
第一种情况,如图2所示,阵列基板发生均匀的变形,当发生均匀的向外扩张时,也就是说阵列基板上的第一焊盘1相对于覆晶薄膜上的第二焊盘2向外错位出去部分结构,但是不难看出的是,由于第一焊盘1和第二焊盘2呈环形设计且其长度方向朝向显示区,阵列基板是均匀变形的,因此,各个第一焊盘1大部分结构还是与其对应的第二焊盘2绑定的,从而不会影响第一焊盘1与第二焊盘2绑定的牢固性。
第二种情况,如图3所示,阵列基板发生均匀的变形,当发生均匀的向内收缩时,也就是说阵列基板上的第一焊盘1相对于覆晶薄膜上的第二焊盘2向内错位出去部分结构,但是不难看出的是,由于第一焊盘1和第二焊盘2呈环形设计且其长度方向朝向显示区,阵列基板是均匀变形的,因此,各个第一焊盘1大部分结构还是与其对应的第二焊盘2绑定的,从而不会影响第一焊盘1与第二焊盘2绑定的牢固性。
第三种情况,如图4所示,阵列基板发生不均匀的变形,当阵列基板发生沿X方向(行方向)上的向外扩张时,从图中不难看出的是,虽然在X方向上第一焊盘1与第二焊盘2会发生错位,但是仍然大部分结构是绑定在一起的,而且其他位置的第一焊盘1和第二焊盘2即使发生了错位,但是错位的位置也是非常的小,故不会影响第一焊盘1和第二焊盘2绑定的牢固性。
第四种情况,如图5所示,阵列基板发生不均匀的变形,当阵列基板发生沿X方向(行方向)上的向内收缩时,从图中不难看出的是,虽然在X方向上第一焊盘1与第二焊盘2会发生错位,但是仍然大部分结构是绑定在一起的,而且其他位置的第一焊盘1和第二焊盘2即使发生了错位,但是错位的位置也是非常的小,故不会影响第一焊盘1和第二焊盘2绑定的牢固性。
第五种情况,如图6所示,阵列基板发生不同程度的变形,例如当阵列基板发生沿X方向(行方向)上的向外扩张,以及沿Y方向(列方向)上向内收缩时,从图中不难看出的是,虽然在X和Y方向上第一焊盘1与第二焊盘2会发生错位,但是仍然大部分结构是绑定在一起的,而且其他位置的第一焊盘1和第二焊盘2即使发生了错位,但是错位的位置也是非常的小,故不会影响第一焊盘1和第二焊盘2绑定的牢固性。
在此需要说明的是,在图2-6中的虚线位置不仅表示第二焊盘2的排布位置,而且代表了阵列基板在未变形时显示区Q1以及第一焊盘1的位置。
以上例子示意显示装置的显示区Q1为圆形进行说明的,同理显示区Q1的形状也可以为矩形或者各种正多边形;也可以是任意形状。
而且本实施例特别适用与柔性显示中,即阵列基板的基底采用柔性材料制备。当然一般的显示装置也是可以的。
其中,阵列基板上的第一焊盘1和覆晶薄膜上的第二焊盘2均是均匀的排布环绕在显示区Q1的。这样的设置方式,有助于在阵列基板发生变形时,使得第一焊盘1与第二焊盘2即使发生错位也可以很好的绑定在一起。
其中,覆晶薄膜上还包括设置有驱动器(DriveIC),以及多条引线3,其中每一条引线3的一端连接一个第二焊盘2,另一端则连接驱动器4的一个管脚,覆晶薄膜上可以包括一个驱动器4,也可以包括两个驱动器4,如图7所示,当覆晶薄膜上包括一个驱动器4时,引线3的接入方式则为单侧外接引线3。如图8所示,当覆晶薄膜上包括两个驱动器时,即两相对设置的第一驱动器41和第二驱动器42,此时一部分所述引线3与第一驱动器41连接,另一部分引线3与所述第二驱动器42连接,引线3的接入方式为两侧外接。
实施例2:
本实施例提供一种显示装置,其包括实施例1中的显示面板。
其中,显示装置可以为液晶显示装置、OLED显示装置、电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本实施例中的显示装置具有较好良率。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。

Claims (10)

1.一种阵列基板,包括多个第一焊盘,其特征在于,多个所述第一焊盘围绕着所述阵列基板的显示区排布,且所述第一焊盘的长度方向朝向所述显示区。
2.根据权利要求1所述的阵列基板,其特征在于,多个所述第一焊盘围绕着阵列基板的显示区均匀排布。
3.根据权利要求1所述的阵列基板,其特征在于,所述阵列基板的基底为柔性基底。
4.根据权利要求1所述的阵列基板,其特征在于,所述阵列基板的显示区为圆形、矩形、正多边形中任意一种。
5.一种覆晶薄膜,包括多个第二焊盘,其特征在于,多个所述第二焊盘呈环形排布,且所述第二焊盘的长度方向朝向所述环形排布的中心区。
6.根据权利要求5所述的覆晶薄膜,其特征在于,多个所述第二焊盘呈环形均匀排布。
7.根据权利要求5所述的覆晶薄膜,其特征在于,还包括相对设置的第一驱动器和第二驱动器,以及多条引线;每个第二焊盘连接一条所述引线;其中一部分所述引线与第一驱动器连接,另一部分引线与所述第二驱动器连接。
8.根据权利要求5所述的覆晶薄膜,其特征在于,还包括驱动器和多条引线;其中,每个第二焊盘连接一条所述引线,各个所述引线均与所述驱动器连接。
9.一种显示面板,包括阵列基板和覆晶薄膜,所述阵列基板包括多个第一焊盘,所述覆晶薄膜包括多个第二焊盘,所述阵列基板通过所述第一焊盘与所述覆晶薄膜的所述第二焊盘绑定在一起,其特征在于,多个所述第一焊盘围绕着所述阵列基板的显示区排布,且所述第一焊盘的长度方向朝向所述显示区;多个所述第二焊盘按照多个所述第一焊盘的排布方式设置在所述覆晶薄膜上。
10.一种显示装置,其特征在于,所述显示装置包括权利要求9所述的显示面板。
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017133089A1 (zh) * 2016-02-06 2017-08-10 京东方科技集团股份有限公司 阵列基板、覆晶薄膜、显示面板及显示装置
CN108828856A (zh) * 2018-06-25 2018-11-16 惠科股份有限公司 一种阵列基板及显示面板
CN109087589A (zh) * 2018-10-22 2018-12-25 惠科股份有限公司 阵列基板、显示面板及显示装置
CN109686249A (zh) * 2018-12-17 2019-04-26 武汉华星光电半导体显示技术有限公司 基于异性切割技术的可穿戴设备及其制备方法
CN110136589A (zh) * 2019-06-28 2019-08-16 武汉天马微电子有限公司 一种显示面板、其制作方法及显示装置
WO2020253427A1 (zh) * 2019-06-21 2020-12-24 京东方科技集团股份有限公司 显示装置及电子器件

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1827062A2 (en) * 2006-02-27 2007-08-29 Denso Corporation Electronic device
CN102346321A (zh) * 2011-07-05 2012-02-08 友达光电股份有限公司 显示面板及显示面板的母版的切割方法
CN203365865U (zh) * 2013-07-04 2013-12-25 京东方科技集团股份有限公司 一种阵列基板、覆晶薄膜和显示装置
CN104780751A (zh) * 2014-01-14 2015-07-15 三星显示有限公司 用于安装柔性印刷电路板的安装装置及安装方法
CN205406520U (zh) * 2016-02-06 2016-07-27 京东方科技集团股份有限公司 阵列基板、覆晶薄膜、显示面板及显示装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4480348B2 (ja) * 2003-05-30 2010-06-16 日立プラズマディスプレイ株式会社 プラズマディスプレイ装置
JP2005136017A (ja) * 2003-10-29 2005-05-26 Hitachi Displays Ltd 表示装置
KR101127847B1 (ko) * 2005-06-28 2012-03-21 엘지디스플레이 주식회사 라인 온 글래스형 액정표시장치
TWI395037B (zh) * 2008-10-13 2013-05-01 Prime View Int Co Ltd 主動元件陣列基板及其檢測方法
TWI431573B (zh) * 2009-04-22 2014-03-21 Prime View Int Co Ltd 可撓性電極陣列基板與可撓性顯示器
TWI454708B (zh) * 2010-08-31 2014-10-01 Can be adapted to different specifications of the test machine probe card structure
WO2013115086A1 (ja) * 2012-02-03 2013-08-08 シャープ株式会社 表示装置及びテレビ受信装置
CN102738078B (zh) * 2012-06-21 2014-11-12 京东方科技集团股份有限公司 柔性显示基板的制作方法
CN104681507A (zh) 2013-12-03 2015-06-03 上海北京大学微电子研究院 圆形qfn封装结构
KR102114319B1 (ko) * 2014-01-22 2020-05-25 삼성디스플레이 주식회사 디스플레이 장치
CN106796772A (zh) * 2014-05-30 2017-05-31 可隆奥托株式会社 圆形显示设备及其制造方法
KR102162257B1 (ko) * 2014-07-31 2020-10-07 엘지디스플레이 주식회사 디스플레이 장치
KR102276995B1 (ko) * 2015-02-12 2021-07-21 삼성디스플레이 주식회사 비사각형 디스플레이
CN204855999U (zh) 2015-08-26 2015-12-09 昆山龙腾光电有限公司 异形显示装置
CN105529338A (zh) 2016-02-06 2016-04-27 京东方科技集团股份有限公司 阵列基板、覆晶薄膜、显示面板及显示装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1827062A2 (en) * 2006-02-27 2007-08-29 Denso Corporation Electronic device
CN102346321A (zh) * 2011-07-05 2012-02-08 友达光电股份有限公司 显示面板及显示面板的母版的切割方法
CN203365865U (zh) * 2013-07-04 2013-12-25 京东方科技集团股份有限公司 一种阵列基板、覆晶薄膜和显示装置
CN104780751A (zh) * 2014-01-14 2015-07-15 三星显示有限公司 用于安装柔性印刷电路板的安装装置及安装方法
CN205406520U (zh) * 2016-02-06 2016-07-27 京东方科技集团股份有限公司 阵列基板、覆晶薄膜、显示面板及显示装置

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017133089A1 (zh) * 2016-02-06 2017-08-10 京东方科技集团股份有限公司 阵列基板、覆晶薄膜、显示面板及显示装置
US10784187B2 (en) 2016-02-06 2020-09-22 Boe Technology Group Co., Ltd. Array substrate, chip on film, display panel and display device
CN108828856A (zh) * 2018-06-25 2018-11-16 惠科股份有限公司 一种阵列基板及显示面板
CN108828856B (zh) * 2018-06-25 2021-05-14 惠科股份有限公司 一种阵列基板及显示面板
CN109087589A (zh) * 2018-10-22 2018-12-25 惠科股份有限公司 阵列基板、显示面板及显示装置
CN109087589B (zh) * 2018-10-22 2021-06-18 惠科股份有限公司 阵列基板、显示面板及显示装置
US11355523B2 (en) 2018-10-22 2022-06-07 HKC Corporation Limited Array substrate, display panel, and display device
CN109686249A (zh) * 2018-12-17 2019-04-26 武汉华星光电半导体显示技术有限公司 基于异性切割技术的可穿戴设备及其制备方法
US11367843B2 (en) 2018-12-17 2022-06-21 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Wearable device based on free shape cutting technique and preparation method thereof
WO2020253427A1 (zh) * 2019-06-21 2020-12-24 京东方科技集团股份有限公司 显示装置及电子器件
US11329038B2 (en) 2019-06-21 2022-05-10 Boe Technology Group Co., Ltd. Display device and electronic equipment
CN110136589A (zh) * 2019-06-28 2019-08-16 武汉天马微电子有限公司 一种显示面板、其制作方法及显示装置

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