CN105516041A - Adaptive digital demodulation system at low signal to noise ratio - Google Patents
Adaptive digital demodulation system at low signal to noise ratio Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/22—Demodulator circuits; Receiver circuits
- H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
- H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
- H04L27/2272—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals using phase locked loops
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Abstract
The invention provides an adaptive digital demodulation system at a low signal to noise ratio. The adaptive digital demodulation system comprises a digital down conversion module, a speed detection module, a carrier phase lock loop, a locking detection module, a matched filtering module, a bit synchronization ring module and a data decision module. The adaptive digital demodulation system realizes a fast digital demodulation system with a low error rate and low dissipation under the adverse conditions of low signal to noise ratio and high dynamic coexistence, lower complexity is adopted, the storage space of a large amount of hardware is saved, the adaptive digital demodulation system provided by the invention can quickly and adaptively detect the speed and recover the carrier in a multi-speed mode, the carrier phase lock loop adopts a gradually varied loop bandwidth, the loop bandwidth is gradually decreased with the increase of the loop updating time to improve the looking speed and the stability of the loop, and finally, in cooperation with a Gardener timing synchronization method, the demodulation system with low signal to noise ratio and high dynamism is completed.
Description
Technical field
The present invention relates to digital transponder technical field, particularly adaptive digital demodulating system under a kind of low signal-to-noise ratio.
Background technology
Along with the development of communication technology of satellite, more and more higher requirement is proposed to the demodulation techniques under low signal-to-noise ratio, especially the TTC & DT Systems in deep space field, have extremely remote, overlength time delay, the features such as pole weak signal, noise jamming is very serious, in order to effective, remote small-signal is extracted from noise, require receiving equipment to have very high sensitivity and improve signal to noise ratio ability to carry out demodulation under Arctic ice area condition, simultaneously due to the existence of Doppler frequency shift in space link, require that receiving system has higher dynamic, can be quick, carry out carrier phase estimation and recovery accurately.
The difficult point of low signal-to-noise ratio demodulation is carrier auxiliary, although carrier synchronization theoretical research comparative maturity, engineer applied are also very general, but under the unfavorable conditions that low signal-to-noise ratio and height dynamically coexist, realize fast, low error rate and low-loss demodulating system, but also the memory space of complexity and hardware will be taken into account, there is higher difficulty and challenge.
Also do not have under multi-rate modes, can to realize can carrying out adaptive detection rates comparatively fast and accurately in this field and the demodulating system of carrying out carrier auxiliary at present.
Summary of the invention
The object of the present invention is to provide adaptive digital demodulating system under a kind of low signal-to-noise ratio, can not under multi-rate modes to solve existing digital demodulation system, carry out adaptive detection rates fast and accurately and carry out the problem of carrier auxiliary.
For achieving the above object, the invention provides adaptive digital demodulating system under a kind of low signal-to-noise ratio, comprising:
Digital Down Converter Module, for receiving signal to be demodulated, and is undertaken signal to be demodulated reducing sample rate process and the baseband signal obtaining transmission;
Rate detection module, for the transmission rate of the baseband signal that self-adapting detecting Digital Down Converter Module obtains;
Carrier phase-locked loop road, the transmission rate obtained for the baseband signal that obtains according to Digital Down Converter Module and rate detection module is fixed the carrier auxiliary of speed, obtains accurate baseband signal;
Lock-in detection module, for carrying out integral processing and judge whether to lock described accurate baseband signal according to integral result the I tributary signal in described accurate baseband signal, Q tributary signal, and exporting lock indication signal;
Matched filtering module, after receiving described locking signal, for the baseband signal of demodulation being averaged, the signal input bit synchronization ring module after being averaged synchronously processes, and obtains synchronizing signal;
Data decision module, for adjudicating described synchronizing signal and exporting the bit sequence after demodulation.
Preferably, also comprise clock module, described clock module is used for providing standard clock signal for described Digital Down Converter Module, rate detection module and bit synchronization ring module.
Preferably, described Digital Down Converter Module comprises CIC extracting unit, band pass filter, multiplier, low pass filter, the signal to be demodulated received reduces sample rate by described CIC extracting unit, the carrier multiplication that the Received signal strength reducing sample rate is produced by described multiplier and local oscillation signal, the signal after being multiplied carries out filtering respectively by several low pass filters and exports the baseband signal of some groups of speed to be detected.
Preferably, the quantity of described low pass filter equals the kind number of the transmission rate of baseband signal, and the bandwidth of each described low pass filter is the bandwidth of baseband signal corresponding with it.
Preferably, when the speed kind number sent when making a start is more, the bandwidth correspondence with the baseband signal of neighboring transmission speed adopts a low pass filter, and by this low pass filter, to the baseband signal of adjacent bandwidths, it carries out filtering.
Preferably, described rate detection module comprises band pass filter, low pass filter, the first amplitude evaluation unit, the second amplitude evaluation unit, the first power calculation unit, the second power calculation unit and contrast decision unit;
Baseband signal inputs described band pass filter and low pass filter respectively, signal after described band-pass filter calculates through described first amplitude evaluation unit amplitude of carrying out and tries to achieve the first performance number by described first power calculation unit again, the filtered signal of described low pass filter calculates through described second amplitude evaluation unit amplitude of carrying out and tries to achieve the second performance number by described second power calculation unit again, and described first performance number and described second performance number input described decision unit and carry out contrast and adjudicate;
If described first performance number is greater than described second performance number, then the speed of the baseband signal inputted is as the bit rate of current detection passage, and now described decision unit exports is 1, otherwise described decision unit to export be 0.
Preferably, described carrier phase-locked loop road comprises a variable bandwidth loop filter, and described variable bandwidth loop filter shortens loop noise bandwidth gradually with the cumulative of update time of loop, makes described carrier phase-locked loop road obtain accurate baseband signal fast.
Preferably, described lock-in detection module obtains I branch road integrated value and Q branch road integrated value to the I tributary signal in described accurate baseband signal, Q tributary signal after carrying out integral processing, when I branch road integrated value is greater than Q branch road integrated value and I branch road integrated value is greater than predetermined lock-in threshold, then export lock indication signal.
Preferably, described bit synchronization ring module is specially a symbol synchronization loop, described symbol synchronization loop comprises Gardner phase discriminator and clock adjusting module, demodulating data inputs described clock adjusting module after inputting described Gardner phase discriminator again, and clock adjusting module output signal inputs described Gardner phase discriminator more simultaneously and carries out synchronization decisions and export synchronizing signal with demodulating data.
Preferably, the filter for filtering in system is higher order filter, and described higher order filter is realized by parallel search table, and by realizing arrowband high-grade filting by organizing look-up table results added more.。
The present invention gives adaptive digital demodulating system under a kind of low signal-to-noise ratio, under multi-rate modes, can adaptive detection rates carry out carrier auxiliary; Carrier phase-locked loop road have employed the loop bandwidth of gradual change, along with the increase of loop update time shortens loop bandwidth gradually, improves lock speed and the loop stability of loop; Coordinate Gardener timing synchronization algorithm again, make demodulating system loss reach minimum, complete low signal-to-noise ratio high dynamically under demodulating system.
Under the unfavorable conditions that this system dynamically coexists at low signal-to-noise ratio and height, achieve fast, low error rate and low-loss demodulating system, and while have employed lower complexity, save the memory space of a large amount of hardware,
Accompanying drawing explanation
Fig. 1 is adaptive digital demodulating system composition structural representation under low signal-to-noise ratio of the present invention;
Fig. 2 is Digital Down Converter Module provided by the invention composition schematic diagram;
Fig. 3 is rate detection module provided by the invention composition schematic diagram;
Fig. 4 is carrier phase-locked loop road provided by the invention composition schematic diagram;
Fig. 5 is that bit synchronization ring module provided by the invention specifically forms schematic diagram;
Fig. 6 A is higher order filter equivalent schematic provided by the invention;
Fig. 6 B is high-grade filting implement body provided by the invention composition schematic diagram.
Embodiment
For better the present invention being described, hereby with a preferred embodiment, and accompanying drawing is coordinated to elaborate to the present invention, specific as follows:
As shown in Figure 1, adaptive digital demodulating system under low signal-to-noise ratio provided by the invention, comprising:
Digital Down Converter Module 10, for receiving signal to be demodulated, and is undertaken signal to be demodulated reducing sample rate process and the baseband signal obtaining transmission;
Rate detection module 20, for the transmission rate of the baseband signal that self-adapting detecting Digital Down Converter Module 10 obtains;
Carrier phase-locked loop road 30, the transmission rate obtained for the baseband signal that obtains according to Digital Down Converter Module 10 and rate detection module is fixed the carrier auxiliary of speed, obtains accurate baseband signal;
Lock-in detection module 40, for carrying out integral processing and judge whether to lock described accurate baseband signal according to integral result the I tributary signal in described accurate baseband signal, Q tributary signal, and exporting lock indication signal;
Matched filtering module 50, after receiving described locking signal, for the baseband signal of demodulation being averaged, the signal input bit synchronization ring module 60 after being averaged synchronously processes, and obtains synchronizing signal;
Data decision module 70, for adjudicating described synchronizing signal and exporting the bit sequence after demodulation.
Clock module 80, clock module 80 is for providing standard clock signal for described Digital Down Converter Module 10, rate detection module 20 and bit synchronization ring module 60.
This system also comprises timing adjustment module 90, carries out timing adjustment for the synchronous situation according to bit synchronization module to clock module.
As shown in Figure 2, Digital Down Converter Module 10 comprises CIC extracting unit 11, band pass filter 12, multiplier 131 and multiplier 132, low pass filter 1 ~ N, the signal to be demodulated received reduces sample rate by CIC extracting unit 11, the carrier multiplication that the Received signal strength reducing sample rate is produced by multiplier 13 and local oscillation signal, the signal after being multiplied reverts to the baseband signal of transmission by low pass filter 1 ~ N filtering.
Wherein, the quantity of low pass filter can be set to identical with the quantity of the transmission rate of baseband signal, and the bandwidth of each described low pass filter is the bandwidth of baseband signal corresponding with it.The speed that may send if make a start is more, and in order to save hardware resource, the signal to be detected that after down-conversion, transmission rate is adjacent adopts a low pass filter, carries out filtering by this low pass filter to the baseband signal of adjacent bandwidths.
Particularly, in the present embodiment, set detectable character rate and have M*N kind, then the number of low pass filter is M*N, when hardware resource has in limited time, the adjacent low pass filter needed for detection rates of every M kind can with a realization, then the number of low pass filter is N.In order to ensure the performance of filter, share the quantity detected unsuitable many.Ensure that data sampling rate that each passage exports is that doubly (in the present invention, K value takes off the ratio of the maximum possible bit rate of frequency-change sampling rate and transmission for the K of the speed that this passage capable of being detects by extracting, therefore the passage detecting more low bit rate rate realizes exporting the symbol sampler rate that data are error detecting code speed K times by extracting), namely follow-up rate detection and demodulation signal processing all complete under the symbol sampler rate of K times.As seen from Figure 1 when M=2, the signal to be detected of every 2 kinds of neighboring transmission speed shares a low pass filter, and the speed that can detect altogether has 2*N kind, and port number is N, and each passage has 2 road I, Q data to be detected.
As shown in Figure 3, rate detection module 20 comprises band pass filter 21, low pass filter 22, first amplitude evaluation unit 23, second amplitude evaluation unit 24, first power calculation unit 25, second power calculation unit 26 and contrast decision unit 27;
The I circuit-switched data signal of baseband signal and Q circuit-switched data signal input tape bandpass filter 21 and low pass filter 22 respectively, the filtered signal of band pass filter 21 calculates through the first amplitude evaluation unit 23 amplitude of carrying out and tries to achieve the first performance number by described first power calculation unit 25 again, the filtered signal of low pass filter 22 calculates through described second amplitude evaluation unit 24 amplitude of carrying out and tries to achieve the second performance number by the second power calculation unit 26 again, and the first performance number and described second performance number input decision unit 27 and carry out contrast and adjudicate;
If the first performance number is greater than the second performance number, then think that the speed of the baseband signal inputted is the bit rate of current detection passage, now decision unit 27 exports is 1, otherwise decision unit 27 output is 0.
As shown in Figure 4, carrier phase-locked loop road 30 comprises a variable bandwidth loop filter, and variable bandwidth loop filter shortens loop noise bandwidth gradually with the cumulative of update time of loop, makes described carrier phase-locked loop road obtain accurate baseband signal fast.
Carrier phase-locked loop road overall structure see Fig. 4, wherein, if carrier-suppressed double sideband signal is: s (t)=m (t) cos ω
ct, then
After low pass filter,
Multiplier exports:
If phase difference θ is very little, then
This signal contains the phase difference of carrier wave and voltage controlled oscillator output signal, therefore namely can be exchanged into the control voltage of voltage controlled oscillator through loop filter, to produce carrier wave with oscillator signal frequently.
According to the many grades of loop noise bandwidth Wn that demodulation signal-to-noise ratio settings is descending, respective loops filter coefficient Ga, Gb can be obtained by the known Wn of determining of above formula, then along with the increase of phase-locked loop update time, choose different loop filter coefficients, the phase-locked loop shortening loop noise bandwidth gradually can be realized.
Lock-in detection module 40 obtains I branch road integrated value and Q branch road integrated value to the I tributary signal in above-mentioned accurate baseband signal, Q tributary signal after carrying out integral processing, when I branch road integrated value is greater than Q branch road integrated value and I branch road integrated value is greater than predetermined lock-in threshold, then export lock indication signal.
Particularly, in the present invention, when loop-locking, the I branch road that down-conversion exports complex baseband signal only comprises DC component, and Q branch road comprises remote signal or pseudo-code signal, the principle that loop-locking detects is that the average of the error of phase discriminator goes to zero, and I road carrier energy is maximum after catching.Therefore, the integration of available I, Q branch road exports and carries out loop detection locking decision.Wherein during integration, constant is relevant with signal to noise ratio, adds correction obtain when available random process analysis procedure analysis or actual debugging by estimation.
In lock detecting method in the present invention, if lock-in threshold is θ
th(θ
th<15 °).
If the lock-in detection cycle is N renewal loop cycle (estimating 2 times into the longest loop-locking time) doubly, the first half cycle is the loop-locking time, start to carry out I branch road and Q tributary signal that integration is cumulative obtains acc_I and acc_Q in the later half cycle, adjudicate, if acc_I/tan is θ at cycle foot couple accumulated value
th>acc_Q, and acc_I is greater than lock-in threshold, and noise power-value when lock-in threshold is no signal feeding, be then judged to be locking.
As shown in Figure 5, bit synchronization ring module 60 is specially a symbol synchronization loop, this symbol synchronization loop comprises Gardner phase discriminator 61 and clock adjusting module 62, demodulating data to input after Gardner phase discriminator 61 input clock adjusting module 62 again by demodulating data module 63, and clock adjusting module 62 outputs signal and inputs Gardner phase discriminator 61 again with demodulating data simultaneously and carry out synchronization decisions and export synchronizing signal.
As shown in Figure 6, the filter for filtering in system is higher order filter, and the method that this higher order filter is used for being added by parallel search table realizes, and by carrying out arrowband high-grade filting by organizing look-up table results added more.In order to realize the low delay of filter, and economize on resources as much as possible, the present invention first follows the bandwidth sum degree of suppression according to filter to set rational exponent number, then have employed parallel search table additive process (structure is as Fig. 6 A), in ROM, the data of input can be searched taking advantage of of input data and filter factor as address signal value added, directly pass through the result of calculation after ROM output filtering, its functional equivalent is in 6B, and this structure saves the resource occupation of filter as much as possible.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, any those skilled in the art is in the technical scope that the present invention discloses; the distortion do the present invention or replacement, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of described claim.
Claims (10)
1. an adaptive digital demodulating system under low signal-to-noise ratio, is characterized in that, comprising:
Digital Down Converter Module, for receiving signal to be demodulated, and is undertaken signal to be demodulated reducing sample rate process and the baseband signal obtaining transmission;
Rate detection module, for the transmission rate of the baseband signal that self-adapting detecting Digital Down Converter Module obtains;
Carrier phase-locked loop road, the transmission rate obtained for the baseband signal that obtains according to Digital Down Converter Module and rate detection module is fixed the carrier auxiliary of speed, obtains accurate baseband signal;
Lock-in detection module, for carrying out integral processing and judge whether to lock described accurate baseband signal according to integral result the I tributary signal in described accurate baseband signal, Q tributary signal, and exporting lock indication signal;
Matched filtering module, after receiving described locking signal, for the baseband signal of demodulation being averaged, the signal input bit synchronization ring module after being averaged synchronously processes, and obtains synchronizing signal;
Data decision module, for adjudicating described synchronizing signal and exporting the bit sequence after demodulation.
2. adaptive digital demodulating system under low signal-to-noise ratio according to claim 1, is characterized in that, also comprise clock module, and described clock module is used for providing standard clock signal for described Digital Down Converter Module, rate detection module and bit synchronization ring module.
3. adaptive digital demodulating system under low signal-to-noise ratio according to claim 1, it is characterized in that, described Digital Down Converter Module comprises CIC extracting unit, band pass filter, multiplier, low pass filter, the signal to be demodulated received reduces sample rate by described CIC extracting unit, the carrier multiplication that the Received signal strength reducing sample rate is produced by described multiplier and local oscillation signal, the signal after being multiplied carries out filtering respectively by several low pass filters and exports the baseband signal of some groups of speed to be detected.
4. adaptive digital demodulating system under low signal-to-noise ratio according to claim 3, it is characterized in that, the quantity of described low pass filter equals the kind number of the transmission rate of baseband signal, and the bandwidth of each described low pass filter is the bandwidth of baseband signal corresponding with it.
5. adaptive digital demodulating system under low signal-to-noise ratio according to claim 3, it is characterized in that, when the speed kind number sent when making a start is more, the bandwidth correspondence with the baseband signal of neighboring transmission speed adopts a low pass filter, and by this low pass filter, to the baseband signal of adjacent bandwidths, it carries out filtering.
6. adaptive digital demodulating system under low signal-to-noise ratio according to claim 1, it is characterized in that, described rate detection module comprises band pass filter, low pass filter, the first amplitude evaluation unit, the second amplitude evaluation unit, the first power calculation unit, the second power calculation unit and contrast decision unit;
Baseband signal inputs described band pass filter and low pass filter respectively, signal after described band-pass filter calculates through described first amplitude evaluation unit amplitude of carrying out and tries to achieve the first performance number by described first power calculation unit again, the filtered signal of described low pass filter calculates through described second amplitude evaluation unit amplitude of carrying out and tries to achieve the second performance number by described second power calculation unit again, and described first performance number and described second performance number input described decision unit and carry out contrast and adjudicate;
If described first performance number is greater than described second performance number, then the speed of the baseband signal inputted is as the bit rate of current detection passage, and now described decision unit exports is 1, otherwise described decision unit to export be 0.
7. adaptive digital demodulating system under low signal-to-noise ratio according to claim 1, it is characterized in that, described carrier phase-locked loop road comprises a variable bandwidth loop filter, described variable bandwidth loop filter shortens loop noise bandwidth gradually with the cumulative of update time of loop, makes described carrier phase-locked loop road obtain accurate baseband signal fast.
8. adaptive digital demodulating system under low signal-to-noise ratio according to claim 1, it is characterized in that, described lock-in detection module obtains I branch road integrated value and Q branch road integrated value to the I tributary signal in described accurate baseband signal, Q tributary signal after carrying out integral processing, when I branch road integrated value is greater than Q branch road integrated value and I branch road integrated value is greater than predetermined lock-in threshold, then export lock indication signal.
9. adaptive digital demodulating system under low signal-to-noise ratio according to claim 1, it is characterized in that, described bit synchronization ring module is specially a symbol synchronization loop, described symbol synchronization loop comprises Gardner phase discriminator and clock adjusting module, demodulating data inputs described clock adjusting module after inputting described Gardner phase discriminator again, and clock adjusting module output signal inputs described Gardner phase discriminator more simultaneously and carries out synchronization decisions and export synchronizing signal with demodulating data.
10. adaptive digital demodulating system under low signal-to-noise ratio according to claim 1, it is characterized in that, filter for filtering in system is higher order filter, described higher order filter is realized by parallel search table, and by realizing arrowband high-grade filting by organizing look-up table results added more.
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| CN106936742A (en) * | 2017-05-02 | 2017-07-07 | 西安电子科技大学 | Multi gear bit rate adaptive demodulation system and method based on neutral net |
| CN107040486A (en) * | 2017-03-28 | 2017-08-11 | 西安电子科技大学 | A kind of any bit rate adaptive QPSK demodulating systems and method |
| CN108989260A (en) * | 2018-08-01 | 2018-12-11 | 清华大学 | The digital time synchronization method of modified and device based on Gardner |
| CN109981510A (en) * | 2019-02-15 | 2019-07-05 | 北京空间飞行器总体设计部 | A kind of very low bit rate remote control reliable receiving method being applicable in deep space communication |
| CN112764065A (en) * | 2020-12-08 | 2021-05-07 | 北京无线电计量测试研究所 | OQPSK satellite bidirectional time comparison signal frequency synchronization method |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107040486A (en) * | 2017-03-28 | 2017-08-11 | 西安电子科技大学 | A kind of any bit rate adaptive QPSK demodulating systems and method |
| CN107040486B (en) * | 2017-03-28 | 2019-11-26 | 西安电子科技大学 | A kind of QPSK demodulating system and method that any bit rate is adaptive |
| CN106936742A (en) * | 2017-05-02 | 2017-07-07 | 西安电子科技大学 | Multi gear bit rate adaptive demodulation system and method based on neutral net |
| CN106936742B (en) * | 2017-05-02 | 2020-01-31 | 西安电子科技大学 | Multi-gear rate self-adaptive demodulation system and method based on neural network |
| CN108989260A (en) * | 2018-08-01 | 2018-12-11 | 清华大学 | The digital time synchronization method of modified and device based on Gardner |
| CN108989260B (en) * | 2018-08-01 | 2020-08-04 | 清华大学 | Improved all-digital timing synchronization method and device based on Gardner |
| CN109981510A (en) * | 2019-02-15 | 2019-07-05 | 北京空间飞行器总体设计部 | A kind of very low bit rate remote control reliable receiving method being applicable in deep space communication |
| CN112764065A (en) * | 2020-12-08 | 2021-05-07 | 北京无线电计量测试研究所 | OQPSK satellite bidirectional time comparison signal frequency synchronization method |
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