CN105493279A - 用于将器件附接到柔性衬底的*** - Google Patents

用于将器件附接到柔性衬底的*** Download PDF

Info

Publication number
CN105493279A
CN105493279A CN201480048572.5A CN201480048572A CN105493279A CN 105493279 A CN105493279 A CN 105493279A CN 201480048572 A CN201480048572 A CN 201480048572A CN 105493279 A CN105493279 A CN 105493279A
Authority
CN
China
Prior art keywords
flexible substrate
conductive
conductive ink
epoxy resin
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201480048572.5A
Other languages
English (en)
Other versions
CN105493279B (zh
Inventor
R.S.斯皮尔
D.汉比
A.M.斯科奇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Osram GmbH
Optoelectronics Co Ltd
Original Assignee
Osram Sylvania Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Osram Sylvania Inc filed Critical Osram Sylvania Inc
Publication of CN105493279A publication Critical patent/CN105493279A/zh
Application granted granted Critical
Publication of CN105493279B publication Critical patent/CN105493279B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/189Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985Flexible insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867Applying pastes or inks, e.g. screen printing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04Mounting of components, e.g. of leadless components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1241Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by ink-jet printing or drawing by dispensing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141Disposition
    • H01L2224/1412Layout
    • H01L2224/1415Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H01L2224/14154Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry covering only portions of the surface to be connected
    • H01L2224/14155Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/2401Structure
    • H01L2224/24011Deposited, e.g. MCM-D type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24101Connecting bonding areas at the same height
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24226Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/244Connecting portions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/25Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
    • H01L2224/251Disposition
    • H01L2224/2512Layout
    • H01L2224/25171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29005Structure
    • H01L2224/29007Layer connector smaller than the underlying bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/30Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
    • H01L2224/301Disposition
    • H01L2224/3012Layout
    • H01L2224/3015Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H01L2224/30154Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry covering only portions of the surface to be connected
    • H01L2224/30155Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32227Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32235Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a via metallisation of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73209Bump and HDI connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73217Layer and HDI connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/809Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding with the bonding area not providing any mechanical bonding
    • H01L2224/80901Pressing a bonding area against another bonding area by means of a further bonding area or connector
    • H01L2224/80903Pressing a bonding area against another bonding area by means of a further bonding area or connector by means of a bump or layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80909Post-treatment of the bonding area
    • H01L2224/8092Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80909Post-treatment of the bonding area
    • H01L2224/80951Forming additional members, e.g. for reinforcing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81193Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/81498Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/81499Material of the matrix
    • H01L2224/8159Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/81498Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/81598Fillers
    • H01L2224/81599Base material
    • H01L2224/816Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81638Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81639Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/8185Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/81855Hardening the adhesive by curing, i.e. thermosetting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/819Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector with the bump connector not providing any mechanical bonding
    • H01L2224/81901Pressing the bump connector against the bonding areas by means of another connector
    • H01L2224/81903Pressing the bump connector against the bonding areas by means of another connector by means of a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81909Post-treatment of the bump connector or bonding area
    • H01L2224/8192Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81909Post-treatment of the bump connector or bonding area
    • H01L2224/81951Forming additional members, e.g. for reinforcing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/821Forming a build-up interconnect
    • H01L2224/82101Forming a build-up interconnect by additive methods, e.g. direct writing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/821Forming a build-up interconnect
    • H01L2224/82101Forming a build-up interconnect by additive methods, e.g. direct writing
    • H01L2224/82102Forming a build-up interconnect by additive methods, e.g. direct writing using jetting, e.g. ink jet
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/9202Forming additional connectors after the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92124Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a build-up interconnect
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92142Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92144Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10106Light emitting diode [LED]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1461Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • H05K2203/1469Circuit made after mounting or encapsulation of the components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17Post-manufacturing processes
    • H05K2203/173Adding connections between adjacent pads or conductors, e.g. for modifying or repairing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H05K3/305Affixing by adhesive
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1052Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1056Perforating lamina
    • Y10T156/1057Subsequent to assembly of laminae

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Combinations Of Printed Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

本公开针对用于将器件附接到柔性衬底的***。器件可以以在粘接剂有害的同时防止粘接剂接触导电墨水的方式被耦合到柔性衬底。如果导电环氧树脂被用于将器件中的导电焊盘锚定到柔性衬底,则可以超越其上可以应用导电墨水的器件的边沿来应用导电环氧树脂以作成电连接。小孔也可以被形成在柔性衬底中,允许导电环氧树脂暴露在与器件位置相对的柔性衬底的表面上,所述导电墨水连接是在所述相对的表面上作成的。导电墨水也可以在延伸超过器件的边沿时被直接应用到导电焊盘。柔性衬底可以预先印刷有电路路径,导电墨水将器件耦合到电路路径。

Description

用于将器件附接到柔性衬底的***
相关申请的交叉引用
本申请是要求题为“SYSTEMFORATTACHINGDEVICESTOFLEXIBLESUBSTRATES”的于2013年9月4日提交的美国专利申请No.14/017,439的权益的国际申请,其完整内容被通过引用合并到此。
技术领域
本发明涉及电子组装,并且更具体地,涉及以避免现有组装问题的方式将器件放置到柔性衬底上。
背景技术
在典型的电子制造处理中,包括但不限制于印刷电路板、柔性衬底、封装(诸如多芯片模块(MCM))等的线路可以使用拾放操作而填装有电子器件。例如,可以通过装配有用于标识线路中的器件放置位置的视觉***以及被配置为从供给位置(例如导轨、卷轴等)拾取器件并且将器件放置到先前所标识的器件位置中的操控器的机器对线路进行选路(route)。至少从以实质上快于手动器件***的速度利用各种器件精确地填装线路的观点来看,拾放制造已经是有效的。
自动化焊接***通常遵从拾放操作,其中,被填装的电路板可以通过焊料池或回流炉而被选路以持久地将组件贴附到板。这些处理牵涉对于典型的电路板材料(诸如聚四氟乙烯(Teflon?)、FR-4、FR-1、CEM-1或CEM-3)而言可以是可容忍的高温。然而,使用例如聚对苯二甲酸乙二醇酯(PET)的柔性衬底可能易遭受高热量的损坏,并且因此,要求替换的制造处理。诸如导电环氧树脂(例如包括银的环氧树脂)的材料可以用于在(例如足以加热以固化环氧树脂的)更低得多的温度将组件器件贴附到柔性衬底。然而,导电环氧树脂可能还是有问题的。新兴的柔性衬底技术要求在器件被放置在柔性衬底上之前柔性衬底初始地被印刷(例如丝网印)有基于导电墨水的电路迹线。可能在用于将所放置的器件锚定到柔性衬底的导电环氧树脂中出现的溶剂和其它化学品可能引起预先印刷的基于导电墨水的的电路迹线失去它们对柔性衬底的粘接(例如,剥离),将电路组装呈现为不可使用的。
附图说明
应当参照应当结合下面的各图阅读的下面的详细描述,其中,相同的标号表示相同的部分:
图1图解与本公开一致的用于将器件附接到柔性衬底的示例***;
图2图解与本公开一致的示例的基于粘接剂到导电墨水的连接;
图3图解与本公开一致的替换的示例的基于粘接剂到导电墨水的连接;
图4是与本公开一致的与本公开一致的示例的基于器件到导电墨水的连接;
图5是与本公开一致的用于器件桥接的电路路径的示例;以及
图6图解与本公开一致的针对用于将器件附接到柔性衬底的***的示例操作。
虽然将参照说明性实施例进行以下的具体描述,但很多替换、修改及其变化对于本领域技术人员来说将是明显的。
具体实施方式
本公开针对用于将器件附接到柔性衬底的***。一般而言,当粘接剂处于可能对导电墨水有害的状态下时,器件可以以防止粘接剂接触导电墨水的方式而被耦合到柔性衬底。与本公开一致的实施例可以取决于器件如何耦合到柔性衬底而变化。例如,如果导电环氧树脂被用于将器件中的至少一个导电焊盘耦合到柔性衬底,则可以延伸超越器件的边沿而应用附加的环氧树脂,额外的环氧树脂提供其上可以稍后应用导电墨水以进行电连接的地方。对于小孔而言还可以可能的是形成在衬底中,小孔允许导电环氧树脂暴露在与耦合器件的地方相对的柔性衬底的表面上,导电墨水连接在相对侧上进行。当导电墨水可以被直接应用到延伸超越器件的至少一个导电焊盘时,在实例中也可以采用非导电环氧树脂。在一个实施例中,柔性衬底可以进一步预先印刷有电路路径,导电墨水被应用到柔性衬底,以将器件与电路路径电气地耦合。
在一个实施例中,示例线路可以包括柔性衬底、至少一个器件、粘接剂和导电墨水。粘接剂可以被应用到柔性衬底,以将至少一个器件耦合到柔性衬底。导电墨水可以然后被应用到柔性衬底,以形成电耦合到至少一个器件的导体,导电墨水是在粘接剂之后应用的。
粘接剂可以在导电墨水被应用到柔性衬底之前被固化。在一个示例实现中,至少一个器件可以包括至少一个导电焊盘,并且粘接剂可以是通过将至少一个导电焊盘粘接到柔性衬底来将所述至少一个器件锚定到柔性衬底的导电环氧树脂。导电环氧树脂可以被应用到柔性衬底,从而当被耦合到柔性衬底时,导电环氧树脂的至少一部分可以被暴露成超越所述至少一个器件的边沿。导电墨水可以被应用在导电环氧树脂的所暴露的部分的至少一部分上,以形成电耦合到至少一个器件的导体。
在另一示例实现中,柔性衬底可以包括开孔,开孔在至少一个器件被耦合到柔性衬底时被形成在与至少一个导电焊盘对应的柔性衬底的表面上的位置中,开孔从柔性衬底的表面穿过到相对的表面,导电环氧树脂被应用到柔性衬底,以填充开孔,从而当至少一个器件被耦合到柔性衬底时,导电环氧树脂被暴露在柔性衬底的相对侧上。导电墨水可以然后被应用到柔性衬底的相对侧并且在所暴露的导电环氧树脂上,以形成电耦合到至少一个器件的导体。
在另一示例实现中,至少一个器件可以包括至少一个导电焊盘,其包括延伸超越所述至少一个器件的边沿的部分,并且粘接剂是非导电环氧树脂,以将器件粘接到柔性衬底。导电墨水可以然后被应用在延伸超越至少一个器件的边沿的至少一个导电焊盘的部分的至少一部分上,以形成电耦合到所述至少一个器件的导体。
示例线路可以进一步包括至少一个电路路径,印刷在柔性衬底上,导体将所述至少一个印刷电路路径耦合到至少一个器件。与本公开的各个实施例一致的方法可以包括例如:将粘接剂应用到柔性衬底;使用粘接剂将包括至少一个导电焊盘的至少一个器件耦合到衬底;并且将导电墨水应用到柔性衬底,以形成电耦合到至少一个器件的导体。
图1图解与本公开一致的用于将器件附接到柔性衬底的示例***。***100可以包括例如衬底102,在其上可以附接至少一个器件104。衬底102可以是基于PET、纸张或提供其上可以安装器件的非导电表面的任何其它柔性材料的柔性衬底。器件104可以包括任何类型的电组件。与本公开各个实施例一致的电组件的一个示例可以是表面安装封装中的发光二极管(LED)。多个表面安装LED可以被自动地放置在衬底102上,以例如形成用于在照明灯具(例如灯泡、荧光管更换、灯、手电筒等)中使用的光源阵列。器件104可以包括至少一个导电焊盘106。导电焊盘106可以将器件104电耦合到包括例如导体、电路路径等的衬底102的表面。在表面安装LED的实例中,器件104可以包括至少两个导电焊盘106。
***100公开示例实现,其中,使用导电粘接剂108通过导电焊盘106将器件104附接到衬底102。例如,导电粘接剂108可以是导电环氧树脂(例如包括用于导电的银的两部分环氧树脂)。导电粘接剂108允许器件104在不需要(例如如焊接附接所要求的)高温的情况下持久地贴附到衬底102。如PET和纸张的材料不能承受焊接温度,并且不受高热量影响的现有材料(例如聚亚酰胺衬底)对制造添加实质成本,这对于在柔性衬底上制造各类型的线路而言通常是不可行的。如图2中将更详细地公开的那样,导电粘接剂108可以延伸超越器件104的边沿,创建其上可以应用导电墨水110的接触。导电墨水110可以被应用到衬底102,以形成电耦合到器件104的导体。例如,在***100中,可以通过导电墨水110串联耦合多个器件104。
图2图解与本公开一致的示例的基于粘接剂到导电墨水的连接。示出如图1所公开的***100的侧视图,其中,关于器件104'提供附加的细节。器件104'可以包括通过布线或迹线202耦合到导电焊盘106的集成电路(IC)200(例如实际的IC管芯)。导电焊盘106可以通过导电粘接剂108锚定到衬底102。导电墨水110可以然后被应用在导电粘接剂108的部分之上。结果,导电粘接剂108可以将导电焊盘106电耦合到导电墨水110,允许器件104'被电耦合到衬底102上的其它器件104'和/或线路。
图2中在204至206处示出用于***100的示例组装阶段。初始地,导电粘接剂108可以被应用到衬底102,如在204处图解那样,其上应用导电粘接剂108的区域当被附接时超越器件104'的预期区域。当器件104'被附接到衬底102时,在206处该操作被看得更清楚。重要的是,注意,在与本公开一致的至少一个实施例中,衬底102可以经受处理以固化导电粘接剂108。固化导电粘接剂108可以移除可能对于导电墨水110是腐蚀性的导电粘接剂108中的一些溶剂和/或其它化学物。如在208处图解那样,导电墨水110可以然后被应用在超过器件104'的边界的导电粘接剂108的部分的至少一部分上,以形成电耦合到器件104'的导体。
图3图解与本公开一致的替换的示例的基于粘接剂到导电墨水的连接。***100'可以包括形成在衬底102'中的至少一个开孔300。例如,开孔300的位置可以与器件104'中的导电焊盘106对应。可以然后以允许导电粘接剂108'既填充开孔300又将器件104'锚定到衬底102'的方式,将导电粘接剂108'应用到衬底102'。给定器件104'附接到其的衬底102'的表面是衬底102'的“正面”并且与该正面相对的衬底102'的表面是衬底102'的“背面”,导电墨水110'可以被应用在暴露在衬底102'的背面上的导电粘接剂108'之上,以形成电耦合到器件104'的导体。***100'所示的实现在如下的情况下可以是有益的:其中例如,用于在衬底102'的正面上附接器件104'的可用表面区域十分有限,其中衬底102'的正面可能被暴露于可能对于导电墨水110'有害的条件等。
图3中在302至306处示出用于***100'的示例组装阶段。初始地,至少一个开孔300可以被形成在衬底102'中,如在302处图解那样。例如,开孔(例如小孔)可以被冲钻、激光切割、刻蚀等而穿透衬底102'。导电粘接剂108'可以然后被应用在小孔300之上,并且器件104'可以使用导电粘接剂108'而被附接到衬底102',如在304处所示那样。导电粘接剂108'可以既将器件104'锚定到衬底102'并且又将开孔300填充到至少一些导电粘接剂108'暴露在衬底108'的背面上的程度。在一个实施例中,可以固化导电粘接剂(例如导电环氧树脂)。在306处,导电墨水110'可以被应用到衬底102'的背面,导电墨水110'被应用在通过开孔300所暴露的导电粘接剂108'之上,以形成电耦合到器件104'的导体。
图4示出与本公开一致的示例的基于器件到导电墨水的连接。在***100''中,器件104''可以包括延伸超越器件104''的边沿的至少一个导电焊盘106'。可以利用非导电粘接剂400(例如非导电环氧树脂)以将器件104'的外壳锚定到衬底102。导电墨水110''可以然后被应用在延伸超越器件104''的边沿的导电焊盘106'的部分的至少一部分上,形成可以经由衬底102上的线路将器件104''电耦合到其它器件的导体。***100''的至少一个优点是排除了导电粘接剂。避免使用导电粘接剂可以减少组装的总体成本,并且可以消除在应用导电墨水110''之前进行固化的需要。然而,成本节省可以取决于导电粘接剂对于具有所修改的焊盘的器件104''的成本。
图4中在402至404处示出用于***100''的示例组装阶段。初始地,非导电粘接剂400可以被应用到衬底102,如在402处图解那样。非导电粘接剂400可以被应用在与器件104''的外壳当被附接到衬底102时将被定位的位置对应的区域中。在404处公开器件104''对衬底102的附接,导电焊盘106'延伸超越器件104''的边沿。导电墨水110''可以然后被应用在延伸超越器件104''的边沿的导电焊盘106'的部分的至少一部分之上。在***100''中,由于导电墨水110''可以不成为与非导电粘接剂400接触,因此非导电粘接剂400何时固化(如果必要的话)可以独立于导电墨水110''的应用。
图5是与本公开一致的用于器件桥接的电路路径的示例。在至少一个实施例中,电路路径(例如用于耦合被附接到衬底102的器件104的导电迹线)可以在器件104被附接之前被至少部分地应用到衬底102。在502至508处示出示例组装阶段。例如,在502处,电路路径500被示出为被预先印刷在衬底102上。可以使用自动化处理(诸如例如丝网印、印刷、绘制等)在导电墨水中预先印刷出电路路径500。使用如图1图解的***100作为示例,在504处,导电粘接剂108可以然后被应用到衬底102。可以以不成为与电路路径500接触的方式应用导电粘接剂。如在506处所示那样,器件104可以然后被应用到衬底102,采用导电粘接剂108以将器件104中的至少一个导电焊盘106锚定到衬底102。在一个实施例中,导电粘接剂108可以然后在应用导电墨水110之前被固化。如在508处所示那样,导电墨水110可以被应用于导电粘接剂108和电路路径500的至少一部分之上,以创建将器件104耦合到电路路径500的导体。重要的是,注意,虽然在串联耦合器件104的配置中示出电路路径500,但这种示例配置仅仅是为了解释。与本公开一致的实施例可以包括基于例如线路意图针对的应用而配置的实质上更复杂的电路路径500。此外,可以利用图2-图4中所公开的任何***来实现图5所示的示例。
图6图解与本公开一致的针对用于将器件附接到柔性衬底的***的示例操作。在操作600中,电路路径可以被应用到衬底(例如,可以在导电墨水中被预先印刷在衬底上)。操作600可以是可选的,因为可以稍后(例如在操作608中)简单地通过应用导电墨水来创建所有所要求的电路路径。在操作602中,粘接剂(例如环氧树脂)可以被应用到衬底。粘接剂是导电的还是非导电的取决于(例如诸如图2-图4中先前所公开的)所利用的***的类型。在操作604中,器件可以被附接到衬底。例如,可以使衬底贯穿于自动化拾放处理中,通过自动化拾放处理表面安装器件被应用到衬底。在可选操作606中,固化可以发生,以设置在操作602中应用的粘接剂。当例如利用基于导电环氧树脂的***时,可能要求固化,并且导电环氧树脂的固化对于消除可能对于导电墨水有害的导电环氧树脂中的溶剂和/或其它化学物可能是必要的。在操作608中,导电墨水可以被应用到衬底。例如,导电墨水可以被印刷、绘制、喷涂(等等)到衬底上,以形成电耦合到器件的导体。
虽然图6图解根据实施例的各个操作,但要理解的是,并非图6中所描绘的所有操作对于其它实施例而言是必要的。实际上,在此完全预期的是,在本公开的其它实施例中,图6中所描绘的操作和/或在此所描述的其它操作可以以任何附图中未具体示出的方式来组合,而仍与本公开完全一致。因此,针对一个附图中未明确示出的特征和/或操作的权利要求被认为处于本公开的范围和内容内。
如本申请以及权利要求中所使用的那样,由术语?“和/或?”结合的项的列表可以意味着所列出的项的任何组合。例如,短语?“A、B和/或C?”可以意味着A;B;C;A和B;A和C;B和C;或A、B和C。如本申请以及权利要求中所使用的那样,由术语?“……中的至少一个?”结合的项的列表可以意味着所列出的术语的任何组合。例如,短语?“A、B或C中的至少一个?”可以意味着A;B;C;A和B;A和C;B和C;或A、B和C。
如在此所使用的术语?“电耦合?”和?“电气地耦合?”等提及任何连接、耦合或链接等,通过这样的任何连接、耦合或链接等,由一个***元件承载的电信号和/或功率被给予到?“所耦合的?”元件。这样的“电耦合的?”器件或信号和器件并不一定被直接彼此连接,并且可以通过可以操控或修改这样的信号的中间组件或器件而被分离开。同样地,关于机械的或物理的连接或耦合而在此所使用的术语?“被连接的?”或?“被耦合的?”是相对的术语,并且不要求直接的物理连接。
因此,本公开针对用于将器件附接到柔性衬底的***。器件可以以在粘接剂有害的同时防止粘接剂接触导电墨水的方式来被耦合到柔性衬底。如果导电环氧树脂被用于将器件中的导电焊盘锚定到柔性衬底,则可以超越其上可以应用导电墨水的器件的边沿来应用导电环氧树脂以进行电连接。小孔也可以被形成在柔性衬底中,允许导电环氧树脂暴露在与器件位置相对的柔性衬底的表面上,导电墨水连接是在相对的表面上作出的。导电墨水也可以在被延伸超过器件的边沿时直接应用到导电焊盘。柔性衬底可以被预先印刷有电路路径,导电墨水将器件与电路路径连接。
根据一个方面,提供了一种线路。所述线路可以包括:柔性衬底;至少一个器件,耦合到所述柔性衬底;粘接剂,应用到所述柔性衬底,以将所述至少一个器件耦合到所述柔性衬底;以及导电墨水,应用到所述柔性衬底,以形成电耦合到所述至少一个器件的导体,所述导电墨水在所述粘接剂之后被应用。
根据另一方面,提供了一种方法。所述方法可以包括:将粘接剂应用到柔性衬底;使用所述粘接剂将包括至少一个导电焊盘的至少一个器件耦合到所述衬底;以及将导电墨水应用到所述柔性衬底,以形成电耦合到所述至少一个器件的导体。
虽然已经在此描述了发明的原理,但本领域技术人员要理解的是,该描述仅是通过示例的方式作出的并且不作为对于发明的范围的限制。除了在此所示出并且描述的示例性实施例之外,在本发明的范围内预期有其它实施例。本领域技术人员进行的修改和替代被看作在本发明的范围内,本发明的范围除了由随后的权利要求限制以外不受限制。

Claims (14)

1.一种线路,包括:
柔性衬底;
至少一个器件,耦合到所述柔性衬底;
粘接剂,被应用到所述柔性衬底,以将所述至少一个器件耦合到所述柔性衬底;以及
导电墨水,被应用到所述柔性衬底,以形成电耦合到所述至少一个器件的导体,所述导电墨水是在所述粘接剂之后被应用的。
2.如权利要求1所述的线路,其中,在所述导电墨水被应用到所述柔性衬底之前,固化所述粘接剂。
3.如权利要求1所述的线路,其中,所述至少一个器件包括至少一个导电焊盘,并且所述粘接剂是通过将所述至少一个导电焊盘粘接到所述柔性衬底来将所述至少一个器件锚定到所述柔性衬底的导电环氧树脂。
4.如权利要求3所述的线路,其中,所述导电环氧树脂被应用到所述柔性衬底,从而所述导电环氧树脂的至少一部分当被耦合到所述柔性衬底时被暴露成超越所述至少一个器件的边沿,并且其中,所述导电墨水被应用在所述导电环氧树脂的被暴露的部分的至少一部分上,以形成电耦合到所述至少一个器件的导体。
5.如权利要求3所述的线路,其中,所述柔性衬底包括开孔,所述开孔在所述至少一个器件被耦合到所述柔性衬底时被形成在与所述至少一个导电焊盘对应的柔性衬底的表面上的位置中,所述开孔从所述柔性衬底的表面穿过到相对的表面,所述导电环氧树脂被应用到所述柔性衬底以填充所述开孔,从而当所述至少一个器件被耦合到所述柔性衬底时,所述导电环氧树脂被暴露在所述柔性衬底的所述相对的表面上,并且其中,所述导电墨水被应用到所述柔性衬底的所述相对的表面并且在所暴露的导电环氧树脂上,以形成电耦合到所述至少一个器件的导体。
6.如权利要求1所述的线路,其中,所述至少一个器件包括至少一个导电焊盘,所述至少一个导电焊盘包括超越所述至少一个器件的边沿延伸的部分,并且所述粘接剂是非导电环氧树脂。
7.如权利要求6所述的线路,其中,所述导电墨水被应用在延伸超越所述至少一个器件的边沿的所述至少一个导电焊盘的部分的至少一部分上,以形成电耦合到所述至少一个器件的导体。
8.如权利要求1所述的线路,进一步包括至少一个电路路径,所述至少一个电路路径被印刷在所述柔性衬底上,所述导体将所述至少一个印刷电路路径耦合到所述至少一个器件。
9.一种方法,包括:
将粘接剂应用到柔性衬底;
使用所述粘接剂将包括至少一个导电焊盘的至少一个器件耦合到所述衬底;以及
将导电墨水应用到所述柔性衬底,以形成电耦合到所述至少一个器件的导体。
10.如权利要求9所述的方法,进一步包括:
在将所述导电墨水应用到所述柔性衬底之前,固化所述粘接剂。
11.如权利要求9所述的方法,其中:
所述粘接剂是导电环氧树脂;以及
将导电墨水应用到所述柔性衬底包括:将导电墨水应用到超越所述至少一个器件的边沿而暴露的所述导电环氧树脂的部分的至少一部分上,以形成电耦合到所述至少一个器件的导体。
12.如权利要求9所述的方法,其中:
所述粘接剂是非导电环氧树脂;以及
将导电墨水应用到所述柔性衬底包括:将导电墨水应用到超越所述至少一个器件的边沿而暴露的所述至少一个导电焊盘的部分的至少一部分上,以形成电耦合到所述至少一个器件的导体。
13.如权利要求9所述的方法,进一步包括:
当所述至少一个器件被耦合到所述柔性衬底时,在与所述至少一个导电焊盘对应的所述柔性衬底的表面上的位置中形成开孔,所述开孔从所述柔性衬底的所述表面穿过到相对的表面;
将导电环氧树脂应用到所述柔性衬底,以填充所述开孔,从而当所述至少一个器件被耦合到所述柔性衬底时,所述导电环氧树脂被暴露在所述柔性衬底的所述相对的表面上;以及
将导电墨水应用到所述柔性衬底的所述相对的表面并且在所暴露的导电环氧树脂上,以形成电耦合到所述至少一个器件的导体。
14.如权利要求9所述的方法,进一步包括:
在所述柔性衬底上印刷至少一个电路路径,所述导体将所述至少一个印刷电路路径耦合到所述至少一个器件。
CN201480048572.5A 2013-09-04 2014-08-19 用于将器件附接到柔性衬底的*** Active CN105493279B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/017,439 US20150062838A1 (en) 2013-09-04 2013-09-04 System for attaching devices to flexible substrates
US14/017439 2013-09-04
PCT/US2014/051627 WO2015034664A2 (en) 2013-09-04 2014-08-19 System for attaching devices to flexible substrates

Publications (2)

Publication Number Publication Date
CN105493279A true CN105493279A (zh) 2016-04-13
CN105493279B CN105493279B (zh) 2020-12-22

Family

ID=51564787

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480048572.5A Active CN105493279B (zh) 2013-09-04 2014-08-19 用于将器件附接到柔性衬底的***

Country Status (4)

Country Link
US (1) US20150062838A1 (zh)
CN (1) CN105493279B (zh)
DE (1) DE112014004034T5 (zh)
WO (1) WO2015034664A2 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018109651A1 (en) * 2016-12-14 2018-06-21 Osram Gmbh A method of connecting electrically conductive formations, corresponding support structure and lighting device
DE102016124559A1 (de) * 2016-12-15 2018-06-21 Siteco Beleuchtungstechnik Gmbh Verfahren zur Herstellung eines LED-Moduls
WO2024068349A1 (en) * 2022-09-30 2024-04-04 Biotronik Se & Co. Kg Method for fabricating a circuit board arrangement, circuit board pre-assembly and implantable medical device comprising a circuit board arrangement

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6353420B1 (en) * 1999-04-28 2002-03-05 Amerasia International Technology, Inc. Wireless article including a plural-turn loop antenna
CN101266958A (zh) * 2007-03-13 2008-09-17 百慕达南茂科技股份有限公司 晶片封装结构
CN101937903A (zh) * 2009-06-29 2011-01-05 精工爱普生株式会社 半导体装置及其制造方法
US20120175667A1 (en) * 2011-10-03 2012-07-12 Golle Aaron J Led light disposed on a flexible substrate and connected with a printed 3d conductor
CN202979463U (zh) * 2012-03-02 2013-06-05 深圳市明陶材料技术有限公司 一种以陶瓷为基板的线路板

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008235926A (ja) * 2004-11-11 2008-10-02 Seiko Epson Corp 実装基板及び電子機器
WO2007042071A1 (de) * 2005-10-10 2007-04-19 Alphasem Ag Baugruppe mit wenigstens zwei in elektrisch leitender wirkverbindung stehenden komponenten und verfahren zum herstellen der baugruppe
TW200937601A (en) * 2008-02-21 2009-09-01 Ind Tech Res Inst Semiconductor package structure and method of manufacturing semiconductor package structure
US20090321955A1 (en) * 2008-06-30 2009-12-31 Sabina Houle Securing integrated circuit dice to substrates

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6353420B1 (en) * 1999-04-28 2002-03-05 Amerasia International Technology, Inc. Wireless article including a plural-turn loop antenna
CN101266958A (zh) * 2007-03-13 2008-09-17 百慕达南茂科技股份有限公司 晶片封装结构
CN101937903A (zh) * 2009-06-29 2011-01-05 精工爱普生株式会社 半导体装置及其制造方法
US20120175667A1 (en) * 2011-10-03 2012-07-12 Golle Aaron J Led light disposed on a flexible substrate and connected with a printed 3d conductor
CN202979463U (zh) * 2012-03-02 2013-06-05 深圳市明陶材料技术有限公司 一种以陶瓷为基板的线路板

Also Published As

Publication number Publication date
DE112014004034T5 (de) 2016-08-04
WO2015034664A3 (en) 2015-07-23
US20150062838A1 (en) 2015-03-05
WO2015034664A2 (en) 2015-03-12
CN105493279B (zh) 2020-12-22

Similar Documents

Publication Publication Date Title
JP5097827B2 (ja) フレックスリジッド配線板及び電子デバイス
US7876577B2 (en) System for attaching electronic components to molded interconnection devices
TWI454199B (zh) 印刷電路板之製造方法
US20090126980A1 (en) Printed wiring board
KR20140110553A (ko) 이방성 도전 필름, 표시 장치, 및 표시 장치의 제조 방법
CN105493279A (zh) 用于将器件附接到柔性衬底的***
KR20090100211A (ko) 전자 부품 접합 장치, 전자 유닛 및 전자 장치
US20160380172A1 (en) Component arrangement and method for producing a component arrangement
KR101369300B1 (ko) 방열성을 향상시킨 칩 온 필름 패키지
WO2008152563A1 (en) Accurate light source - optics positioning system and method
EP1976354A1 (en) Chip component mounting structure, chip component mounting method and electronic device
WO2015047757A1 (en) Orientation-independent device configuration and assembly
US20150085504A1 (en) Systems and Methods for Improving Service Life of Circuit Boards
GB2379557A (en) Flexible repair circuit
US8884314B1 (en) Circuitry configurable based on device orientation
KR20090106777A (ko) 도전성 입자가 부착된 전극을 구비한 연성회로기판 및테이프 캐리어 패키지
KR100643428B1 (ko) 전자 패키징 필름의 본딩장치
KR101369298B1 (ko) 방열성을 향상시킨 칩 온 필름 패키지
EP0551529B1 (en) Method for replacing chips
KR101369279B1 (ko) 방열성을 향상시킨 칩 온 필름 패키지
JP2007250765A (ja) プリント配線板のランド構造
KR100646068B1 (ko) 이방성 도전 필름
US20140318840A1 (en) Stacked structure and manufacturing method of the same
KR101744247B1 (ko) 임베디드 인쇄회로기판의 제조 방법
KR101369293B1 (ko) 방열성을 향상시킨 칩 온 필름 패키지

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right

Effective date of registration: 20230413

Address after: Munich, Germany

Patentee after: Optoelectronics Co.,Ltd.

Address before: Munich, Germany

Patentee before: OSRAM GmbH

Effective date of registration: 20230413

Address after: Munich, Germany

Patentee after: OSRAM GmbH

Address before: Massachusetts

Patentee before: OSRAM SYLVANIA Inc.

TR01 Transfer of patent right