CN105374925A - Inorganic substance-based LED epitaxy lamination circuit board and preparation method thereof - Google Patents
Inorganic substance-based LED epitaxy lamination circuit board and preparation method thereof Download PDFInfo
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- CN105374925A CN105374925A CN201410418498.3A CN201410418498A CN105374925A CN 105374925 A CN105374925 A CN 105374925A CN 201410418498 A CN201410418498 A CN 201410418498A CN 105374925 A CN105374925 A CN 105374925A
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Abstract
The invention relates to an inorganic substance-based LED epitaxy lamination circuit board and a preparation method thereof. The inorganic substance-based LED epitaxy lamination circuit board comprises a central substrate, at least two metal conductive layers and an LED lattice adaptation layer, wherein the central substrate is made of inorganic substances; the central substrate is provided with electric connection holes, and the electric connection holes are filled with first conductive metal; each metal conductive layer is provided with isolation grooves; the at least two metal conductive layers are deposited on the upper surface and the lower surface of the central substrate and are connected via the electric connection holes; the LED lattice adaptation layer is deposited on the surface of the metal conductive layer of one side for assembling an LED wafer; and a circuit board side wall protection layer is a metal Ni layer electroplated on each side surface of the LED epitaxy lamination circuit board for eliminating internal stress brought by different thermal expansion coefficients between layers inside the LED epitaxy lamination circuit board during a subsequent process and a use process.
Description
Technical field
The present invention relates to semiconductor applications, particularly relate to a kind of LED epitaxial growth laminated circuit board based on inorganic matter and preparation method thereof.
Background technology
Production development is shown to today at traditional LED, resource that is supporting or intersection industry is greatly abundant and perfect, but adopt FR4 circuit board to be used for making LED circuit substrate because be limited by traditional product structure, therefore when the resolution of display screen is brought up to a certain degree (such as when pel spacing is less than 1MM), traditional circuit-board to meet small size, high-precision requirement completely.
Be currently used in the LED inorganic circuit plate (PCB) in the field such as street lamp or blast furnace electrode, it manufactures and uses and all relates to a lot of difficulty, comprises the manufacturing cost of great number, the problems such as the stability of product.So do not promoted on a large scale always.Industry is also constantly explored in such as associated materials details and lamination process details.The manufacture of traditional inorganic PCB has all been come by high temperature sintering form, this Cost Problems that highly energy-consuming must be caused to bring, and electric conducting material is all use such as gold, the noble metal that silver is such, also causes high cost.And more the technical difficulty of core is the impact of the material stress in fine PCB manufacture and use procedure, become the biggest factor affecting product reliability and stability.
Therefore how to adopt common process and conventional material to reduce production cost, reduce the hidden danger that circuit board stress brings, be problem demanding prompt solution simultaneously.
Summary of the invention
The object of this invention is to provide and a kind ofly can overcome LED epitaxial growth laminated circuit board based on inorganic matter of above-mentioned defect and preparation method thereof.
In first aspect, the invention provides a kind of LED epitaxial growth laminated circuit board based on inorganic matter, comprising: central substrate, at least double layer of metal conductive layer, LED lattice adaptation layer and circuit board side wall protective layer;
Described central substrate is that inorganic matter is formed;
Described central substrate has electrical connection hole, in described electrical connection hole, be filled with the first conducting metal;
Described metal conducting layer has isolation channel;
Described at least double layer of metal conductive layer deposition, on the upper and lower surface of described central substrate, is connected by described electrical connection hole;
LED lattice adaptation layer is deposited on the surface of the side metal conducting layer for growing LED wafer;
Described circuit board side wall protective layer is the W metal layer of each side being plated on described LED epitaxial growth laminated circuit board, in order to eliminate in subsequent technique and use procedure, and the internal stress that in described LED epitaxial growth laminated circuit board, the coefficient of thermal expansion difference of each interlayer is brought;
Wherein, described metal conducting layer and the first conducting metal are sputtering or the metal-layer structure of electroplating deposition in described central substrate; Described isolation channel is the patterned structures of described metal conducting layer after photoetching, etching.
Preferably, dielectric is deposited in the isolation channel of described metal conducting layer.
Preferred further, in the isolation channel of described top-level metallic conductive layer, the thickness of the dielectric of deposition is 10% ~ 20% top-level metallic conductive layer thickness.
Preferred further, described top-level metallic conductive layer is separated the LED eutectic pad forming multiple carrying LED wafer by described isolation channel.
Preferably, the bottom of described laminated circuit board has insulating protective layer, and the thickness of described insulating protective layer is 10% ~ 20% underlying metal conductive layer thickness.
Preferred further, described insulating protective layer has pad hole, in described pad hole, be filled with the second conducting metal; When after removal insulating protective layer, described second conducting metal exposes from described pad hole, forms multiple contact electrode carrying out being electrically connected with external chip or circuit; Described contact electrode is connected with the underlying metal conductive layer of described laminated circuit board, thus forms the electrical connection between described laminated circuit board and external chip or circuit.
Preferably, described LED lattice adaptation layer is specially metal or nonmetal, comprises Cr, Ni, Au, Ti, Sn, in SiC, ZnO any one or multiple.
Preferably, described central substrate is specially: SiC substrate or SiC-Cu composite base plate.
In second aspect, the invention provides a kind of manufacture method of the LED laminated circuit board as described in above-mentioned first aspect, comprising:
To the whole plate plating conducting medium of central substrate;
The processing of laser drilling through hole is carried out to central substrate;
To the whole plate plating conducting medium of central substrate; Wherein said through hole is filled completely by described conducting medium;
The conducting medium of the first surface of described central substrate is graphically etched;
The conducting medium of the second surface of described central substrate is graphically etched;
Vapor deposition SiO
2, form substrate protective layer;
The substrate protective layer of the upper surface of described central substrate is graphically etched, in patterned area, exposes metal pad electrode;
Described metal pad electrode grows lattice adaptation layer; The lattice structure of described lattice adaptation layer is identical with the lattice structure of described LED;
Etching removes the SiO of described LED laminated circuit board side
2;
At each side plated metal Ni of described LED epitaxial growth laminated circuit board, form circuit board side wall protective layer.
Preferably, at vapor deposition SiO
2, before forming substrate protective layer, described method is further comprising the steps of:
Vapor deposition SiC, forms the packed layer of graphical etch areas and the surface insulation layer of central substrate;
The surface insulation layer of described central substrate is graphically etched, is etched in patterned area and exposes conducting medium;
To the whole plate plating conducting medium of central substrate;
The conducting medium of the first surface of described central substrate is graphically etched;
The conducting medium of the second surface of described central substrate is graphically etched.
At the LED epitaxial growth laminated circuit board based on inorganic matter provided by the invention; manufacturing processes customary and conventional material is adopted to reduce production cost; the lattice adaptation processing matched with LED wafer pad is formed by LED lattice adaptation layer; thus the electrical connection be formed at better between LED wafer and physical connection; by circuit board sidewall protective layer structure; effective elimination in order to eliminate in subsequent technique and use procedure, the internal stress brought of coefficient of thermal expansion difference of each interlayer in described LED epitaxial growth laminated circuit board.
Accompanying drawing explanation
The cross-sectional view of a kind of LED epitaxial growth laminated circuit board based on inorganic matter that Fig. 1 provides for the embodiment of the present invention;
The manufacture method of the LED laminated circuit board based on inorganic matter that Fig. 2 provides for the embodiment of the present invention.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in detail.
A kind of LED epitaxial growth laminated circuit board based on inorganic matter of the present invention, is mainly used in LED display, Ultra fine pitch LED display, super-high density LED display, the positive luminous TV of LED, the positive luminous monitor of LED, LED video wall, and LED indicates, LED special lighting etc.
The cross-sectional view of a kind of LED epitaxial growth laminated circuit board based on inorganic matter that Fig. 1 provides for the embodiment of the present invention one.Wherein, the top in figure is the upper surface direction of laminated circuit board, and the below in figure is the lower surface direction of laminated circuit board.
As shown in Figure 1, the LED epitaxial growth laminated circuit board based on inorganic matter of the present embodiment, comprising: one deck central substrate 1, separator 6, four layers of metal conducting layer 2, LED lattice adaptation layer 5 and circuit board side wall protective layer 7.
Central substrate 1 and separator 6 respectively on have electrical connection hole 11, electrical connection hole 11 in be filled with the first conducting metal;
Metal conducting layer 2 has isolation channel 21, deposition SiC in isolation channel 21;
The wherein two-layer of four layers of metal conducting layer 2 is deposited on the upper and lower surface of central substrate 1 respectively, respectively has one deck separator 6 on the upper and lower surface of this double layer of metal conductive layer 2, more upper and lowerly respectively has layer of metal conductive layer 2.
Central substrate 1 can be SiC substrate, also can be the substrate that SiC and other inorganic matters are composited, such as SiC-Cu composite base plate, and the material of separator 6 also can be SiC.The SiC layer of central substrate 1 plays the buffer action between double-level-metal conductive layer 2 equally, therefore layer of metal conductive layer 2 is formed, one deck isolation (central substrate 1 or separator 6), the structure of layer of metal conductive layer 2 again, realizes electrical connection by the first conducting metal in described electrical connection hole 11 between every double layer of metal conductive layer 2.
Circuit board side wall protective layer 7 for being plated on the W metal layer of each side of described LED epitaxial growth laminated circuit board, in order to eliminate in subsequent technique and use procedure, the internal stress brought of coefficient of thermal expansion difference of each interlayer in described LED epitaxial growth laminated circuit board.
Wherein, metal conducting layer 2 and the first conducting metal are sputtering or the metal-layer structure of electroplating deposition in central substrate 1; Isolation channel 21 is that metal conducting layer 2 is in the patterned structures after photoetching, etching.
The dielectric 3 that thickness is 10% ~ 20% top-level metallic conductive layer thickness is also deposited in the isolation channel 21 of the metal conducting layer 2 of top layer.The metal conducting layer 2 of top layer is isolated groove 21 and separates, and forms the LED eutectic pad 22 of multiple carrying LED wafer.
LED lattice adaptation layer 5 is deposited on LED eutectic pad 22, and the lattice structure of the LED wafer pad of the lattice structure territory of LED lattice adaptation layer 5 preparation assembling is consistent, so that the physical connection realized better between LED wafer with laminated circuit board and being electrically connected.
Concrete, LED lattice adaptation layer 5 is specially metal or nonmetally makes, and can obtain by adopting the method such as evaporation, deposition, material therefor can include but not limited to Cr, Ni, Au, Ti, Sn, in SiC, ZnO any one or multiple.
The bottom of laminated circuit board also deposits insulating protective layer 4, and the thickness of insulating protective layer 4 is the metallic conduction layer thickness of 10% ~ 20% bottom.Insulating protective layer 4 has pad hole 41, be filled with the second conducting metal in pad hole 41, when after removal insulating protective layer 4, the second conducting metal exposes from described pad hole 41, forms multiple contact electrode 42 carrying out being electrically connected with external chip or circuit.
Contact electrode 42 is connected with the metal conducting layer 2 of the bottom of laminated circuit board, thus forms the electrical connection between laminated circuit board and external chip or circuit.
In the present embodiment, central substrate 1 thickness of central core is 200 μm, obtains the electrical connection hole 11 in the central substrate 1 of central core through patterned hole machined (LaserDrilling) excessively; Whole sheetmetal sputtering or electroplating deposition, formation is close to the metal conducting layer 2 of central core central substrate 1 both sides and deposited aforesaid electrical connection hole 11, metal material is preferably copper, the thickness of this double layer of metal conductive layer 2 30 ~ 35 μm, and the metal thickness of filling electrical connection hole 11 is 200 μm.Double layer of metal conductive layer 2 is graphically etched respectively, forms multiple isolation channel 21; Deposition SiC, form two-layer central substrate 1 in the outside of double layer of metal conductive layer 2, thickness is 50 μm, and also fills out deposition SiC in isolation channel 21; After carrying out patterned hole machined excessively to above-mentioned two-layer central substrate 1, same obtains third and fourth layer of metal conducting layer 2 in the sputtering of the both sides of laminated circuit board or electroplating deposition again, and thickness is 30-35 μm, and the metal thickness in deposition electrical connection hole 11 is 50 μm; Again the metal conducting layer 2 of integrated circuit plate top surface and bottom surface is graphically etched, carry out cleaning to laminated circuit board afterwards and the dielectric 3 of graphical sputtering or electroplating deposition 5 ~ 10 μm.Finally, graphical treatment is carried out to the dielectric 3 of bottom surface and obtains pad hole 41, then sputter electroplating deposition layer of metal and form multiple contact electrode 42 carrying out being electrically connected with external chip or circuit.
In a preferred example, as shown in Figure 1, laminated circuit board has following basic parameter feature:
Substrate center's layer of laminated circuit board is SiC layer, thickness 200 μm, CTE=6-8ppm/ DEG C
DIELECTRIC CONSTANT ε 3 ~ 4
Live width L and the interval S of metal conducting layer are respectively: 20 ~ 50 μm
LED wafer pad density: 4000/ ((200X200) μm
2)
Aperture and pad footpath are respectively: 30 ~ 50 μm,
Insulation resistance: 1.0e+13 Ω .m
The thermal coefficient of expansion CTE:13-19ppm/ DEG C of laminated circuit board
Integrated circuit plate thickness: 0.7 ~ 0.8mm
In another preferred example, as shown in Figure 2, laminated circuit board has following basic parameter feature:
Substrate center's layer of laminated circuit board is SiC-Cu composite bed, comprises the SiC layer of 185 μm of base coppers and 50 μm.Thermal coefficient of expansion (CTE)=6 ~ 8ppm/ DEG C
DIELECTRIC CONSTANT ε: 9.66 ∽ 10.03
Copper sheet walks line density L/S:20 ∽ 50 μm
Pad density: 4000/ (200X200) μm
Aperture/pad footpath: 30/50 μm
Insulation resistance: 10
6Ω .m
CTE：4.5ppm/℃
Integrated circuit plate thickness 0.7 ~ 0.8mm
Embodiments provide a kind of LED epitaxial growth laminated circuit board based on inorganic matter, preparation technology is simple, can realize without the need to artificial automated production, thus reduce production cost; There is good intensity and high accuracy, can meet the pel spacing small size of LED display, high-precision requirement (as pel spacing be less than 1MM time), simultaneously by adopting LED lattice adaptation layer to form the lattice adaptation processing matched with LED wafer pad, thus the electrical connection be formed at better between LED wafer and physical connection.By circuit board sidewall protective layer structure, effectively eliminate in order to eliminate in subsequent technique and use procedure, the internal stress that in described LED epitaxial growth laminated circuit board, the coefficient of thermal expansion difference of each interlayer is brought.
Accordingly, the embodiment of the present invention two additionally provides the preparation method of the LED epitaxial growth laminated circuit board described in above-described embodiment.Wherein, central substrate, for SiC substrate, is described.
As shown in Figure 2, manufacture method of the present invention comprises the steps:
Step 201, to the whole plate plating conducting medium of SiC substrate;
Concrete, conducting medium can be the conducting metal comprising copper.Conducting metal can adopt plating or other modes to be laid in the upper and lower surface of SiC substrate.
Step 202, carries out the processing of laser drilling through hole to carborundum SiC substrate;
Concrete, to the SiC substrate after copper facing, can be by end face or by bottom surface, carry out laser drilling (laserdrilling) processes.Through laser drilling, SiC substrate forms patterned multiple through hole.
Step 203, to the whole plate plating conducting medium of SiC substrate; Wherein said through hole is filled completely by described conducting medium;
Concrete, conducting medium can be the conducting metal comprising copper.Conducting metal can adopt plating or other modes to be laid in the upper and lower surface of SiC substrate, and meanwhile, the through hole on SiC substrate is filled completely by conducting medium.Therefore the conducting medium of SiC substrate upper and lower surface realizes electrical connection by the conducting medium in through hole.
Step 204, graphically etches the conducting medium of the first surface of SiC substrate;
Concrete, the step of graphical etching can comprise:
A, pad pasting is carried out to the first surface of SiC substrate;
B, figure according to pre-designed needs, carry out contraposition and exposure to the first surface of SiC substrate; Because the film pasted is light-sensitive surface, can meet photocuring, therefore after exposure, the part be exposed forms one deck protection on conducting medium surface;
C, SiC substrate to be developed, get rid of the film be not cured;
D, the first surface of SiC substrate posting solidification diaphragm to be etched, by Graphic transitions on the first surface of substrate;
E, finally carry out taking off film process, remove solidification diaphragm.
Step 205, graphically etches the conducting medium of the second surface of SiC substrate;
This step is identical with the implementation of above-mentioned steps 203, and the second surface just for SiC substrate carries out.First surface and second surface are respectively the upper and lower surface of SiC substrate.Graphical etching can first be carried out upper surface, then carries out lower surface, or order also can be conversely.
Before step 204 and 205, preliminary treatment can also be carried out to the surface being about to be patterned immediately etching respectively.Before second surface is graphically etched, conservation treatment can also be carried out to the first surface graphically etched, avoid the damage causing first surface patterned conductive medium in the process graphically etched at second surface.
Further, the conducting medium of substrate base layer patternization etching forms multiple for carrying out with external chip or circuit the contact electrode that is electrically connected.
Step 206, vapor deposition SiO
2, form substrate protective layer;
Concrete, the SiO of vapor deposition
2be deposited on the upper and lower surface of SiC substrate;
The deposition thickness of substrate protective layer can sets itself as required, is preferably the thickness of the conducting medium of 10% ~ 20% top/bottom in this programme.
Usually, at vapor deposition SiO
2before, also surface clean preliminary treatment can be carried out to substrate.
Step 207, graphically etches the substrate protective layer of the upper surface of described SiC substrate, exposes metal pad electrode in patterned area;
Concrete, to the SiO of the upper surface of SiC substrate
2substrate protective layer graphically etches, and exposes the part as metal pad electrode in top layer conductive medium.Metal pad electrode is used for being electrically connected with LED.
Step 208, described metal pad electrode grows lattice adaptation layer; The lattice structure of described lattice adaptation layer is identical with the lattice structure of described LED.
Concrete, the material of lattice adaptation layer can comprise: in SiC, Cr, Ni, Au, Ti, Sn, ZnO, As, Ga, Ge, In any one or multiple.
Step 209, etching removes the SiO of described LED laminated circuit board side
2;
Step 210, at each side plated metal Ni of described LED epitaxial growth laminated circuit board, forms circuit board side wall protective layer.
Concrete, the SiO of the removal sidewall that above-mentioned steps 209 and step 210 describe
2plate Ni protective layer again; object is in the technique of follow-up LED lattice growth; up in the process environments of 600-1000 degree Celsius; the internal stress that the coefficient of thermal expansion can effectively eliminating each interlayer in LED epitaxial growth laminated circuit board brings; simultaneously due to the fusing point 1452 degree of Ni; more much higher than copper (1083 degree); its stability is in high temperature environments better; effective sealing can be carried out to the issuable copper distillation of layers of copper in basic unit's circuit board internal layer steam, pollute crystals growth equipment of heap of stone to avoid metallic vapour.
The preparation method of above-mentioned steps 201-step 210 provides the method preparing LED single layer substrate, if will prepare multilager base plate, can perform following steps before above-mentioned steps 206:
1) vapor deposition SiC, forms the packed layer of graphical etch areas and the surface insulation layer of SiC substrate;
2) surface insulation layer of described SiC substrate is graphically etched, be etched in patterned area and expose conducting medium;
3) to the whole plate plating conducting medium of SiC substrate;
4) conducting medium of the first surface of described SiC substrate is graphically etched;
5) conducting medium of the second surface of described SiC substrate is graphically etched.
Above-mentioned steps 1)-5) can the substrate number of plies as required and repeatedly repeating.
The manufacture method of the LED laminated circuit board based on inorganic matter provided by the invention, adopt inorganic matter SiC as substrate, substrate is prepared conductive layer and insulating barrier, and in outermost conductive layer, prepares lattice adaptation layer, directly on LED laminated circuit board, grow LED wafer provide possibility for follow-up.This method adopts manufacturing processes customary and conventional material to reduce production cost; by circuit board sidewall protective layer structure; effective elimination in order to eliminate in subsequent technique and use procedure, the internal stress brought of coefficient of thermal expansion difference of each interlayer in described LED epitaxial growth laminated circuit board.
Above-described embodiment; object of the present invention, technical scheme and beneficial effect are further described; be understood that; the foregoing is only the specific embodiment of the present invention; the protection range be not intended to limit the present invention; within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. based on a LED epitaxial growth laminated circuit board for inorganic matter, it is characterized in that, described circuit board comprises: central substrate, at least double layer of metal conductive layer, LED lattice adaptation layer and circuit board side wall protective layer;
Described central substrate is that inorganic matter is formed;
Described central substrate has electrical connection hole, in described electrical connection hole, be filled with the first conducting metal;
Described metal conducting layer has isolation channel;
Described at least double layer of metal conductive layer deposition, on the upper and lower surface of described central substrate, is connected by described electrical connection hole;
LED lattice adaptation layer is deposited on the surface of the side metal conducting layer for growing LED wafer;
Described circuit board side wall protective layer is the W metal layer of each side being plated on described LED epitaxial growth laminated circuit board, in order to eliminate in subsequent technique and use procedure, and the internal stress that in described LED epitaxial growth laminated circuit board, the coefficient of thermal expansion difference of each interlayer is brought;
Wherein, described metal conducting layer and the first conducting metal are sputtering or the metal-layer structure of electroplating deposition in described central substrate; Described isolation channel is the patterned structures of described metal conducting layer after photoetching, etching.
2. laminated circuit board according to claim 1, is characterized in that, deposits dielectric in the isolation channel of described metal conducting layer.
3. laminated circuit board according to claim 2, is characterized in that, in the isolation channel of described top-level metallic conductive layer, the thickness of the dielectric of deposition is 10% ~ 20% top-level metallic conductive layer thickness.
4. laminated circuit board according to claim 3, is characterized in that, described top-level metallic conductive layer is separated the LED eutectic pad forming multiple carrying LED wafer by described isolation channel.
5. laminated circuit board according to claim 1, is characterized in that, the bottom of described laminated circuit board has insulating protective layer, and the thickness of described insulating protective layer is 10% ~ 20% underlying metal conductive layer thickness.
6. laminated circuit board according to claim 5, is characterized in that, has pad hole in described insulating protective layer, is filled with the second conducting metal in described pad hole; When after removal insulating protective layer, described second conducting metal exposes from described pad hole, forms multiple contact electrode carrying out being electrically connected with external chip or circuit; Described contact electrode is connected with the underlying metal conductive layer of described laminated circuit board, thus forms the electrical connection between described laminated circuit board and external chip or circuit.
7. laminated circuit board according to claim 1, is characterized in that, described LED lattice adaptation layer is specially metal or nonmetal, comprises Cr, Ni, Au, Ti, Sn, in SiC, ZnO any one or multiple.
8. laminated circuit board according to claim 1, is characterized in that, described central substrate is specially: SiC substrate or SiC-Cu composite base plate.
9. a manufacture method for the LED laminated circuit board as described in claim as arbitrary in the claims 1-8, is characterized in that, described method comprises:
To the whole plate plating conducting medium of central substrate;
The processing of laser drilling through hole is carried out to central substrate;
To the whole plate plating conducting medium of central substrate; Wherein said through hole is filled completely by described conducting medium;
The conducting medium of the first surface of described central substrate is graphically etched;
The conducting medium of the second surface of described central substrate is graphically etched;
Vapor deposition SiO
2, form substrate protective layer;
The substrate protective layer of the upper surface of described central substrate is graphically etched, in patterned area, exposes metal pad electrode;
Described metal pad electrode grows lattice adaptation layer; The lattice structure of described lattice adaptation layer is identical with the lattice structure of described LED;
Etching removes the SiO of described LED laminated circuit board side
2;
At each side plated metal Ni of described LED epitaxial growth laminated circuit board, form circuit board side wall protective layer.
10. method according to claim 9, is characterized in that, at vapor deposition SiO
2, before forming substrate protective layer, described method is further comprising the steps of:
Vapor deposition SiC, forms the packed layer of graphical etch areas and the surface insulation layer of central substrate;
The surface insulation layer of described central substrate is graphically etched, is etched in patterned area and exposes conducting medium;
To the whole plate plating conducting medium of central substrate;
The conducting medium of the first surface of described central substrate is graphically etched;
The conducting medium of the second surface of described central substrate is graphically etched.
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