CN105354165A - PCIE network card and server system - Google Patents
PCIE network card and server system Download PDFInfo
- Publication number
- CN105354165A CN105354165A CN201510909164.0A CN201510909164A CN105354165A CN 105354165 A CN105354165 A CN 105354165A CN 201510909164 A CN201510909164 A CN 201510909164A CN 105354165 A CN105354165 A CN 105354165A
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- Prior art keywords
- signal
- pcie
- network interface
- server system
- interface card
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- 230000002093 peripheral effect Effects 0.000 claims abstract description 5
- 230000005540 biological transmission Effects 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 238000011900 installation process Methods 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 238000012544 monitoring process Methods 0.000 description 2
- 230000006855 networking Effects 0.000 description 2
- 238000010079 rubber tapping Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0024—Peripheral component interconnect [PCI]
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The invention discloses a PCIE network card and a server system, and belongs to the technical field of production and manufacturing of PCIE network cards of computers. The PCIE network card and server system comprises a processor system, a Baseboard Management Controller (BMC) system and a PCIE standard slot, wherein the PCIE standard slot is used for being connected with a PCIE network card of a high-speed peripheral device interconnection bus, a chip in a pin processor system for transmitting non-auxiliary signals in the PCIE standard slot is connected, pins for transmitting the auxiliary signals in the PCIE standard slot are connected with the chip in the BMC system, and NCSI signals are transmitted in a multiplexing mode. The PCIE network card and the server system have the advantages of simple production, manufacture and installation process and low cost, can realize the NCSI function of the PCIE network card, and have good popularization and application values.
Description
Technical field
The present invention relates to computer PCI E network interface card manufacturing technology field, a kind of PCIE network interface card and server system are specifically provided.
Background technology
In server system, generally include processor system and baseboard management controller (Baseboard
ManagementController, BMC) system.Wherein, processor system and interface thereof be process business band in system, its interface is called band inner joint; BMC system and interface thereof are the band external systems realizing system monitoring management, and its interface is called band external tapping.Band inner joint and band external tapping are all Ethernet interface usually.In tradition application, in band, Ethernet interface and out-of-band ethernet interface independently separate.Processor system is gone out high-speed peripheral device interconnection (PeripheralComponentInterconnectExpress, PCIE) bus, by being with interior Ethernet interface to be connected on ethernet controller in band (being called for short PCIE network interface card), the in-band information of transmission processor system; BMC system monitoring to band external information then transmitted by out-of-band ethernet interface.
At present in order to simplify networking, a kind of network controller side band interface (NetworkControllerSidebandInterface, NCSI) technology of back-level server outband management is proposed in prior art.In this NCSI technology, BMC system is gone out NCSI bus, be connected on PCIE network interface card, and pass through the network interface correspondence with foreign country of PCIE network interface card, and do not conflict mutually with the in-band communications of this network interface, make to be with interior Ethernet interface and out-of-band ethernet interface to unite two into one, in turn simplify networking cost-effective simultaneously.At present, above-mentioned NCSI technology is realized in order to make this server system, existing solution is that mainboard in server system and PCIE network interface card all reserve wire and cable connector, after PCIE network interface card inserts PCIE standard sockets, by cable the NCSI signal access PCIE network interface card in BMC system in mainboard.That is, in order to enable PCIE network interface card realize NCSI function, need extra increase by two wire and cable connectors and single line cable, there is the manufacturing and install loaded down with trivial details in this method, increases the defect of material and process and assemble cost.
Summary of the invention
Technical assignment of the present invention is for above-mentioned Problems existing, provides a kind of and manufactures installation process simply, the PCIE network interface card that cost is low and server system.
For achieving the above object, the invention provides following technical scheme:
A kind of PCIE network interface card and server system, comprise processor system, baseboard management controller BMC system and PCIE standard sockets, described PCIE standard sockets is for connecting the PCIE network interface card of high-speed peripheral device interconnection bus, the chip transmitted in PCIE standard sockets in the pin processor system of non-auxiliary signal connects, the pin transmitting auxiliary signal in PCIE standard sockets is connected with the chip in BMC system, multiplexing transmission NCSI signal.
As preferably, described defeated auxiliary signal comprises and retains RSVD signal, and at least one in JTAG signal and systems management bus SMBus signal is organized in joint test behavior.
As preferably, described SMBus signal comprises at least one of SMBus data SMDAT signal or SMBus clock SMCLK signal, described JTAG signal comprises jtag test reset TRST signal, jtag test clock input tck signal, jtag test data input TDI signal, jtag test data export at least one in TDO signal and jtag test selection tms signal.
As preferably, described NCSI signal comprises reference input clock signal REF_CLK, receive data valid signal CRS_DV, first receives data-signal RXD [1], second receives data-signal RXD [0], send enable signal TX_EN, first sends at least one in data-signal TXD [1] and the second transmission data-signal TXD [0].
As preferably, described PCIE standard sockets can be any one in X1, X4, X8 and X16 type.
The present invention has following outstanding beneficial effect: avoid the PCIE network interface card existed in prior art when realizing NCSI function, manufactures to install loaded down with trivial details, and the problem of high cost, use procedure is simple and convenient, has good practicality.
Accompanying drawing explanation
Fig. 1 is the structural representation of PCIE network interface card of the present invention and server system.
Embodiment
Below in conjunction with drawings and Examples, PCIE network interface card of the present invention and server system are described in further detail.
In the present invention, when not doing contrary explanation, the noun of locality such as " upper and lower, left and right " of use typically refers to reference to upper and lower, left and right shown in the drawings; " inside and outside " refers to profile inside and outside relative to each parts itself.
Embodiment
As shown in Figure 1, PCIE network interface card of the present invention and server system, comprise processor system, baseboard management controller BMC system and PCIE standard sockets, described PCIE standard sockets is for connecting the PCIE network interface card of high-speed peripheral device interconnection bus, the chip transmitted in PCIE standard sockets in the pin processor system of non-auxiliary signal connects, the pin transmitting auxiliary signal in PCIE standard sockets is connected with the chip in BMC system, multiplexing transmission NCSI signal.Defeated auxiliary signal comprises and retains RSVD signal, and at least one in JTAG signal and systems management bus SMBus signal is organized in joint test behavior.SMBus signal comprises at least one of SMBus data SMDAT signal or SMBus clock SMCLK signal, JTAG signal comprises jtag test reset TRST signal, jtag test clock input tck signal, jtag test data input TDI signal, jtag test data export at least one in TDO signal and jtag test selection tms signal.NCSI signal comprises reference input clock signal REF_CLK, receive data valid signal CRS_DV, first receives data-signal RXD [1], second receives data-signal RXD [0], send enable signal TX_EN, first sends at least one in data-signal TXD [1] and the second transmission data-signal TXD [0].PCIE standard sockets can be any one in X1, X4, X8 and X16 type.
Above-described embodiment, just the present invention's more preferably embodiment, the usual change that those skilled in the art carries out within the scope of technical solution of the present invention and replacement all should be included in protection scope of the present invention.
Claims (5)
1. a PCIE network interface card and server system, it is characterized in that: comprise processor system, baseboard management controller BMC system and PCIE standard sockets, described PCIE standard sockets is for connecting the PCIE network interface card of high-speed peripheral device interconnection bus, the chip transmitted in PCIE standard sockets in the pin processor system of non-auxiliary signal connects, the pin transmitting auxiliary signal in PCIE standard sockets is connected with the chip in BMC system, multiplexing transmission NCSI signal.
2. PCIE network interface card according to claim 1 and server system, is characterized in that: described defeated auxiliary signal comprises and retains RSVD signal, and at least one in JTAG signal and systems management bus SMBus signal is organized in joint test behavior.
3. PCIE network interface card according to claim 2 and server system, it is characterized in that: described SMBus signal comprises at least one of SMBus data SMDAT signal or SMBus clock SMCLK signal, described JTAG signal comprises jtag test reset TRST signal, jtag test clock input tck signal, jtag test data input TDI signal, jtag test data export at least one in TDO signal and jtag test selection tms signal.
4. the PCIE network interface card according to claim 1,2 or 3 and server system, it is characterized in that: described NCSI signal comprises reference input clock signal REF_CLK, receive data valid signal CRS_DV, first receives data-signal RXD [1], second receives data-signal RXD [0], send enable signal TX_EN, first sends at least one in data-signal TXD [1] and the second transmission data-signal TXD [0].
5. PCIE network interface card according to claim 4 and server system, is characterized in that: described PCIE standard sockets can be any one in X1, X4, X8 and X16 type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510909164.0A CN105354165A (en) | 2015-12-09 | 2015-12-09 | PCIE network card and server system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510909164.0A CN105354165A (en) | 2015-12-09 | 2015-12-09 | PCIE network card and server system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105354165A true CN105354165A (en) | 2016-02-24 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510909164.0A Pending CN105354165A (en) | 2015-12-09 | 2015-12-09 | PCIE network card and server system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105354165A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107395527A (en) * | 2017-08-30 | 2017-11-24 | 济南浪潮高新科技投资发展有限公司 | A kind of outband management system and method |
| CN108009114A (en) * | 2017-12-08 | 2018-05-08 | 郑州云海信息技术有限公司 | A kind of isometric structure of optimization NCSI clock cables |
| CN110489366A (en) * | 2019-07-12 | 2019-11-22 | 苏州浪潮智能科技有限公司 | A kind of server master board connector signal multiplex system |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103616937A (en) * | 2013-11-27 | 2014-03-05 | 华为技术有限公司 | Mainboard, PCIE network card and server system |
-
2015
- 2015-12-09 CN CN201510909164.0A patent/CN105354165A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103616937A (en) * | 2013-11-27 | 2014-03-05 | 华为技术有限公司 | Mainboard, PCIE network card and server system |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107395527A (en) * | 2017-08-30 | 2017-11-24 | 济南浪潮高新科技投资发展有限公司 | A kind of outband management system and method |
| CN108009114A (en) * | 2017-12-08 | 2018-05-08 | 郑州云海信息技术有限公司 | A kind of isometric structure of optimization NCSI clock cables |
| CN108009114B (en) * | 2017-12-08 | 2020-09-29 | 苏州浪潮智能科技有限公司 | Structure for optimizing equal length of NCSI clock signal line |
| CN110489366A (en) * | 2019-07-12 | 2019-11-22 | 苏州浪潮智能科技有限公司 | A kind of server master board connector signal multiplex system |
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| SE01 | Entry into force of request for substantive examination | ||
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Application publication date: 20160224 |