CN101782879A - Signal conversion device of all-in-one serial bus connector - Google Patents
Signal conversion device of all-in-one serial bus connector Download PDFInfo
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- CN101782879A CN101782879A CN200910002090A CN200910002090A CN101782879A CN 101782879 A CN101782879 A CN 101782879A CN 200910002090 A CN200910002090 A CN 200910002090A CN 200910002090 A CN200910002090 A CN 200910002090A CN 101782879 A CN101782879 A CN 101782879A
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Abstract
The invention relates to a signal conversion device of an all-in-one serial bus connector, comprising a plurality of external communication interfaces, an internal circuit communication interface and a processing unit, wherein the plurality of external communication interfaces are used for connecting corresponding connecting pins of the all-in-one serial bus connector; the processing unit is further electrically connected with the plurality of external communication interfaces and the internal communication interface and is used for periodically detecting all the external communication interfaces until a electronic device is plugged in any external communication interface correspondingly; and then the external communication interface with the plugged corresponding electronic device is subjected to signal two-way conversion with the internal communication interface for an internal circuit board to be communicated with electronic devices with different communication standards.
Description
Technical field
The invention relates to a kind of signal converter of electric power connector, refer to the chromacoder of a kind of all-in-one serial bus (BUS) connector especially.
Background technology
No matter be desktop PC or notebook at present, all provide the connector of a plurality of distinct communication standards, as the bridge of linking up between various electronic installations and the computing machine, universal sequence port 2.0 (USB2.0) for example, universal sequence port 3.0 (USB3.0) or outside sequence high-order technical configuration (eSATA) connectivity port etc., though it is rectangular-shaped that its outward appearance is prolate, but still be to take the counter body space, therefore existing people proposes three groups of connectors that apparent size is close and is integrated into two-in-one or three-in-one connector mutually, takies the counter body space with effective reduction.
Above-mentioned USB2.0 connectivity port comprises four supported signal pins (VBUS, D-, D+ and earth point) altogether, the USB3.0 connectivity port then further requires its reading speed and signal quality, remove and comprise USB2, outside the 0 four supported signal pins, other comprises five supported signal pins (RX-, RX+, earth point, TX-, TX+); Then comprise 7 supported signal pins (earth point, RX+, RX-, earth point, TX-, TX+, earth point) altogether as for the eSATA connectivity port.Present a kind of 2 in 1 connector socket that is integrated with USB3.0 and eSATA connectivity port d, its socket upper surface row is provided with eSATA and the shared signal pin of USB3.0, and the lower surface is then arranged and is provided with other four supported signals pin of USB3.0 relatively.Be with, if when 2 in 1 connector external has the electronic installation of USB3.0, its upper surface is USB2.0 four supported signal pins (VBUS, D-, D+, the ground wire) synchronization action of five supported signal pins (RX+, RX-, earth point, TX-, TX+, earth point) and lower surface wherein.When 2 in 1 connector external had the eSATA electronic installation, the signal pin of upper surface (earth point, RX+, RX-, earth point, TX-, TX+, earth point) began action again.
As shown in the above description, because this 2 in 1 connector can be pegged graft for the electronic component of USB system and two kinds of different interfaces of eSATA use at least, its corresponding signal controller that uses must be looked the interface specification of present grafting electronic installation, and normally and correctly exports corresponding USB or eSATA signal.Yet, because the USB3.0 and the eSATA signal pin of 2 in 1 connector are shared, when the computer main frame panel computing machine sends the distinct interface polling signal simultaneously, main frame can't correctly judge the signaling interface of the electronic installation of present grafting be actually USB3.0 also or the eSATA signaling interface; In order to solve this problem event one solution is proposed.
Summary of the invention
Because the signal of above-mentioned all-in-one connector transmission shortcoming, fundamental purpose of the present invention provides a kind of chromacoder of all-in-one serial bus connector, avoids the electronic installation because of grafting different size interface, and causes signal to interact.
Desiring to reach the employed major technique means of above-mentioned purpose is to make the chromacoder of this all-in-one serial bus connector comprise:
A plurality of external communication interface comprise universal sequence port 3.0 and eSATA at least, for corresponding connection of signal pin of all-in-one connector;
One intercommunication interface is for the communication bus connection of internal circuit board; And
One processing unit, connect these a plurality of external communication interface and intercommunication interface, and in have that an interface detects and converse routine, wherein this interface detection and converse routine periodically detect each external communication interface, and in judging that arbitrary communication interface replied detection signal, promptly initiatively inform internal circuit board, and read this external communication interface and intercommunication interface the conversion of signals form, make external communication interface and intercommunication interface carry out two-way communication correctly.
The present invention is mainly had this interface and is detected and converse routine in processing unit, and in regular turn and periodically a plurality of external communication interface are detected, in at the same time, only one group of external communication interface is wherein detected thus, to be checkedly measure specific external communication interface and have when replying correct detection signal, can initiatively see through the intercommunication interface and inform internal circuit board, make this external communication interface and intercommunication interface carry out the general information transmission again by processing unit; So, use computer installation of the present invention or electronic installation and all-in-one connector, all can confirm the terminal form of the external electronic of grafting at present effectively, reach the effect that correct signal transmits.
Description of drawings
Fig. 1 is the synoptic diagram of the present invention and a 2 in 1 connector and an internal circuit board line.
Fig. 2 is that the interface of processing unit of the present invention detects and the converse routine process flow diagram.
Fig. 3 is first subroutine flow chart of interface detection and converse routine.
Fig. 4 is second subroutine flow chart of interface detection and converse routine.
Drawing reference numeral:
10 signal converters, 11 first external communication interface
12 second external communication interface, 14 intercommunication interfaces
15 processing units, 20 connectors
21 first signal ports, 22 secondary signal ports
30 internal circuit boards, 31 communication buss
40 electronic installations
Embodiment
At first see also shown in Figure 1, preferred embodiment for chromacoder 10 of the present invention, line synoptic diagram with 2 in 1 connector 20 1 internal circuit boards 30 of a kind of USB3.0 and eSATA, wherein this internal circuit board is along with employed computer installation or electronic installation and difference is arranged, with desktop PC or mobile computer, this internal circuit board is motherboard, if be this external connection box internal control circuit plate with the computing machine external connection box.Wherein this chromacoder 10 comprises:
A plurality of external communication interface 11,12 comprise universal sequence port 3.0 and eSATA at least, for corresponding connection of signal pin of 2 in 1 connector 20;
One intercommunication interface 14 is for communication bus 31 connections of internal circuit board 30 correspondences; In present embodiment, this internal circuit board 30 is a motherboard, and intercommunication interface 14 is a PCI-E specification interface with communication bus 31; And
One processing unit 15, connect this a plurality of external communication interface 11,12 and intercommunication interface 14, and in have that an interface detects and converse routine, wherein this interface detection and converse routine periodically detect a plurality of external communication interface 11,12, judge whether arbitrary communication interface 11,12 has replied detection signal, if any answer, even read the conversion of signals form of this external communication interface 11,12 and intercommunication interface 14.
Please cooperate consult shown in Figure 2, be the interface detection of processing unit 15 and the flowchart of the binomial subroutine that converse routine comprised, promptly after processing unit 15 starts, give initialization 50 earlier and carry out this first and second subroutine more in regular turn, wherein when carrying out first subroutine 51, also periodically judge whether the electronic installation 40 on this first communication port 21 removes 52, if not, then carry out first subroutine 51, if then carry out second subroutine 53, equally when carrying out second subroutine 53, also periodically judge whether the electronic installation 40 on this second communication port 22 removes 54, if then judge whether to shut down 55 again, if still then return initialization 50 in open state; If shutdown then directly finishes 56.First subroutine and the second subroutine execution order can be exchanged.
Please cooperate and consult shown in Figure 3ly, be the detail flowchart of first subroutine, and first external communication interface is USB3.0 in the present embodiment, the downward compatible USB2.0 of USB3.0 first external communication interface, USB1.1 and USB1.0 again, and its this first subroutine comprises:
Give initialization 511 after the start earlier;
Export the detection signal 512 of first external communication interface 11;
Judge whether to receive answer detection signal 513; If not, then get back to Fig. 2 second subroutine A; If have, then representative has first communication port 21 that compatible electronic installation is plugged connector, judge whether to belong to USB3.0 agreement 514 according to replying detection signal again, if then make intercommunication interface 14 and USB3.0 first external communication interface 11 carry out bidirectional data transfers 515, make first the communication port 21 and bus-bar 31 two-way communications of communicating by letter; If do not belong to the USB3.0 agreement, then further judge whether to meet USB2.0 agreement 516, in case be judged as the USB2.0 agreement, then make USB2.0 that first external communication interface 11 is carried out bidirectional data transfers 517 with intercommunication interface 14; If do not belong to the USB2.0 agreement, further judge whether to meet USB1.X agreement 518 again, as USB1.0 or USB1.1, in case be judged as the USB1.X agreement, then make USB 1.X that the first communication external interface 11 carries out bidirectional data transfers 519 with intercommunication interface 14, carry out next step;
Get back to judging among Fig. 2 and carry out the second subroutine A1 in the step 52 whether first PERCOM peripheral communication port, 21 corresponding electronic installations removed.
Please cooperate and consult shown in Figure 4ly, be the detail flowchart of second subroutine, and this second external communication interface 12 is an eSATA in present embodiment, and its this second subroutine comprises:
Give initialization 531 after the start earlier;
Export the detection signal 532 of second external communication interface 12;
Judge whether to receive answer detection signal 533; If not, then get back to Fig. 2 first subroutine B if having, then the existing compatible electronic installation 40 of representative is plugged the second communication port 22 of connector, and make intercommunication interface 14 and 12 two-way communications 534 of eSATA second external communication interface, make eSATA second communication port 22 carry out bidirectional data transfers with bus-bar 31 two-way communications of communicating by letter; If not, then carry out next step;
Get back to the B1 in the step 54 whether second PERCOM peripheral communication port, 21 corresponding electronic installations removed that judges among Fig. 2.
As shown in the above description, present embodiment is the 2 in 1 connector use for a kind of USB3.0 and eSATA, and after start back or judgement electronic installation remove certainly, can periodically detect arbitrary external communication interface and whether receive the answer detection signal, and then judge that existing corresponding electronic installation inserts.For instance, has the external electronic of USB system joint if insert one at present, then the present invention carries out the USB3.0 communication port when detecting when seeing through first external communication interface, can correctly detect, and judge that further it meets the USB3.0/USB2.0/USB1.X agreement; Otherwise, if insert the electronic installation of a tool eSATA plug at present, then first external communication interface obtains incorrect answer detection signal, so can send the eSATA detection signal with second external communication interface more automatically, thus, can correctly detect the interface of pegging graft up till now is the eSATA interface, and makes second external communication interface and motherboard link up.Be with, adopt the present invention can avoid, and the specific communications port that can judge rightly has inserted corresponding electronic installation because of partly communication port shared signal pin phase mutual interference of 2 in 1 connector.
Claims (9)
1. the chromacoder of an all-in-one serial bus connector is characterized in that, described device comprises:
A plurality of external communication interface comprise the external communication interface of a universal sequence interface 3.0 and an outside sequence high-order technical configuration interface at least;
One intercommunication interface is for the communication bus connection of an internal circuit board; And
One processing unit, connect described a plurality of external communication interface and internal circuit communication interface, and in have that an interface detects and converse routine, wherein said interface detects and converse routine periodically detects a plurality of external communication interface in regular turn, and in judging that arbitrary communication interface replied detection signal, even read the conversion of signals form of described communication interface and motherboard communication interface.
2. the chromacoder of all-in-one serial bus connector as claimed in claim 1, it is characterized in that, the interface of described processing unit detects and converse routine comprises first and second subroutine, wherein said processing unit is from start back or do not have under the detection signal of the answer state, periodically carries out first and second subroutine.
3. the chromacoder of all-in-one serial bus connector as claimed in claim 2 is characterized in that, described first subroutine comprises:
Initialization;
Export the detection signal of first external communication interface;
Judge whether to receive the answer detection signal; If not, then carry out second subroutine; If have, then the existing compatible electronic installation of representative is plugged first communication port of connector, and makes first external communication interface and intercommunication Jie carry out bidirectional data transfers;
After judging that the corresponding electronic installation of definite first PERCOM peripheral communication has removed, carry out second subroutine.
4. the chromacoder of all-in-one serial bus connector as claimed in claim 3 is characterized in that, described second subroutine comprises:
Initialization;
Export the detection signal of second external communication interface;
Judge whether to receive the answer detection signal; If not, then carry out first subroutine; If have, then the existing compatible electronic installation of representative is plugged the second communication port of connector, and makes second external communication interface and intercommunication interface carry out bidirectional data transfers;
After judging that the corresponding electronic installation of definite second PERCOM peripheral communication has removed, carry out second subroutine.
5. the chromacoder of all-in-one serial bus connector as claimed in claim 4 is characterized in that, described first external communication interface is a universal sequence port 3.0, and described second external communication interface is outside sequence high-order technical configuration interface.
6. the chromacoder of all-in-one serial bus connector as claimed in claim 5 is characterized in that, the reception that judges whether of described first subroutine is replied the detection signal step and further comprised:
Judge whether described answer detection signal meets the USB3.0 agreement; If then make USB3.0 first external communication interface and intercommunication interface carry out bidirectional data transfers; If not, then carry out next step;
Judge whether described answer detection signal meets the USB2.0 agreement; If then make USB2.0 first external communication interface and intercommunication interface carry out bidirectional data transfers; If not, then carry out next step;
Judge whether described answer detection signal meets the USB1.X agreement; If then make USB1.X first external communication interface and intercommunication interface carry out bidirectional data transfers; If not, after then judgement determines that the corresponding electronic installation of first PERCOM peripheral communication has removed, carry out second subroutine.
7. the chromacoder of all-in-one serial bus connector as claimed in claim 4 is characterized in that, described second external communication interface is a universal sequence port 3.0, and first external communication interface is outside sequence high-order technical configuration interface.
8. the chromacoder of all-in-one serial bus connector as claimed in claim 7 is characterized in that, the reception that judges whether of described second subroutine is replied the detection signal step and further comprised:
Judge whether described answer detection signal meets the USB3.0 agreement; If then make USB3.0 second external communication interface and intercommunication interface carry out bidirectional data transfers; If not, then carry out next step;
Judge whether described answer detection signal meets the USB2.0 agreement; If then make USB2.0 second external communication interface and intercommunication interface carry out bidirectional data transfers; If not, then carry out next step;
Judge whether described answer detection signal meets the USB1.X agreement; If then make USB1.X second external communication interface and intercommunication interface carry out bidirectional data transfers; If not, after then judgement determines that the corresponding electronic installation of second PERCOM peripheral communication has removed, carry out first subroutine.
9. as the chromacoder of claim 6 or 8 described all-in-one serial bus connectors, it is characterized in that described inner panel communication interface is a PCI-E communication format.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910002090 CN101782879B (en) | 2009-01-16 | 2009-01-16 | Signal conversion device of all-in-one serial bus connector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910002090 CN101782879B (en) | 2009-01-16 | 2009-01-16 | Signal conversion device of all-in-one serial bus connector |
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| Publication Number | Publication Date |
|---|---|
| CN101782879A true CN101782879A (en) | 2010-07-21 |
| CN101782879B CN101782879B (en) | 2013-06-26 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 200910002090 Active CN101782879B (en) | 2009-01-16 | 2009-01-16 | Signal conversion device of all-in-one serial bus connector |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102609385A (en) * | 2010-11-29 | 2012-07-25 | 夏普株式会社 | Electronic equipment system, electronic equipment and connecting device |
| CN102722459A (en) * | 2011-03-11 | 2012-10-10 | 夏普株式会社 | Electronic equipment system, electronic equipment and connection equipment |
| CN102737002A (en) * | 2011-04-15 | 2012-10-17 | 夏普株式会社 | Interface device and wiring board |
| CN104834615A (en) * | 2015-04-29 | 2015-08-12 | 山东超越数控电子有限公司 | PS/2 (Personal Computer/2) and USB (Universal Serial Bus) adaptive structure and implementation method for same |
| CN103164380B (en) * | 2011-12-06 | 2017-04-12 | 费斯托股份有限两合公司 | Bus node and control system |
| CN110637235A (en) * | 2017-05-19 | 2019-12-31 | 格勒诺布尔理工学院 | Integrated circuit testing apparatus and method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080288703A1 (en) * | 2007-05-18 | 2008-11-20 | Technology Properties Limited | Method and Apparatus of Providing Power to an External Attachment Device via a Computing Device |
| CN101311916A (en) * | 2007-05-25 | 2008-11-26 | 佛山市顺德区汉达精密电子科技有限公司 | Transmission interface integration device |
-
2009
- 2009-01-16 CN CN 200910002090 patent/CN101782879B/en active Active
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102609385A (en) * | 2010-11-29 | 2012-07-25 | 夏普株式会社 | Electronic equipment system, electronic equipment and connecting device |
| CN102722459A (en) * | 2011-03-11 | 2012-10-10 | 夏普株式会社 | Electronic equipment system, electronic equipment and connection equipment |
| CN102737002A (en) * | 2011-04-15 | 2012-10-17 | 夏普株式会社 | Interface device and wiring board |
| CN102737002B (en) * | 2011-04-15 | 2015-04-08 | 夏普株式会社 | Interface device and wiring board |
| CN103164380B (en) * | 2011-12-06 | 2017-04-12 | 费斯托股份有限两合公司 | Bus node and control system |
| CN104834615A (en) * | 2015-04-29 | 2015-08-12 | 山东超越数控电子有限公司 | PS/2 (Personal Computer/2) and USB (Universal Serial Bus) adaptive structure and implementation method for same |
| CN110637235A (en) * | 2017-05-19 | 2019-12-31 | 格勒诺布尔理工学院 | Integrated circuit testing apparatus and method |
| CN110637235B (en) * | 2017-05-19 | 2022-07-15 | 格勒诺布尔理工学院 | Integrated circuit testing apparatus and method |
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| Publication number | Publication date |
|---|---|
| CN101782879B (en) | 2013-06-26 |
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Effective date of registration: 20210508 Address after: 1 / F, 7 / F, No. 83, Section 2, gongdaowu Road, East District, Hsinchu, Taiwan, China Patentee after: Asolid Technology Co.,Ltd. Address before: Hsinchu City, Taiwan, China Patentee before: INNOSTOR TECHNOLOGY Corp. |