CN105336745A - 低温多晶硅tft基板 - Google Patents

低温多晶硅tft基板 Download PDF

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CN105336745A
CN105336745A CN201510641280.9A CN201510641280A CN105336745A CN 105336745 A CN105336745 A CN 105336745A CN 201510641280 A CN201510641280 A CN 201510641280A CN 105336745 A CN105336745 A CN 105336745A
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low temperature
polycrystalline silicon
temperature polycrystalline
layer
tft substrate
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CN105336745B (zh
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许勇
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Wuhan China Star Optoelectronics Technology Co Ltd
TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to PCT/CN2015/092792 priority patent/WO2017054271A1/zh
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Abstract

本发明提供一种低温多晶硅TFT基板，其黑色矩阵位于低温多晶硅TFT基板的第一缓冲层上，TFT器件位于被黑色矩阵遮盖的区域，可避免TFT器件受到光照影响，确保TFT器件的稳定性；并且省去了一道遮光金属层的制程，减少一道光罩，节约了生产成本，使得黑色矩阵在实现自身作用(遮挡像素漏光)的同时，还可代替现有技术中的遮光金属层实现对TFT器件的遮光，实现了双重作用。

Description

低温多晶硅TFT基板
技术领域
本发明涉及显示技术领域，尤其涉及一种低温多晶硅TFT基板。
背景技术
低温多晶硅(LowTemperaturePoly-silicon，LTPS)薄膜晶体管(ThinFilmTransistor，TFT)在高分辨率有源液晶显示器(ActiveMatrixLiquidCrystalDisplay，AMLCD)以及有机发光二极管(Active-MatrixOrganicLightEmittingDiode，AMOLED)显示器领域有很大的应用价值和潜力。
与非晶硅(a-Si)技术相比，LTPSTFT的迁移率高，器件稳定性好。LTPSTFT的迁移率可达几十至几百cm2/Vs，可以满足高分辨率AMLCD及AMOLED显示器的要求。因此，低温多晶硅显示器的反应速度较快，且有高亮度、高解析度与低耗电量等优点。除了作为像素开关，LTPSTFT还可以构建周边驱动电路，实现片上集成***。
但是多晶硅受光照影响会造成器件不稳定，漏电流增大，造成面板显示不正常，因此一般在制作TFT器件之前要制作一道遮光金属层(ShieldingMetal)进行遮光。
请参阅图1，为一种现有的低温多晶硅TFT基板的剖面结构示意图。在制作TFT器件300之前，先在基板100上制作遮光金属层200，然后制作TFT器件300，所述遮光金属层200可以实现对TFT器件300所在的区域进行遮光，避免了TFT器件300中的多晶硅层400受到光照影响，保证了TFT器件300的稳定性。
但是，单独制作一道遮光金属层200就意味着需要在制程中多使用一道光罩，这样既增加了制程，降低了生产效率，同时也造成了生产成本的提升。
发明内容
本发明的目的在于提供一种低温多晶硅TFT基板，采用黑色矩代替遮光金属层对TFT器件进行遮盖，保证TFT器件的性能稳定，同时节约了生产成本。
为实现上述目的，本发明提供一种低温多晶硅TFT基板，包括基板、设于所述基板上的第一缓冲层、设于所述第一缓冲层上的黑色矩阵、设于所述第一缓冲层与黑色矩阵上的第二缓冲层、设于所述第二缓冲层上的多晶硅层、设于所述多晶硅层上的栅极绝缘层、设于所述栅极绝缘层上的栅极、设于所述栅极绝缘层与栅极上的层间绝缘层、设于所述层间绝缘层上的源极与漏极、设于所述层间绝缘层、源极、及漏极上的平坦层、设于所述平坦层上的公共电极、设于所述公共电极上的钝化层、及设于所述钝化层上的像素电极；
其中，所述源极、漏极、栅极、及多晶硅层构成一TFT器件，所述黑色矩阵遮盖所述TFT器件所在的区域，避免TFT器件受光照影响。
所述多晶硅层包括位于中间的沟道区、位于两端的N型重掺杂区、及位于所述沟道区与N型重掺杂区之间的N型轻掺杂区。
所述栅极绝缘层、及层间绝缘层上对应所述N型重掺杂区的上方形成有第一过孔，所述源极与漏极分别经由所述第一过孔与所述N型重掺杂区相接触。
所述平坦层上对应所述漏极的上方形成有第二过孔，所述钝化层包覆该第二过孔，并且所述钝化层位于该第二过孔底部的部分上形成有第三过孔，所述像素电极经由所述第三过孔与所述漏极相接触。
所述公共电极与像素电极之间形成存储电容。
所述基板为玻璃基板；所述第一缓冲层为氧化硅层；所述第二缓冲层为氮化硅层。
所述多晶硅层的材料为低温多晶硅；所述栅极绝缘层为氮化硅层、氧化硅层、或二者的复合层。
所述栅极、源极、漏极的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。
所述层间绝缘层为氮化硅层、氧化硅层、或二者的复合层。
所述公共电极、及像素电极的材料均为ITO。
本发明的有益效果：本发明提供一种低温多晶硅TFT基板，黑色矩阵位于低温多晶硅TFT基板的第一缓冲层上，TFT器件位于被黑色矩阵遮盖的区域，可避免TFT器件受到光照影响，确保TFT器件的稳定性；并且省去了一道遮光金属层的制程，减少一道光罩，节约了生产成本，使得黑色矩阵在实现自身作用(遮挡像素漏光)的同时，还可代替现有技术中的遮光金属层实现对TFT器件的遮光，实现了双重作用。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为一种现有的低温多晶硅TFT基板的剖面结构示意图；
图2为本发明的低温多晶硅TFT基板的剖面结构示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2，本发明提供一种低温多晶硅TFT基板，包括基板1、设于所述基板1上的第一缓冲层31、设于所述第一缓冲层31上的黑色矩阵2、设于所述第一缓冲层31与黑色矩阵2上的第二缓冲层32、设于所述第二缓冲层32上的多晶硅层4、设于所述多晶硅层4上的栅极绝缘层5、设于所述栅极绝缘层5上的栅极6、设于所述栅极绝缘层5与栅极6上的层间绝缘层7、设于所述层间绝缘层7上的源极81与漏极82、设于所述层间绝缘层7、源极81、及漏极82上的平坦层9、设于所述平坦层9上的公共电极91、设于所述公共电极91上的钝化层92、及设于所述钝化层92上的像素电极93；
其中，所述源极81、漏极82、栅极6、及多晶硅层4构成一TFT器件10，所述黑色矩阵2遮盖所述TFT器件10所在的区域，避免TFT器件10受光照影响，确保TFT器件10的稳定性。所述黑色矩阵2在实现自身作用(遮挡像素漏光)的同时，还可代替现有技术中的遮光金属层实现对TFT器件10的遮光，实现了双重作用，并且省去了一道遮光金属层的制程，减少一道光罩，节约了生产成本。
具体的，所述多晶硅层4包括位于中间的沟道区41、位于两端的N型重掺杂区42、及位于所述沟道区41与N型重掺杂区42之间的N型轻掺杂区43。
具体的，所述栅极绝缘层5、及层间绝缘层7上对应所述N型重掺杂区42的上方形成有第一过孔80，所述源极81与漏极82分别经由所述第一过孔80与所述N型重掺杂区42相接触。
具体的，所述平坦层9上对应所述漏极82的上方形成有第二过孔90，所述钝化层92包覆该第二过孔90，并且所述钝化层92位于该第二过孔90底部的部分上形成有第三过孔95，所述像素电极93经由所述第三过孔95与所述漏极82相接触。
具体的，所述公共电极91与像素电极93之间形成存储电容Cst。
优选的，所述基板1为玻璃基板；所述第一缓冲层31为氧化硅(SiO2)层；所述第二缓冲层32为氮化硅(SiNx)层。
所述多晶硅层4的材料为低温多晶硅；所述栅极绝缘层5为氮化硅层、氧化硅层、或二者的复合层。
所述栅极6、源极81、漏极82的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。
所述层间绝缘层7为氮化硅层、氧化硅层、或二者的复合层。
所述公共电极91、及像素电极93的材料均为ITO(氧化铟锡)。
综上所述，本发明提供一种低温多晶硅TFT基板，黑色矩阵位于低温多晶硅TFT基板的第一缓冲层上，TFT器件位于被黑色矩阵遮盖的区域，可避免TFT器件受到光照影响，确保TFT器件的稳定性；并且省去了一道遮光金属层的制程，减少一道光罩，节约了生产成本，使得黑色矩阵在实现自身作用(遮挡像素漏光)的同时，还可代替现有技术中的遮光金属层实现对TFT器件的遮光，实现了双重作用。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (10)

1.一种低温多晶硅TFT基板，其特征在于，包括基板(1)、设于所述基板(1)上的第一缓冲层(31)、设于所述第一缓冲层(31)上的黑色矩阵(2)、设于所述第一缓冲层(31)与黑色矩阵(2)上的第二缓冲层(32)、设于所述第二缓冲层(32)上的多晶硅层(4)、设于所述多晶硅层(4)上的栅极绝缘层(5)、设于所述栅极绝缘层(5)上的栅极(6)、设于所述栅极绝缘层(5)与栅极(6)上的层间绝缘层(7)、设于所述层间绝缘层(7)上的源极(81)与漏极(82)、设于所述层间绝缘层(7)、源极(81)、及漏极(82)上的平坦层(9)、设于所述平坦层(9)上的公共电极(91)、设于所述公共电极(91)上的钝化层(92)、及设于所述钝化层(92)上的像素电极(93)；
其中，所述源极(81)、漏极(82)、栅极(6)、及多晶硅层(4)构成一TFT器件(10)，所述黑色矩阵(2)遮盖所述TFT器件(10)所在的区域，避免TFT器件(10)受光照影响。
2.如权利要求1所述的低温多晶硅TFT基板，其特征在于，所述多晶硅层(4)包括位于中间的沟道区(41)、位于两端的N型重掺杂区(42)、及位于所述沟道区(41)与N型重掺杂区(42)之间的N型轻掺杂区(43)。
3.如权利要求2所述的低温多晶硅TFT基板，其特征在于，所述栅极绝缘层(5)、及层间绝缘层(7)上对应所述N型重掺杂区(42)的上方形成有第一过孔(80)，所述源极(81)与漏极(82)分别经由所述第一过孔(80)与所述N型重掺杂区(42)相接触。
4.如权利要求1所述的低温多晶硅TFT基板，其特征在于，所述平坦层(9)上对应所述漏极(82)的上方形成有第二过孔(90)，所述钝化层(92)包覆该第二过孔(90)，并且所述钝化层(92)位于该第二过孔(90)底部的部分上形成有第三过孔(95)，所述像素电极(93)经由所述第三过孔(95)与所述漏极(82)相接触。
5.如权利要求1所述的低温多晶硅TFT基板，其特征在于，所述公共电极(91)与像素电极(93)之间形成存储电容。
6.如权利要求1所述的低温多晶硅TFT基板，其特征在于，所述基板(1)为玻璃基板；所述第一缓冲层(31)为氧化硅层；所述第二缓冲层(32)为氮化硅层。
7.如权利要求1所述的低温多晶硅TFT基板，其特征在于，所述多晶硅层(4)的材料为低温多晶硅；所述栅极绝缘层(5)为氮化硅层、氧化硅层、或二者的复合层。
8.如权利要求1所述的低温多晶硅TFT基板，其特征在于，所述栅极(6)、源极(81)、漏极(82)的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。
9.如权利要求1所述的低温多晶硅TFT基板，其特征在于，所述层间绝缘层(7)为氮化硅层、氧化硅层、或二者的复合层。
10.如权利要求1所述的低温多晶硅TFT基板，其特征在于，所述公共电极(91)、及像素电极(93)的材料均为ITO。
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