CN105226962B - Intelligent power module and air conditioner - Google Patents
Intelligent power module and air conditioner Download PDFInfo
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- CN105226962B CN105226962B CN201510641633.5A CN201510641633A CN105226962B CN 105226962 B CN105226962 B CN 105226962B CN 201510641633 A CN201510641633 A CN 201510641633A CN 105226962 B CN105226962 B CN 105226962B
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Abstract
The present invention provides a kind of intelligent power module and air conditioner, intelligent power module includes：Bridge arm signal input part, three-phase lower bridge arm signal input part and temperature detection end on three-phase；It is provided on HVIC pipes and is respectively connected to the terminals of bridge arm signal input part and three-phase lower bridge arm signal input part on three-phase, and the first port corresponding to temperature detection end, first port can export corresponding voltage value according to the change in resistance of thermistor in intelligent power module；The input terminal of self-checking circuit is connected to bridge arm signal input part in U phases, the output terminal of self-checking circuit is connected to the U phases higher-pressure region signal output end of HVIC pipes, the input/output terminal of self-checking circuit is connected to the first port, self-checking circuit is used to the signal of bridge arm signal input part in U phases being sent to U phases higher-pressure region signal output end, and when HVIC pipes originate work, thermistor is detected, to be compensated when detecting thermistor exception to the resistance value of thermistor.
Description
Technical field
The present invention relates to intelligent power module technical field, in particular to a kind of intelligent power module and a kind of sky
Adjust device.
Background technology
Intelligent power module (Intelligent Power Module, abbreviation IPM) is a kind of by power electronics deviding device
The analog line driver that part and integrated circuit technique integrate, intelligent power module include device for power switching and high drive
Circuit, and with fault detection circuits such as overvoltage, overcurrent and overheats.The logic input terminal of intelligent power module receives master control
The control signal of device processed, output terminal driving compressor or subsequent conditioning circuit work, while the system status signal detected is sent back to
Master controller.Relative to traditional discrete scheme, intelligent power module has high integration, high reliability, self-test and protection circuit
Etc. advantages, be particularly suitable for the frequency converter of driving motor and various inverters, be frequency control, metallurgical machinery, electric propulsion,
The desired power level electronic device of servo-drive, frequency-conversion domestic electric appliances.
The structure diagram of existing Intelligent power module circuit as shown in Figure 1, TTRIP ports as temperature detection end,
Commonly used in passing through the change of NTC (Negative Temperature Coefficient, negative temperature coefficient) thermistor resistance value
Change and export different voltage, subsequent conditioning circuit is controlled by detecting the variation of this voltage value or the variation of intelligent power module temperature
Intelligent power module processed works, and specifically, when the voltage detected is less than a certain particular value, i.e., temperature is higher than a certain specific
During value, control intelligent power module is stopped and intelligent power module is made to cool down, and intelligent power module is avoided to be operated in temperature mistake
High state and thermal breakdown occurs.
But with the development of semiconductor technology, IGBT (Insulated Gate Bipolar Transistor, insulation
Grid bipolar transistor) and HVIC (High Voltage integrated circuit, high voltage integrated circuit) service life
It is continuously improved, generally there is the service life of 5~8 years, and NTC flows continuously through electric current at high temperature, temperature variation curve makes
Start to deteriorate with after 3~5 years.Specifically as shown in Fig. 2, resistance values of the NTC under later stage of life, room temperature does not have significant change, but
As the temperature increases, resistance value is decreased obviously under high temperature, and peripheral circuit is generally detected fixed resistance value Rth, once
Resistance value is less than Rth, i.e. trigger protection, therefore with the deterioration of NTC, the temperature of trigger protection is reduced to T1 from T2.
In general, intelligent power module can be operated in 125 DEG C of environment, thus T2 temperature be typically designed as 100 DEG C with
On, but with the deterioration of NTC thermistor, temperature T1 when resistance drops to Rth is smaller than T2, once T1 is less than 80 DEG C, mould
Block will be difficult to work normally, and module is caused to scrap, then makes systemic breakdown.In the Material Cost of intelligent power module, temperature-sensitive
The price of resistance is very low, how to avoid intelligent power module being caused to fail due to the deterioration of thermistor, is current intelligent power
Module urgent problem to be solved.
Invention content
The present invention is directed at least solve one of technical problem present in the prior art or the relevant technologies.
For this purpose, an object of the present invention is to provide a kind of new intelligent power module, it can be in intelligent power mould
Block originate work when, thermistor is detected, with when detecting the thermistor exception to the thermistor
Resistance value compensates, and substantially extends the service life of intelligent power module, improves the service life of intelligent power module.
To achieve the above object, embodiment according to the first aspect of the invention, it is proposed that a kind of intelligent power module, packet
It includes：Bridge arm signal input part, three-phase lower bridge arm signal input part and temperature detection end on three-phase；HVIC is managed, on the HVIC pipes
It is provided with and is respectively connected to the terminals of bridge arm signal input part and the three-phase lower bridge arm signal input part on the three-phase, with
And the first port corresponding to the temperature detection end, the first port are connected by connecting line with the temperature detection end,
The first port can export corresponding voltage value according to the change in resistance of thermistor in the intelligent power module；Self-test electricity
Road, the low-pressure area power supply anode and cathode of the self-checking circuit are respectively connected to the low-pressure area confession of the intelligent power module
Electric power positive end and negative terminal, the higher-pressure region power supply anode and cathode of the self-checking circuit are respectively connected to the intelligent power
The U phases higher-pressure region power supply anode and negative terminal of module, the input terminal of the self-checking circuit are connected to the intelligent power module
U phases on bridge arm signal input part, the output terminal of the self-checking circuit is connected to the U phases higher-pressure region signal output of the HVIC pipes
End, the input/output terminal of the self-checking circuit are connected to the first port, and the self-checking circuit is used for bridge arm in the U phases
The signal of signal input part is sent to the U phases higher-pressure region signal output end, and when the HVIC pipes originate work, to described
Thermistor is detected, to be compensated when detecting the thermistor exception to the resistance value of the thermistor.
Intelligent power module according to an embodiment of the invention, by setting self-checking circuit when HVIC pipes originate work,
Thermistor is detected, to be compensated when detecting the thermistor exception to the resistance value of the thermistor,
The service life of intelligent power module can substantially be extended, the service life of intelligent power module is improved, for intelligent power
The application of the high-end applications occasion of module plays an important role.
Intelligent power module according to the abovementioned embodiments of the present invention can also have following technical characteristic：
According to one embodiment of present invention, the self-checking circuit includes：
Input circuit, the power supply anode and cathode of the input circuit are respectively as the low-pressure area of the self-checking circuit
Power supply anode and cathode, the input terminal of the input terminal of the input circuit as the self-checking circuit, the input circuit
Output terminal be connected to the input terminal of the first NOT gate, the output terminal of first NOT gate is connected to the input terminal of the second NOT gate, institute
The output terminal for stating the second NOT gate is connected to the first input end of the first NAND gate, the input circuit be used for the signal of input into
Row noise filtering is handled；
Third NOT gate, the input terminal of the third NOT gate are connected to the input terminal of first NOT gate, the third NOT gate
Output terminal be connected to the input terminal of first resistor, the output terminal of the first resistor is connected to the input terminal of the 4th NOT gate, institute
The output terminal for stating the 4th NOT gate is connected to the input terminal of the 5th NOT gate, the output terminal of the 5th NOT gate be connected to described first with
Second input terminal of NOT gate, the output terminal of first NAND gate are connected to the input terminal of the 6th NOT gate, the 6th NOT gate
Output terminal is connected to the grid of the first DMOS pipe, and the substrate of first DMOS pipe is connected to the intelligent work(after being connected with source electrode
The low-pressure area power supply negative terminal of rate module；
First capacitance, the first end of first capacitance are connected to the input terminal of the 4th NOT gate, first capacitance
Second end be connected to the low-pressure area power supply negative terminal of the intelligent power module；
7th NOT gate, the input terminal of the 7th NOT gate are connected to the output terminal of the input circuit, the 7th NOT gate
Output terminal be connected to the first input end of the second NAND gate；
8th NOT gate, the input terminal of the 8th NOT gate are connected to the output terminal of the input circuit, the 8th NOT gate
Output terminal be connected to the first end of second resistance, the second end of the second resistance is connected to the input terminal of the 9th NOT gate, institute
The output terminal for stating the 9th NOT gate is connected to the second input terminal of second NAND gate, the output terminal connection of second NAND gate
To the input terminal of the tenth NOT gate, the output terminal of the tenth NOT gate is connected to the grid of the second DMOS pipe, second DMOS pipe
Substrate be connected with source electrode after be connected to the low-pressure area power supply negative terminal of the intelligent power module；
Second capacitance, the first end of second capacitance are connected to the input terminal of the 9th NOT gate, second capacitance
Second end be connected to the low-pressure area power supply negative terminal of the intelligent power module；
First rest-set flip-flop, the S ends of first rest-set flip-flop are connected to the output terminal of the tenth NOT gate, and described first
The R ends of rest-set flip-flop are connected to the low-pressure area power supply negative terminal of the intelligent power module, the Q ends of first rest-set flip-flop
The fixing end of the first analog switch is connected to, the selection end of first analog switch is connected to the input terminal of the 11st NOT gate,
The output terminal of 11st NOT gate is connected to the input terminal of the 12nd NOT gate, and the output terminal of the 12nd NOT gate is connected to
The input terminal of 13 NOT gates, the output terminal of the 13rd NOT gate are connected to the input terminal of the 14th NOT gate, and the described 14th is non-
The output terminal of door is connected to the S ends of the second rest-set flip-flop, and the R ends of second rest-set flip-flop are connected to the intelligent power module
Low-pressure area power supply negative terminal, the Q ends of second rest-set flip-flop are connected to the control terminal of first analog switch；
Voltage comparator, the positive input terminal of the voltage comparator are connected to the selection end of the second analog switch, and described
The control terminal of two analog switches is connected to the output terminal of the 14th NOT gate, and the fixing end of second analog switch is connected to
The anode of first voltage source, the low-pressure area power supply that the negative terminal of the first voltage source is connected to the intelligent power module are born
End, the negative input end of the voltage comparator are connected to the first end of the thermistor, and the second end of the thermistor connects
The low-pressure area power supply negative terminal of the intelligent power module is connected to, the output terminal of the voltage comparator is connected to the 3rd RS and touches
The S ends of device are sent out, the R ends of the third rest-set flip-flop are connected to the low-pressure area power supply negative terminal of the intelligent power module, institute
The Q ends for stating third rest-set flip-flop are connected to the control terminal of third analog switch, and the fixing end of the third analog switch is connected to
The first end of the thermistor, the first choice end of the third analog switch is as the first port, the third mould
The the second selection end for intending switch is connected to the first end of first resistor, and the second end of the first resistor is connected to the third mould
Intend the first choice end of switch；
4th analog switch, the control terminal of the 4th analog switch are connected to the input terminal of the 13rd NOT gate, institute
The fixing end for stating the 4th analog switch is connected to the negative input end of the voltage comparator, the selection end of the 4th analog switch
The anode of the second voltage source is connected to, the negative terminal of the second voltage source is connected to the power supply anode of the input circuit；
Output circuit, the power supply anode and cathode of the output circuit are respectively as the higher-pressure region of the self-checking circuit
Power supply anode and cathode, the first input end of the output circuit is connected to the drain electrode of first DMOS pipe, described defeated
The second input terminal for going out circuit is connected to the drain electrode of second DMOS pipe, and the output terminal of the output circuit is as the self-test
The output terminal of circuit, the output circuit are used for the pulse signal of the output circuit first input end and the second input terminal
Pulse signal processing for it is on the basis of the U phases higher-pressure region power supply negative terminal of the intelligent power module and with the intelligent work(
The consistent continuous signal of the input signal phase of bridge arm signal input part in the U phases of rate module；
5th analog switch, the fixing end of the 5th analog switch is connected to the output terminal of the input circuit, described
The control terminal of 5th analog switch is connected to the input terminal of the 11st NOT gate, the selection end connection of the 5th analog switch
To the grid of third DMOS pipe, the substrate of the third DMOS pipe is connected to the low of the intelligent power module after being connected with source electrode
Pressure area power supply negative terminal, the drain electrode of the third DMOS pipe are connected to the first end of second resistance, and the of the second resistance
Two ends are connected to the power supply anode of the output circuit.
According to one embodiment of present invention, boostrap circuit is further included, the boostrap circuit includes：First two poles of bootstrapping
Pipe, the anode of first bootstrap diode are connected to the low-pressure area power supply anode of the intelligent power module, and described the
The cathode of one bootstrap diode is connected to the U phases higher-pressure region power supply anode；Second bootstrap diode, second bootstrapping
The anode of diode is connected to the low-pressure area power supply anode of the intelligent power module, the moon of second bootstrap diode
Pole is connected to the V phases higher-pressure region power supply anode of the intelligent power module；Third bootstrap diode, the third bootstrapping two
The anode of pole pipe is connected to the low-pressure area power supply anode of the intelligent power module, the cathode of the third bootstrap diode
It is connected to the W phases higher-pressure region power supply anode of the intelligent power module.
According to one embodiment of present invention, it further includes：Bridge arm circuit on three-phase, it is every in bridge arm circuit on the three-phase
The input terminal of bridge arm circuit is connected to the signal output end that phase is corresponded in the three-phase high-voltage area of the HVIC pipes in one phase；Under three-phase
Bridge arm circuit, the input terminal of each phase lower bridge arm circuit in the three-phase lower bridge arm circuit are connected to the three-phase of the HVIC pipes
The signal output end of phase is corresponded in low-pressure area.
Wherein, bridge arm circuit includes on three-phase：Bridge arm circuit in U phases, bridge arm circuit in V phases, bridge arm circuit in W phases；Three
Phase lower bridge arm circuit includes：U phase lower bridge arms circuit, V phase lower bridge arms circuit, W phase lower bridge arm circuits.
According to one embodiment of present invention, bridge arm circuit includes in each phase：First power switch pipe and first
Diode, the anode of first diode are connected to the emitter of first power switch pipe, first diode
Cathode is connected to the collector of first power switch pipe, and the collector of first power switch pipe is connected to the intelligence
The high voltage input terminal of power module, the input of the base stage of first power switch pipe as bridge arm circuit in each phase
End, the emitter of first power switch pipe, which is connected to the intelligent power module and corresponds to the higher-pressure region power supply of phase, to be born
End.
Wherein, the first power switch pipe can be IGBT (Insulated Gate Bipolar Transistor, insulation
Grid bipolar transistor).
According to one embodiment of present invention, each phase lower bridge arm circuit includes：Second power switch pipe and second
Diode, the anode of second diode are connected to the emitter of second power switch pipe, second diode
Cathode is connected to the collector of second power switch pipe, and the collector of second power switch pipe is connected on corresponding
The anode of first diode in bridge arm circuit, the base stage of second power switch pipe is as each phase lower bridge arm
The input terminal of circuit.
Wherein, the second power switch pipe can be IGBT (Insulated Gate Bipolar Transistor, insulation
Grid bipolar transistor).
According to one embodiment of present invention, the hair of second power switch pipe in each phase lower bridge arm circuit
Low reference voltage end of the emitter-base bandgap grading as the correspondence phase of the intelligent power module.
According to one embodiment of present invention, the voltage of the high voltage input terminal of the intelligent power module is 300V.
According to one embodiment of present invention, the higher-pressure region power supply anode of each phase and higher-pressure region in the HVIC pipes
Filter capacitor is connected between power supply negative terminal.
Embodiment according to a second aspect of the present invention, it is also proposed that a kind of air conditioner, including：Such as any of the above-described embodiment
Described in intelligent power module.
The additional aspect and advantage of the present invention will be set forth in part in the description, and will partly become from the following description
It obtains significantly or is recognized by the practice of the present invention.
Description of the drawings
The above-mentioned and/or additional aspect and advantage of the present invention will become in the description from combination accompanying drawings below to embodiment
Significantly and it is readily appreciated that, wherein：
Fig. 1 shows the structure diagram of the intelligent power module in the relevant technologies；
Fig. 2 shows thermistor later stage of life resistance value variation with temperature relation schematic diagram；
Fig. 3 shows the structure diagram of intelligent power module according to an embodiment of the invention；
Fig. 4 shows the internal structure schematic diagram of self-checking circuit according to an embodiment of the invention.
Specific embodiment
It is to better understand the objects, features and advantages of the present invention, below in conjunction with the accompanying drawings and specific real
Mode is applied the present invention is further described in detail.It should be noted that in the absence of conflict, the implementation of the application
Feature in example and embodiment can be combined with each other.
Many details are elaborated in the following description to facilitate a thorough understanding of the present invention, still, the present invention may be used also
To be implemented using other different from other modes described here, therefore, protection scope of the present invention is not by described below
Specific embodiment limitation.
Fig. 3 shows the structure diagram of intelligent power module according to an embodiment of the invention.
As shown in figure 3, intelligent power module according to an embodiment of the invention, including：HVIC pipes 1101 and self-checking circuit
1105。
Wherein, inside HVIC pipes 1101：
HIN1 ends connect the input terminal of self-checking circuit 1105；TTRIP ends connect the input/output terminal of self-checking circuit 1105；
VCC ends connect the low-pressure area power supply anode of self-checking circuit 1105；The low-pressure area power supply electricity of GND ends connection self-checking circuit 1105
Source negative terminal；VB1 ends connect the higher-pressure region power supply anode of self-checking circuit 1105；VS1 ends connect the high pressure of self-checking circuit 1105
Area's power supply negative terminal；The output terminal of self-checking circuit 1105 is connected with HO1.
1101 inside also boostrap circuit structure of HVIC pipes is as follows：
VCC ends are connected with the anode of bootstrap diode 1102, bootstrap diode 1103, bootstrap diode 1104；Bootstrapping two
The cathode of pole pipe 1102 is connected with the VB1 of HVIC pipes 1101；The VB2 phases of the cathode of bootstrap diode 1103 and HVIC pipes 1101
Even；The cathode of bootstrap diode 1104 is connected with the VB3 of HVIC pipes 1101.
The HIN1 ends of HVIC pipes 1101 are bridge arm signal input part UHIN in the U phases of intelligent power module 1100；HVIC is managed
1101 HIN2 ends are bridge arm signal input part VHIN in the V phases of intelligent power module 1100；The HIN3 ends of HVIC pipes 1101 are
Bridge arm signal input part WHIN in the W phases of intelligent power module 1100；The LIN1 ends of HVIC pipes 1101 are intelligent power module
1100 U phase lower bridge arm signal input parts ULIN；The LIN2 ends of HVIC pipes 1101 are the V phase lower bridge arms of intelligent power module 1100
Signal input part VLIN；The LIN3 ends of HVIC pipes 1101 are the W phase lower bridge arm signal input parts WLIN of intelligent power module 1100；
The ITRIP ends of HVIC pipes 1101 are the MTRIP ends of intelligent power module 1100；The GND ends of HVIC pipes 1101 are as intelligent power
The low-pressure area power supply negative terminal COM of module 1100.Wherein, UHIN, VHIN of intelligent power module 1100, WHIN, ULIN,
The input of six tunnel of VLIN, WLIN receives the input signal of 0V or 5V.
One end of the VB1 ends connection capacitance 1131 of HVIC pipes 1101, and as the U phases higher-pressure region of intelligent power module 1100
Power supply anode UVB；The HO1 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1121 in U phases；HVIC pipes 1101
VS1 ends and the emitter-base bandgap grading of IGBT pipes 1121, the anode of FRD pipes 1111, the collector of U phase lower bridge arm IGBT pipes 1124, FRD pipes 1114
Cathode, capacitance 1131 the other end be connected, and as the U phases higher-pressure region power supply negative terminal UVS of intelligent power module 1100.
One end of the VB2 ends connection capacitance 1132 of HVIC pipes 1101, and as the V phases higher-pressure region of intelligent power module 1100
Power supply anode VVB；The HO2 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1123 in V phases；HVIC pipes 1101
VS2 ends and the emitter-base bandgap grading of IGBT pipes 1122, the anode of FRD pipes 1112, the collector of V phase lower bridge arm IGBT pipes 1125, FRD pipes 1115
Cathode, capacitance 1132 the other end be connected, and as the V phases higher-pressure region power supply negative terminal VVS of intelligent power module 1100.
One end of the VB3 ends connection capacitance 1133 of HVIC pipes 1101, the W phases higher-pressure region as intelligent power module 1100 supplies
Electric power positive end WVB；The HO3 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1123 in W phases；HVIC pipes 1101
VS3 ends and the emitter-base bandgap grading of IGBT pipes 1123, the anode of FRD pipes 1113, the collector of W phase lower bridge arm IGBT pipes 1126, FRD pipes 1116
Cathode, capacitance 1133 the other end be connected, and as the W phases higher-pressure region power supply negative terminal WVS of intelligent power module 1100.
The LO1 ends of HVIC pipes 1101 are connected with the grid of IGBT pipes 1124；The LO2 ends of HVIC pipes 1101 and IGBT pipes 1125
Grid be connected；The LO3 ends of HVIC pipes 1101 are connected with the grid of IGBT pipes 1126；The emitter-base bandgap grading of IGBT pipes 1124 is managed with FRD
1114 anode is connected, and as the U phase low reference voltages end UN of intelligent power module 1100；The emitter-base bandgap grading of IGBT pipes 1125 with
The anode of FRD pipes 1115 is connected, and as the V phase low reference voltages end VN of intelligent power module 1100；IGBT pipes 1126 are penetrated
Pole is connected with the anode of FRD pipes 1116, and as the W phase low reference voltages end WN of intelligent power module 1100.
The collector of IGBT pipes 1121, the cathode of FRD pipes 1111, the collector of IGBT pipes 1122, FRD pipes 1112 the moon
Pole, the collector of IGBT pipes 1123, FRD pipes 1113 cathode be connected, and as intelligent power module 1100 high voltage input
P, P is held generally to meet 300V.
VDD is 1101 power supply anode of HVIC pipes, and GND is the power supply negative terminal of HVIC pipes 1101；VDD-GND voltages
Generally 15V；VB1 and VS1 is respectively the anode and cathode of the power supply of U phases higher-pressure region, and HO1 is the output terminal of U phases higher-pressure region；
VB2 and VS2 is respectively the anode and cathode of the power supply of V phases higher-pressure region, and HO2 is the output terminal of V phases higher-pressure region；VB3 and VS3 difference
The anode and cathode of power supply for U phases higher-pressure region, HO3 are the output terminal of W phases higher-pressure region；LO1, LO2, LO3 are respectively U phases, V
The output terminal of phase, W phase low-pressure areas.
The effect of HVIC pipes 1101 is：The logic input signal of the 0 of input terminal HIN1, HIN2, HIN3 or 5V are passed respectively
To output terminal HO1, HO2, HO3, the signal of LIN1, LIN2, LIN3 pass to output terminal LO1, LO2, LO3 respectively, and wherein HO1 is
It is VS3 or VS3+15V that logic output signal, the HO2 of VS1 or VS1+15V, which is the logic output signal of VS2 or VS2+15V, HO3,
Logic output signal, LO1, LO2, LO3 are the logic output signals of 0 or 15V.
The effect of self-checking circuit 1105 is：When HVIC pipes 1101 originate work, in addition to being transmitted to the signal of HIN1
Other than HO1, localized hyperthermia also is generated inside self-checking circuit 1105, self-test is carried out to temperature-sensitive device, when the value of temperature-sensitive device is sent out
When raw abnormal, compensate automatically；After the normal work of HVIC pipes 1101, the signal of HIN1 is made to be transmitted to HO1, self-checking circuit
1105 localized hyperthermia stops, and temperature-sensitive device is according to this precompensation or uncompensated work status.
Wherein, the particular circuit configurations schematic diagram of self-checking circuit 1105 is as shown in figure 4, be specially：
The input terminal of HIN1 connections input circuit 2037；The power supply anode of VCC connections input circuit 2037；GND connects
Connect the power supply negative terminal of input circuit 2037；Input terminal, the NOT gate 2016 of the output terminal NAND gate 2014 of input circuit 2037
Input terminal, the input terminal of NOT gate 2023, the input terminal of NOT gate 2024, analog switch 2002 fixing end be connected.
NOT gate 2014 output termination NOT gate 2015 input terminal, NOT gate 2015 output terminal connection NAND gate 2021 its
In an input terminal；One end of the output terminating resistor 2020 of NOT gate 2016；The one of another termination capacitor 2019 of resistance 2020
End, the input terminal of NOT gate 2017；NOT gate 2017 output termination NOT gate 2018 input terminal, NOT gate 2018 output termination with it is non-
Another input terminal of door 2021；Another termination GND of capacitance 2019.
One of input terminal of the output termination NAND gate 2028 of NOT gate 2023；The output terminating resistor of NOT gate 2024
2027 one end, one end of another termination capacitor 2026 of resistance 2027 and the input terminal of NOT gate 2025；Capacitance 2026 it is another
Terminate GND；Another input terminal of the output termination NAND gate 2028 of NOT gate 2025.
The input terminal of the output termination NOT gate 2022 of NAND gate 2021, the output terminated high voltage DMOS pipe 2031 of NOT gate 2022
Grid；The substrate of high pressure DMOS pipe 2031 is connected with source electrode and meets GND；The drain electrode of high pressure DMOS pipe 2031 and output circuit
2032 first input end is connected.
The input terminal of the output termination NOT gate 2029 of NAND gate 2028, the output terminated high voltage DMOS pipe 2030 of NOT gate 2029
Grid and rest-set flip-flop 2001 S ends；The substrate of high pressure DMOS pipe 2030 is connected with source electrode and meets GND；High pressure DMOS pipe
2030 drain electrode is connected with the second input terminal of output circuit 2032.
The power supply of output circuit 2032 just terminates VB1；The power supply negative terminal of output circuit 2032 meets VS1；Output
The output termination HO1 of circuit 2032.
The R terminations GND of rest-set flip-flop 2001；The fixing end of the Q termination analog switches 2037 of rest-set flip-flop 2001, simulation are opened
Close 2037 control terminal of selection termination analog switch 2002 and the input terminal of NOT gate 2034；The selection termination of analog switch 2002
The grid of high pressure DMOS pipe 2003, the substrate of high pressure DMOS pipe 2003 are connected GND with source electrode, the drain electrode of high pressure DMOS pipe 2003
One end of connecting resistance 2036, another termination VB1 of resistance 2036.
The input terminal of the output termination NOT gate 2035 of NOT gate 2034, the input of the output termination NOT gate 2011 of NOT gate 2035
End, the control terminal of analog switch 2013；The input terminal of the output termination NOT gate 2012 of NOT gate 2011, the output termination of NOT gate 2012
The control terminal of analog switch 2007 and the S ends of rest-set flip-flop 2038；The R termination GND of rest-set flip-flop 2038, rest-set flip-flop 2038
Q terminates the control terminal of analog switch 2037.
The anode of the fixed termination voltage source 2005 of analog switch 2007, the negative terminal of voltage source 2005 meet GND；Analog switch
The anode input terminal of 2007 selection termination voltage comparator 2008, the negative input termination thermistor of voltage comparator 2008
2004 one end, the fixing end of analog switch 2009, the fixing end of analog switch 2013；The selection termination electricity of analog switch 2013
The anode in stream source 2033, the negative terminal of current source 2033 meet VCC.
The S ends of the output termination rest-set flip-flop 2006 of voltage comparator 2008, the R of rest-set flip-flop 2006 terminate GND, and RS is touched
Send out the control terminal of the Q termination analog switches 2009 of device 2006；0 selection termination TTRIP of analog switch 2009, analog switch 2009
1 selection terminating resistor 2010 one end, another termination TTRIP of resistance 2010.
Illustrate the operation principle of the above embodiment of the present invention and key parameter value below：
The effect of input circuit 2037 is to filter the noise of HIN1, and the logic voltage of 0~5V of input terminal is boosted to 0
The logic voltage of~15V.
During initial power-on, analog switch 2002 is closed, analog switch 2009 selects end, analog switch 2007 to open 0, mould
Intend 2013 opening of switch, analog switch 2037 is closed.
Then come in first high level of HIN1 interim：In the rising edge of HIN1, A points generate a pulse；HIN1's
Failing edge, B points generate a pulse；Network that the width of above-mentioned two pulse is made of resistance 2020, capacitance 2019 respectively and
Resistance 2027, capacitance 2026 form network delay time determine, usually, the delay time can be designed to 200ns~
300ns and much smaller than HIN1 high level 1 μ s of duration~number μ s, so as to avoid high pressure DMOS pipe 2031 and high pressure
The fever caused by when service time is long of DMOS pipe 2030.
But in the entire high level time of HIN1, high pressure DMOS pipe 2003 because analog switch 2002 closure and always
Conducting, so as to flow through larger electric current in 1 μ s~number μ s, the size of the electric current is controlled by resistance 2036, usually, resistance
2036 are designed as k Ω ranks, then the electric current of high pressure DMOS pipe 2003 are flowed through in tens of mA ranks, near high pressure DMOS pipe 2003
Moment local pyrexia is to 80 DEG C or more.
Thermistor 2004 in circuit version drawing design near high pressure DMOS pipe 2003, therefore, thermistor 2004
It is heated up by moment.
After the high level of HIN1, under the action of the high level pulse generated in B points, the Q ends of rest-set flip-flop 2001
Generating high level disconnects analog switch 2002, so as to which DMOS pipe 2003 stops fever；By NOT gate 2034 and NOT gate 2035
Be delayed T1, and high level signal passes to analog switch 2013 and is closed, so as to there is electric current to flow through the thermistor 2004 after being heated, from
And the negative terminal in voltage comparator 2008 forms voltage；Using NOT gate 2011 and the delay T2 of NOT gate 2012, analog switch
2007 are closed the anode that the voltage of voltage source 2005 is made to access voltage comparator 2008；Here, NOT gate 2034, NOT gate 2035, non-
Door 2011, NOT gate 2012, which are designed as technique, allows 2 times of minimum dimension, then ranks of the T1 and T2 in 10ns that be delayed generated,
In the time of 10ns, the temperature of thermistor 2004 thinks constant.
If thermistor 2004 is not completely deteriorated, 80 DEG C of resistance value is more than 10k Ω, and current source 2003 may be designed as A grades of 50 μ
Not, voltage source 2005 may be designed as 0.5V ranks；Then if thermistor 2004 is not completely deteriorated, voltage comparator 2008 exports low electricity
It is flat, one end of thermistor 2004 is made directly to be connected with TTRIP；If thermistor 2004 has deteriorated, voltage comparator 2008
High level is exported, one end of thermistor 2004 is made to be connected with one end of resistance 2010.Also, the high level that NOT gate 2012 exports
The Q of rest-set flip-flop 2038 is made to export high level, so as to which analog switch 2037 disconnects, analog switch 2013 and analog switch 2007
It backs off in succession.In the later high level of HIN1, no longer high pressure DMOS pipe 2003 is controlled, no longer to analog switch
2009 are controlled.
In conclusion when thermistor 2004 is not completely deteriorated, the resistance value of TTRIP monitoring thermistors 2004 carrys out judgment module
Temperature；When thermistor 2004 has deteriorated, the resistance value of TTRIP monitoring thermistors 2004 and resistance 2010 carrys out judgment module
Temperature.Resistance 2010 is designed as temperature coefficient within 1%, resistance value may be designed as 3~5k Ω according to practical application
Thermistor after deterioration is supplemented, extends the service life of intelligent power module.
By the technical solution of above-described embodiment it is found that intelligent power module proposed by the present invention and existing intelligent power module
It is completely compatible, it can be directly replaced with existing intelligent power module, and pass through the heat of automatic decision intelligent power module
The state of sensing device compensates, and the service life of intelligent power module is substantially extended, for the high-end of intelligent power module
The application of application scenario plays an important role.
Technical scheme of the present invention is described in detail above in association with attached drawing, the present invention proposes a kind of new intelligent power mould
Block can be detected thermistor when intelligent power module originates work, to detect that the thermistor is abnormal
When the resistance value of the thermistor is compensated, substantially extend intelligent power module service life, improve intelligent power
The service life of module.
The foregoing is only a preferred embodiment of the present invention, is not intended to restrict the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.All within the spirits and principles of the present invention, that is made any repaiies
Change, equivalent replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (9)
1. a kind of intelligent power module, which is characterized in that including：
Bridge arm signal input part, three-phase lower bridge arm signal input part and temperature detection end on three-phase；
HVIC is managed, and is provided on the HVIC pipes and is respectively connected on the three-phase bridge under bridge arm signal input part and the three-phase
The terminals of arm signal input part and the first port corresponding to the temperature detection end, the first port pass through connection
Line is connected with the temperature detection end, and the first port can be according to the change in resistance of thermistor in the intelligent power module
Export corresponding voltage value；
Self-checking circuit, the low-pressure area power supply anode and cathode of the self-checking circuit are respectively connected to the intelligent power module
Low-pressure area power supply anode and negative terminal, the higher-pressure region power supply anode and cathode of the self-checking circuit are respectively connected to institute
The U phases higher-pressure region power supply anode and negative terminal of intelligent power module are stated, the input terminal of the self-checking circuit is connected to the intelligence
Bridge arm signal input part in the U phases of energy power module, the output terminal of the self-checking circuit are connected to the U phase high pressures of the HVIC pipes
Area's signal output end, the input/output terminal of the self-checking circuit are connected to the first port, and the self-checking circuit is used for institute
The signal for stating bridge arm signal input part in U phases is sent to the U phases higher-pressure region signal output end, and originate work in the HVIC pipes
When making, the thermistor is detected, with when detecting the thermistor exception to the resistance value of the thermistor
It compensates；
Wherein, the self-checking circuit includes：
Input circuit, the power supply anode and cathode of the input circuit are powered respectively as the low-pressure area of the self-checking circuit
Positive pole and cathode, the input terminal of the input terminal of the input circuit as the self-checking circuit, the input circuit it is defeated
Outlet is connected to the input terminal of the first NOT gate, and the output terminal of first NOT gate is connected to the input terminal of the second NOT gate, and described
The output terminal of two NOT gates is connected to the first input end of the first NAND gate, and the input circuit is used to make an uproar to the signal of input
Sound filtration treatment；
Third NOT gate, the input terminal of the third NOT gate are connected to the input terminal of first NOT gate, the third NOT gate it is defeated
Outlet is connected to the input terminal of first resistor, and the output terminal of the first resistor is connected to the input terminal of the 4th NOT gate, and described
The output terminal of four NOT gates is connected to the input terminal of the 5th NOT gate, and the output terminal of the 5th NOT gate is connected to first NAND gate
The second input terminal, the output terminal of first NAND gate is connected to the input terminal of the 6th NOT gate, the output of the 6th NOT gate
End is connected to the grid of the first DMOS pipe, and the substrate of first DMOS pipe is connected to the intelligent power mould after being connected with source electrode
The low-pressure area power supply negative terminal of block；
First capacitance, the first end of first capacitance are connected to the input terminal of the 4th NOT gate, and the of first capacitance
Two ends are connected to the low-pressure area power supply negative terminal of the intelligent power module；
7th NOT gate, the input terminal of the 7th NOT gate are connected to the output terminal of the input circuit, the 7th NOT gate it is defeated
Outlet is connected to the first input end of the second NAND gate；
8th NOT gate, the input terminal of the 8th NOT gate are connected to the output terminal of the input circuit, the 8th NOT gate it is defeated
Outlet is connected to the first end of second resistance, and the second end of the second resistance is connected to the input terminal of the 9th NOT gate, and described
The output terminal of nine NOT gates is connected to the second input terminal of second NAND gate, and the output terminal of second NAND gate is connected to
The input terminal of ten NOT gates, the output terminal of the tenth NOT gate are connected to the grid of the second DMOS pipe, the lining of second DMOS pipe
Bottom is connected to the low-pressure area power supply negative terminal of the intelligent power module after being connected with source electrode；
Second capacitance, the first end of second capacitance are connected to the input terminal of the 9th NOT gate, and the of second capacitance
Two ends are connected to the low-pressure area power supply negative terminal of the intelligent power module；
First rest-set flip-flop, the S ends of first rest-set flip-flop are connected to the output terminal of the tenth NOT gate, and the first RS is touched
The R ends of hair device are connected to the low-pressure area power supply negative terminal of the intelligent power module, the Q ends connection of first rest-set flip-flop
To the fixing end of the first analog switch, the selection end of first analog switch is connected to the input terminal of the 11st NOT gate, described
The output terminal of 11st NOT gate is connected to the input terminal of the 12nd NOT gate, and the output terminal of the 12nd NOT gate is connected to the 13rd
The input terminal of NOT gate, the output terminal of the 13rd NOT gate are connected to the input terminal of the 14th NOT gate, the 14th NOT gate
Output terminal is connected to the S ends of the second rest-set flip-flop, and the R ends of second rest-set flip-flop are connected to the low of the intelligent power module
Pressure area power supply negative terminal, the Q ends of second rest-set flip-flop are connected to the control terminal of first analog switch；
Voltage comparator, the positive input terminal of the voltage comparator are connected to the selection end of the second analog switch, second mould
The control terminal for intending switch is connected to the output terminal of the 14th NOT gate, and the fixing end of second analog switch is connected to first
The anode of voltage source, the negative terminal of the first voltage source are connected to the low-pressure area power supply negative terminal of the intelligent power module,
The negative input end of the voltage comparator is connected to the first end of the thermistor, and the second end of the thermistor is connected to
The low-pressure area power supply negative terminal of the intelligent power module, the output terminal of the voltage comparator are connected to third rest-set flip-flop
S ends, the R ends of the third rest-set flip-flop are connected to the low-pressure area power supply negative terminal of the intelligent power module, described
The Q ends of three rest-set flip-flops are connected to the control terminal of third analog switch, and the fixing end of the third analog switch is connected to described
The first end of thermistor, as the first port, the third simulation is opened at the first choice end of the third analog switch
The the second selection end closed is connected to the first end of first resistor, and the second end of the first resistor is connected to the third simulation and opens
The first choice end of pass；
4th analog switch, the control terminal of the 4th analog switch are connected to the input terminal of the 13rd NOT gate, and described
The fixing end of four analog switches is connected to the negative input end of the voltage comparator, the selection end connection of the 4th analog switch
To the anode of the second voltage source, the negative terminal of the second voltage source is connected to the power supply anode of the input circuit；
Output circuit, the power supply anode and cathode of the output circuit are powered respectively as the higher-pressure region of the self-checking circuit
Positive pole and cathode, the first input end of the output circuit are connected to the drain electrode of first DMOS pipe, the output electricity
Second input terminal on road is connected to the drain electrode of second DMOS pipe, and the output terminal of the output circuit is as the self-checking circuit
Output terminal, the output circuit is used for the pulse of the pulse signal of the output circuit first input end and the second input terminal
Signal processing on the basis of the U phases higher-pressure region power supply negative terminal of the intelligent power module and with the intelligent power mould
The consistent continuous signal of the input signal phase of bridge arm signal input part in the U phases of block；
5th analog switch, the fixing end of the 5th analog switch are connected to the output terminal of the input circuit, and the described 5th
The control terminal of analog switch is connected to the input terminal of the 11st NOT gate, and the selection end of the 5th analog switch is connected to
The grid of three DMOS pipes, the substrate of the third DMOS pipe are connected to the low-pressure area of the intelligent power module after being connected with source electrode
Power supply negative terminal, the drain electrode of the third DMOS pipe are connected to the first end of second resistance, the second end of the second resistance
It is connected to the power supply anode of the output circuit.
2. intelligent power module according to claim 1, which is characterized in that further include boostrap circuit, the boostrap circuit
Including：
First bootstrap diode, the anode of first bootstrap diode are connected to the low-pressure area power supply of the intelligent power module
Power positive end, the cathode of first bootstrap diode are connected to the U phases higher-pressure region power supply anode；
Second bootstrap diode, the anode of second bootstrap diode are connected to the low-pressure area power supply of the intelligent power module
Power positive end, the cathode of second bootstrap diode are being connected to the V phases higher-pressure region power supply of the intelligent power module just
End；
Third bootstrap diode, the anode of the third bootstrap diode are connected to the low-pressure area power supply of the intelligent power module
Power positive end, the cathode of the third bootstrap diode are being connected to the W phases higher-pressure region power supply of the intelligent power module just
End.
3. intelligent power module according to claim 1, which is characterized in that further include：
Bridge arm circuit on three-phase, the input terminal of bridge arm circuit is connected to described in each phase on the three-phase in bridge arm circuit
The signal output end of phase is corresponded in the three-phase high-voltage area of HVIC pipes；
Three-phase lower bridge arm circuit, the input terminal of each phase lower bridge arm circuit in the three-phase lower bridge arm circuit are connected to described
The signal output end of phase is corresponded in the three-phase low-voltage area of HVIC pipes.
4. intelligent power module according to claim 3, which is characterized in that bridge arm circuit includes in each phase：
First power switch pipe and the first diode, the anode of first diode are connected to first power switch pipe
Emitter, the cathode of first diode are connected to the collector of first power switch pipe, first power switch
The collector of pipe is connected to the high voltage input terminal of the intelligent power module, and the base stage of first power switch pipe is as institute
The input terminal of bridge arm circuit in each phase is stated, the emitter of first power switch pipe is connected to the intelligent power module pair
Answer the higher-pressure region power supply negative terminal of phase.
5. intelligent power module according to claim 4, which is characterized in that each phase lower bridge arm circuit includes：
Second power switch pipe and the second diode, the anode of second diode are connected to second power switch pipe
Emitter, the cathode of second diode are connected to the collector of second power switch pipe, second power switch
The collector of pipe is connected to the anode of first diode in corresponding upper bridge arm circuit, second power switch pipe
Input terminal of the base stage as each phase lower bridge arm circuit.
6. intelligent power module according to claim 5, which is characterized in that described in each phase lower bridge arm circuit
Low reference voltage end of the emitter of second power switch pipe as the correspondence phase of the intelligent power module.
7. the intelligent power module according to any one of claim 4 to 6, which is characterized in that the intelligent power module
High voltage input terminal voltage be 300V.
8. the intelligent power module according to any one of claim 4 to 6, which is characterized in that each in the HVIC pipes
Filter capacitor is connected between the higher-pressure region power supply anode and higher-pressure region power supply negative terminal of phase.
9. a kind of air conditioner, which is characterized in that including：Such as intelligent power module described in any item of the claim 1 to 8.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510641633.5A CN105226962B (en) | 2015-09-29 | 2015-09-29 | Intelligent power module and air conditioner |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510641633.5A CN105226962B (en) | 2015-09-29 | 2015-09-29 | Intelligent power module and air conditioner |
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| CN105226962A CN105226962A (en) | 2016-01-06 |
| CN105226962B true CN105226962B (en) | 2018-06-19 |
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