CN105187033A - Clock calibration method and device - Google Patents
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- 238000003384 imaging method Methods 0.000 description 1
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Abstract
The invention discloses a clock calibration method. The method is applied to a PET/PET-CT/PET-MRI system. The PET/PET-CT/PET-MRI system comprises N time detecting units and a reference clock unit, wherein N is a natural number. The method comprises the steps that a reference clock generated by the reference clock unit is acquired, so as to acquire a local clock generated by a time detecting unit; based on the reference clock, the phase deviation between the local clock of the time detecting unit and the reference clock is determined; if the phase deviation is not equal to zero, the phase deviation and the local clock of the time detecting unit are used as input of a digital phase detector, so as to carry out digital calibration on the local clock. According to the invention, clock calibration is carried out on the time detecting units in the system, and time detecting standards of the time detecting units are unified.
Description
Technical field
The present invention relates to distributed medical system regions, be specifically related to a kind of clock correcting method and device.
Background technology
In PET (positron emission computerized tomography device)/PET-CT (positron emission computerized tomography-display)/PET-MRI (positron emission computerized tomography-NMR imaging device) systematic difference process, the positron launched of the radionuclide be injected in vivo in human body after mobile about lmm will negatron in human body in conjunction with burying in oblivion.Produce the γ photon that two energy identical (511keV) directions are contrary during positron-electron annihilation, two detectors staggered relatively in system are measured it.Because the path of two γ photons in human body is different, also there is certain difference the time arriving two detectors, if in official hour window, system looks is mutually the γ photon of 180 degree to two, be then referred to as and meet event.
The method of discrimination meeting event comprises the detection of γ photon to the difference of arrival detector time, when the time difference is less than time window (being generally 8 ~ 12ns) that meet treatment circuit and preset, can judge that it is for meeting event.That is, when the resolution of system to time detecting is higher, can ensure that the judgement meeting event is more accurate.In other words, be the precision that system carries out time detecting to meeting the basis that event accurately judges, time detecting is the record to event generation time, and time detecting whether accurate is the accuracy based on system clock.
PET/PET-CT/PET-MRI system all belongs to distributed system, and the front-end detector of system exists multiple time detecting unit, and each time detecting unit, all according to the clock of self, realizes the detection to event generation time.
But the clock due to each time detecting unit exists certain phase shift, which results in the examination criteria of event generation time inconsistent.So, in order to the examination criteria realizing each time detecting unit is unified, need to carry out clock alignment to time detecting unit all in system.
Summary of the invention
In view of this, the invention provides a kind of clock correcting method and device.
The invention provides a kind of clock correcting method, described method is applied to PET/PET-CT/PET-MRI system, and described PET/PET-CT/PET-MRI system comprises N number of time detecting unit and a reference clock unit, and N is natural number, and described method comprises:
Obtain the reference clock that described reference clock unit produces, and obtain the local clock of described time detecting unit generation;
Based on described reference clock, determine the local clock of described time detecting unit and the phase deviation of described reference clock;
When described phase deviation is not equal to zero, using the local clock of described phase deviation and described time detecting unit as the input of digital phase discriminator, digital calibration is carried out to described local clock.
Preferably, the local clock that the described time detecting unit of described acquisition produces, comprising:
Described reference clock unit is encoded to described reference clock by serializer, obtains High Speed Serialized code stream; And described High Speed Serialized code stream is sent to described time detecting unit;
Described time detecting unit utilizes deserializer to unstring to described High Speed Serialized code stream, obtains the local clock of described time detecting unit.
Preferably, described based on described reference clock, determine the local clock of described time detecting unit and the phase deviation of described reference clock, comprising:
Obtain on described reference clock and described local clock respectively, with default characteristic point for starting point, and with the time of delay that the rising edge of the ranging pulse of described reference clock unit generation is terminal, as respective time measured value;
According to the time measured value of described local clock and the time measured value of described reference clock, determine the local clock of described time detecting unit and the phase deviation of described reference clock.
Preferably, described based on described reference clock, determine the phase deviation of the local clock of described time detecting unit, comprising:
Obtain the ranging pulse that described reference clock unit produces;
Using the input as the carry chain preset of described reference clock and described ranging pulse, by the number of carry unit in the described carry chain of determining described reference clock process, obtain the time measured value of described reference clock;
Using the input as described carry chain of the local clock of described time detecting unit and described ranging pulse, by the number of carry unit in the described carry chain of determining described local clock process, obtain the time measured value of described local clock;
According to the time measured value of described local clock and the time measured value of described reference clock, determine the local clock of described time detecting unit and the phase deviation of described reference clock.
Preferably, described method also comprises:
Using the local clock after digitlization adjustment as calibration object, continue execution described based on described reference clock, determine the local clock of described time detecting unit and the phase deviation step of described reference clock, until when the local clock of described time detecting unit and the phase deviation of described reference clock are zero, complete the local clock calibration of described time detecting unit.
The invention provides a kind of clock calibrating device, described application of installation is in PET/PET-CT/PET-MRI system, and described PET/PET-CT/PET-MRI system comprises N number of time detecting unit and a reference clock unit, and N is natural number, and described device comprises:
First acquisition module, for obtaining the reference clock that described reference clock unit produces;
Second acquisition module, for obtaining the local clock that described time detecting unit produces;
First determination module, for based on described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock;
Calibration module, for when described phase deviation is not equal to zero, using the local clock of described phase deviation and described time detecting unit as the input of digital phase discriminator, carries out digital calibration to described local clock.
Preferably, described second acquisition module comprises:
Encoding submodule, for being encoded to described reference clock by serializer, obtains High Speed Serialized code stream;
Transmit submodule, for described High Speed Serialized code stream is sent to described time detecting unit;
Unstring submodule, for utilizing deserializer to unstring to described High Speed Serialized code stream, obtains the local clock of described time detecting unit.
Preferably, described first determination module comprises:
First obtains submodule, for obtaining the ranging pulse that described reference clock unit produces;
Second obtains submodule, for obtaining described reference clock, with default characteristic point for starting point, and with the time of delay that the rising edge of described ranging pulse is terminal, and using the time measured value of described time of delay as described reference clock;
3rd obtains submodule, for obtaining described local clock, with described default characteristic point for starting point, and with the time of delay that the rising edge of described ranging pulse is terminal, and using the time measured value of described time of delay as described local clock;
First determines submodule, for according to the time measured value of described local clock and the time measured value of described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock.
Preferably, described first determination module comprises:
First obtains submodule, for obtaining the ranging pulse that described reference clock unit produces;
4th obtains submodule, for using the input as the carry chain preset of described reference clock and described ranging pulse, by the number of carry unit in the described carry chain of determining described reference clock process, obtains the time measured value of described reference clock;
5th obtains submodule, for using the input as described carry chain of the local clock of described time detecting unit and described ranging pulse, by the number of carry unit in the described carry chain of determining described local clock process, obtain the time measured value of described local clock;
First determines submodule, for according to the time measured value of described local clock and the time measured value of described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock.
Preferably, described device also comprises:
Trigger module, for using the local clock after digitlization adjustment as calibration object, triggers described first determination module;
Judge module, whether the phase deviation for the local clock and described reference clock that judge described time detecting unit is zero;
Second determination module, for when the result of described judge module is for being, has determined the local clock calibration of described time detecting unit.
In clock correcting method provided by the invention, first obtain the reference clock that reference clock unit produces, and the local clock that acquisition time detecting unit produces.Secondly, based on described reference clock, the local clock of described time detecting unit and the phase deviation of described reference clock is determined.When described phase deviation is not equal to zero, using the local clock of described phase deviation and described time detecting unit as the input of digital phase discriminator, digital calibration is carried out to described local clock.Visible, the present invention, by carrying out clock alignment to the time detecting unit in system, can arrive the unification of the time detecting standard of each time detecting unit.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present application, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the application, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the flow chart of clock correcting method provided by the invention;
Fig. 2 is the structural representation of PET/PET-CT/PET-MRI/TOF-PET/TOF-PET-CT/TOF-PET-MRI system provided by the invention;
Fig. 3 is the schematic diagram utilizing serializer to encode to reference clock provided by the invention;
Fig. 4 is the schematic diagram utilizing deserializer to unstring to described High Speed Serialized code stream provided by the invention;
Fig. 5 is the method flow diagram determining the local clock of time detecting unit and the phase deviation of reference clock provided by the invention;
Fig. 6 is the schematic diagram determining the local clock of time detecting unit or the time measured value of reference clock provided by the invention;
Fig. 7 is the flow chart determining the method for the local clock of time detecting unit and the phase deviation of reference clock provided by the invention;
Fig. 8 is the schematic diagram utilizing carry chain to obtain the time measured value of reference clock or local clock provided by the invention;
Fig. 9 is the schematic diagram utilizing digital phase discriminator to carry out clock alignment provided by the invention;
Figure 10 is the flow chart of precision clock calibration steps provided by the invention;
Figure 11 is clock calibrating device structural representation provided by the invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present application, be clearly and completely described the technical scheme in the embodiment of the present application, obviously, described embodiment is only some embodiments of the present application, instead of whole embodiments.Based on the embodiment in the application, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the application's protection.
With reference to the flow chart of a kind of clock correcting method that figure 1, Fig. 1 provides for the embodiment of the present invention, specifically can comprise:
S101: obtain the reference clock that reference clock unit produces.
S102: the local clock that acquisition time detecting unit produces.
S103: based on described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock.
S104: when described phase deviation is not equal to zero, using the local clock of described phase deviation and described time detecting unit as the input of digital phase discriminator, carries out digital calibration to described local clock.
The clock correcting method that the embodiment of the present invention provides is applied to the PET system of various model, PET-CT system or PET-MRI system, and such as, the method is more suitable for TOF-PET system, TOF-PET-CT system or TOF-PET-MRI system.As shown in Figure 2, Fig. 2 is the structural representation of PET/PET-CT/PET-MRI/TOF-PET/TOF-PET-CT/TOF-PET-MRI system.Described system comprises N number of time detecting unit and a reference clock unit, and N is natural number.Each time detecting unit realizes communicating by high-speed serial bus with described reference clock unit, and described time detecting unit is for detecting the collision time of γ photon.
In S101, described reference clock unit produces reference clock, and described reference clock is used for the standard of carrying out clock alignment as each time detecting unit.That is, the phase place of the clock produced by each time detecting unit is adjusted to consistent with the phase place of described reference clock.
In S102, each time detecting unit produces local clock, as the calibration object of the clock correcting method that the embodiment of the present invention provides.That is, after the local clock that all time detecting unit in PET/PET-CT/PET-MRI system produce is carried out clock alignment, the clock alignment of described PET/PET-CT/PET-MRI system is namely completed.
In practical application, each time detecting unit can obtain local clock by High Speed Serialized code stream.Concrete, described reference clock unit utilizes serializer to encode to described reference clock, obtains High Speed Serialized code stream after producing reference clock.As shown in Figure 3, Fig. 3 is the schematic diagram utilizing serializer to encode to reference clock.Wherein, for identifying the input of the flag data Data of clock starting point and reference clock clk_base as serializer, after described serializer coding, export High Speed Serialized code stream BitStream.After described reference clock unit obtains described High Speed Serialized code stream, by the high-speed serial bus between reference clock unit and each time detecting unit, described High Speed Serialized code stream is sent to each time detecting unit.Time detecting unit, after receiving the High Speed Serialized code stream from described reference clock unit, utilizes deserializer to unstring to described High Speed Serialized code stream, obtains the local clock that described time detecting surveys unit.As shown in Figure 4, Fig. 4 is the schematic diagram utilizing deserializer to unstring to described High Speed Serialized code stream.Wherein, described High Speed Serialized code stream BitStream, as the input of deserializer, after described deserializer unstrings, exports the local clock clk_N of described time detecting unit and flag data Data*, Data* for maintaining the speed etc. of transfer bus.
Time detecting unit obtains local clock by the processing method of High Speed Serialized code stream, can ensure that the frequency of the local clock that each time detecting unit produces is consistent with the frequency that described reference clock unit produces reference clock, meanwhile, the stability of the frequency of the local clock that each time detecting unit produces can also be ensured.
In S103, obtain the reference clock of reference clock unit generation, and after the local clock of described time detecting unit generation, based on described reference clock, calculate the local clock of described time detecting unit and the phase deviation of described reference clock.
In practical application, clock count method, logic gates counting method, clock phase counting method etc. can be utilized, determine the local clock of described time detecting unit and the phase deviation of described reference clock.
In a kind of implementation, the embodiment of the present invention additionally provides a kind ofly determines the local clock of time detecting unit and the method for reference clock phase deviation, be determine the local clock of time detecting unit and the method flow diagram of reference clock phase deviation with reference to figure 5, Fig. 5, described method comprises:
S501: obtain the ranging pulse that reference clock unit produces.
S502: obtain on described reference clock, with default characteristic point for starting point, and with the time of delay that the rising edge of described ranging pulse is terminal, and using the time measured value of described time of delay as described reference clock.
S503: obtain on local clock, with described default characteristic point for starting point, and with the time of delay that the rising edge of described ranging pulse is terminal, and using the time measured value of described time of delay as described local clock.
S504: according to the time measured value of the local clock of described time measuring unit and the time measured value of described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock.
In S501, reference clock unit produces a ranging pulse, and the frequency of described ranging pulse is less than the frequency of the reference clock that described reference clock unit produces.
In S502, S503, obtain the local clock of described time measuring unit and the time measured value of described reference clock respectively.Concrete, first pre-set a characteristic point, described characteristic point can be apart from the nearest rising edge of described ranging pulse or trailing edge.Secondly, to obtain on described reference clock with described characteristic point for starting point, and with the time of delay that the rising edge of described ranging pulse is terminal, as the time measured value of described reference clock; And to obtain on described local clock with described characteristic point for starting point, and with the time of delay that the rising edge of described ranging pulse is terminal, as the time measured value of described local clock.As shown in Figure 6, Fig. 6 is the schematic diagram determining the local clock of time detecting unit or the time measured value of reference clock.Wherein, using the nearest rising edge of the rising edge of reference clock clk_base or local clock clk_N middle distance ranging pulse trigger as starting point, and using the rising edge of trigger as terminal, obtain the time of delay of starting point to the rising edge of trigger of clk_base or clk_N, as time measured value, the time measured value T_N of the i.e. time measured value T_base of clk_base, and clk_N.As shown in Figure 6, the length of T_base and T_N is different, and that is, clk_base and clk_N exists phase deviation.When the length of T_base and T_N is identical, then illustrates that described clk_base and clk_N does not exist phase deviation, namely complete the clock alignment of clk_base.
In S504, calculate the difference of the time measured value of the local clock of described time measuring unit and the time measured value of described reference clock, as the local clock of described time measuring unit and the phase deviation of described reference clock.
In another kind of implementation, the invention provides a kind of method utilizing the phase deviation of the local clock of carry chain determination time detecting unit, with reference to figure 7, Fig. 7 provides the flow chart of the method for the phase deviation of the local clock of detecting unit of really fixing time for the embodiment of the present invention, described method comprises:
S701: obtain the ranging pulse that reference clock unit produces.
S702: using the input as the carry chain preset of described reference clock and described ranging pulse, by the number of carry unit in the described carry chain of determining described reference clock process, obtains the time measured value of described reference clock.
S703: using the input as described carry chain of the local clock of time detecting unit and described ranging pulse, by the number of carry unit in the described carry chain of determining described reference clock process, obtains the time measured value of described local clock.
S704: according to the time measured value of described local clock and the time measured value of described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock.
As shown in Figure 8, Fig. 8 is the schematic diagram utilizing carry chain to obtain the time measured value of reference clock or local clock.Wherein, using reference clock or local clock START (starting point) input signal as default carry chain, and using STOP (terminal) input signal of ranging pulse as described carry chain.After the delay of several carry unit LCELL of described START input signal in carry chain, reach described STOP input signal.Calculate the number of the LCELL of described START input signal process, and according to the number of described LCELL and the time of delay of each LCELL, calculate the time measured value of described START input signal.
Carry out processing the time measured value that can obtain high precision, so the embodiment of the present invention can have more accuracy in clock alignment to clock owing to utilizing carry chain.Utilize said method, the present embodiment can obtain the time measured value of the described reference clock of high precision, and the time measured value of the local clock of each time measuring unit.
In a kind of concrete implementation method, following setting is done in advance: using apart from the rising edge of the nearest described reference clock of described ranging pulse or local clock as the starting point of time measured value in described carry chain, and using the terminal of the rising edge of described ranging pulse as described time measured value.
It should be noted that described carry chain can be integrated on each time measuring unit, and on described reference clock unit.
In S104, judge whether the local clock of time detecting unit and the phase deviation of reference clock are zero, when described phase deviation is zero, then illustrate that described local clock does not need to carry out clock alignment.When described phase deviation is not equal to zero, the embodiment of the present invention utilizes digital phase discriminator to calibrate described local clock.
Concrete, as shown in Figure 9, the digital phase discriminator that utilizes that Fig. 9 provides for the embodiment of the present invention carries out the schematic diagram of clock alignment.Wherein, using the local clock of described time detecting unit and the phase deviation Δ T of described reference clock and the described local clock clk_N input as digital phase discriminator, adjust the phase place of described local clock according to the phase deviation of described local clock, obtain the local clock clk_N* after adjustment.Described digital phase discriminator can realize adjusting the digitlization of described local clock, has broken the simulated clock adjustment modes of existing solidification.It should be noted that described digital phase discriminator is integrated in each time detecting unit.
In addition, in order to improve the accuracy of clock alignment, the embodiment of the present invention additionally provides the method for a kind of precision clock calibration.As shown in Figure 10, the flow chart of precision clock calibration steps that provides for the embodiment of the present invention of Figure 10.Described method comprises:
S1001: obtain the reference clock that reference clock unit produces.
S1002: the local clock that acquisition time detecting unit produces.
S1003: based on described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock.
S1004: judge whether described phase deviation is zero, if so, then complete the calibration of the local clock of described time detecting unit; If not, then S1005 is performed.
S1005: using the local clock of described phase deviation and described time detecting unit as the input of digital phase discriminator, digital calibration is carried out to described local clock, and using the local clock after digitlization adjustment as calibration object, continue to perform S1003.
Because system itself exists inevitable error problem, so the present embodiment by repeated clock alignment, reduces the measurement that error brings and is forbidden problem as far as possible.
In addition, it should be noted that, be applied in the clock correcting method of PET/PET-CT/PET-MRI system, only have when all time detecting unit in described PET/PET-CT/PET-MRI system all complete clock alignment, be only the object of the clock alignment reaching PET/PET-CT/PET-MRI system.
In the embodiment of the present invention, first, obtain the reference clock that described reference clock unit produces, and obtain the local clock of described time detecting unit generation.Secondly, based on described reference clock, the local clock of described time detecting unit and the phase deviation of described reference clock is determined.When described phase deviation is not equal to zero, using the local clock of described phase deviation and described time detecting unit as the input of digital phase discriminator, digital calibration is carried out to described local clock.Visible, the embodiment of the present invention, by carrying out clock alignment to the time detecting unit in system, can arrive the unification of the time detecting standard of each time detecting unit.
The embodiment of the present invention additionally provides a kind of clock calibrating device, as shown in figure 11, and the clock calibrating device structural representation that Figure 11 provides for the embodiment of the present invention.Described application of installation is in PET/PET-CT/PET-MRI system, and described PET/PET-CT/PET-MRI system comprises N number of time detecting unit and a reference clock unit, and N is natural number, and described device comprises:
First acquisition module 1101, for obtaining the reference clock that described reference clock unit produces.
Second acquisition module 1102, for obtaining the local clock that described time detecting unit produces.
First determination module 1103, for based on described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock.
Calibration module 1104, for when described phase deviation is not equal to zero, using the local clock of described phase deviation and described time detecting unit as the input of digital phase discriminator, carries out digital calibration to described local clock.
The embodiment of the present invention utilizes the local clock of High Speed Serialized code stream generation time detecting unit, and described second acquisition module comprises:
Encoding submodule, for being encoded to described reference clock by serializer, obtains High Speed Serialized code stream;
Transmit submodule, for described High Speed Serialized code stream is sent to described time detecting unit;
Unstring submodule, for utilizing deserializer to unstring to described High Speed Serialized code stream, obtains the local clock of described time detecting unit.
In a kind of implementation, described first determination module comprises:
First obtains submodule, for obtaining the ranging pulse that described reference clock unit produces;
Second obtains submodule, for obtaining described reference clock, with default characteristic point for starting point, and with the time of delay that the rising edge of described ranging pulse is terminal, and using the time measured value of described time of delay as described reference clock;
3rd obtains submodule, for obtaining described local clock, with described default characteristic point for starting point, and with the time of delay that the rising edge of described ranging pulse is terminal, and using the time measured value of described time of delay as described local clock;
First determines submodule, for according to the time measured value of described local clock and the time measured value of described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock.
In another kind of implementation, described first determination module comprises:
First obtains submodule, for obtaining the ranging pulse that described reference clock unit produces;
4th obtains submodule, for using the input as the carry chain preset of described reference clock and described ranging pulse, by the number of carry unit in the described carry chain of determining described reference clock process, obtains the time measured value of described reference clock;
5th obtains submodule, for using the input as described carry chain of the local clock of described time detecting unit and described ranging pulse, by the number of carry unit in the described carry chain of determining described local clock process, obtain the time measured value of described local clock;
First determines submodule, for according to the time measured value of described local clock and the time measured value of described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock.
In addition, in order to improve the accuracy of clock alignment, described device also comprises:
Trigger module, for using the local clock after digitlization adjustment as calibration object, triggers described first determination module;
Judge module, whether the phase deviation for the local clock and described reference clock that judge described time detecting unit is zero;
Second determination module, for when the result of described judge module is for being, has determined the local clock calibration of described time detecting unit.
In the embodiment of the present invention, obtain the reference clock that described reference clock unit produces, and obtain the local clock of described time detecting unit generation.Based on described reference clock, determine the local clock of described time detecting unit and the phase deviation of described reference clock.When described phase deviation is not equal to zero, using the local clock of described phase deviation and described time detecting unit as the input of digital phase discriminator, digital calibration is carried out to described local clock.Visible, the embodiment of the present invention, by carrying out clock alignment to the time detecting unit in system, can arrive the unification of the time detecting standard of each time detecting unit.
For device embodiment, because it corresponds essentially to embodiment of the method, so relevant part illustrates see the part of embodiment of the method.Device embodiment described above is only schematic, the wherein said unit illustrated as separating component or can may not be and physically separates, parts as unit display can be or may not be physical location, namely can be positioned at a place, or also can be distributed in multiple network element.Some or all of module wherein can be selected according to the actual needs to realize the object of the present embodiment scheme.Those of ordinary skill in the art, when not paying creative work, are namely appreciated that and implement.
It should be noted that, in this article, the such as relational terms of first and second grades and so on is only used for an entity or operation to separate with another entity or operating space, and not necessarily requires or imply the relation that there is any this reality between these entities or operation or sequentially.And, term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thus make to comprise the process of a series of key element, method, article or equipment and not only comprise those key elements, but also comprise other key elements clearly do not listed, or also comprise by the intrinsic key element of this process, method, article or equipment.When not more restrictions, the key element limited by statement " comprising ... ", and be not precluded within process, method, article or the equipment comprising described key element and also there is other identical element.
A kind of clock correcting method provided the embodiment of the present invention above and device are described in detail, apply specific case herein to set forth principle of the present invention and execution mode, the explanation of above embodiment just understands method of the present invention and core concept thereof for helping; Meanwhile, for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.
Claims (10)
1. a clock correcting method, is characterized in that, described method is applied to PET/PET-CT/PET-MRI system, and described PET/PET-CT/PET-MRI system comprises N number of time detecting unit and a reference clock unit, and N is natural number, and described method comprises:
Obtain the reference clock that described reference clock unit produces, and obtain the local clock of described time detecting unit generation;
Based on described reference clock, determine the local clock of described time detecting unit and the phase deviation of described reference clock;
When described phase deviation is not equal to zero, using the local clock of described phase deviation and described time detecting unit as the input of digital phase discriminator, digital calibration is carried out to described local clock.
2. method according to claim 1, is characterized in that, the local clock that the described time detecting unit of described acquisition produces, and comprising:
Described reference clock unit is encoded to described reference clock by serializer, obtains High Speed Serialized code stream; And described High Speed Serialized code stream is sent to described time detecting unit;
Described time detecting unit utilizes deserializer to unstring to described High Speed Serialized code stream, obtains the local clock of described time detecting unit.
3. method according to claim 1, is characterized in that, described based on described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock, comprising:
Obtain on described reference clock and described local clock respectively, with default characteristic point for starting point, and with the time of delay that the rising edge of the ranging pulse of described reference clock unit generation is terminal, as respective time measured value;
According to the time measured value of described local clock and the time measured value of described reference clock, determine the local clock of described time detecting unit and the phase deviation of described reference clock.
4. method according to claim 1, is characterized in that, described based on described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock, comprising:
Obtain the ranging pulse that described reference clock unit produces;
Using the input as the carry chain preset of described reference clock and described ranging pulse, by the number of carry unit in the described carry chain of determining described reference clock process, obtain the time measured value of described reference clock;
Using the input as described carry chain of the local clock of described time detecting unit and described ranging pulse, by the number of carry unit in the described carry chain of determining described local clock process, obtain the time measured value of described local clock;
According to the time measured value of described local clock and the time measured value of described reference clock, determine the local clock of described time detecting unit and the phase deviation of described reference clock.
5. method according to claim 1, is characterized in that, described method also comprises:
Using the local clock after digitlization adjustment as calibration object, continue execution described based on described reference clock, determine the local clock of described time detecting unit and the phase deviation step of described reference clock, until when the local clock of described time detecting unit and the phase deviation of described reference clock are zero, complete the local clock calibration of described time detecting unit.
6. a clock calibrating device, is characterized in that, described application of installation is in PET/PET-CT/PET-MRI system, and described PET/PET-CT/PET-MRI system comprises N number of time detecting unit and a reference clock unit, and N is natural number, and described device comprises:
First acquisition module, for obtaining the reference clock that described reference clock unit produces;
Second acquisition module, for obtaining the local clock that described time detecting unit produces;
First determination module, for based on described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock;
Calibration module, for when described phase deviation is not equal to zero, using the local clock of described phase deviation and described time detecting unit as the input of digital phase discriminator, carries out digital calibration to described local clock.
7. device according to claim 6, is characterized in that, described second acquisition module comprises:
Encoding submodule, for being encoded to described reference clock by serializer, obtains High Speed Serialized code stream;
Transmit submodule, for described High Speed Serialized code stream is sent to described time detecting unit;
Unstring submodule, for utilizing deserializer to unstring to described High Speed Serialized code stream, obtains the local clock of described time detecting unit.
8. device according to claim 6, is characterized in that, described first determination module comprises:
First obtains submodule, for obtaining the ranging pulse that described reference clock unit produces;
Second obtains submodule, for obtaining described reference clock, with default characteristic point for starting point, and with the time of delay that the rising edge of described ranging pulse is terminal, and using the time measured value of described time of delay as described reference clock;
3rd obtains submodule, for obtaining described local clock, with described default characteristic point for starting point, and with the time of delay that the rising edge of described ranging pulse is terminal, and using the time measured value of described time of delay as described local clock;
First determines submodule, for according to the time measured value of described local clock and the time measured value of described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock.
9. device according to claim 6, is characterized in that, described first determination module comprises:
First obtains submodule, for obtaining the ranging pulse that described reference clock unit produces;
4th obtains submodule, for using the input as the carry chain preset of described reference clock and described ranging pulse, by the number of carry unit in the described carry chain of determining described reference clock process, obtains the time measured value of described reference clock;
5th obtains submodule, for using the input as described carry chain of the local clock of described time detecting unit and described ranging pulse, by the number of carry unit in the described carry chain of determining described local clock process, obtain the time measured value of described local clock;
First determines submodule, for according to the time measured value of described local clock and the time measured value of described reference clock, determines the local clock of described time detecting unit and the phase deviation of described reference clock.
10. device according to claim 6, is characterized in that, described device also comprises:
Trigger module, for using the local clock after digitlization adjustment as calibration object, triggers described first determination module;
Judge module, whether the phase deviation for the local clock and described reference clock that judge described time detecting unit is zero;
Second determination module, for when the result of described judge module is for being, has determined the local clock calibration of described time detecting unit.
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| WO2024066699A1 (en) * | 2022-09-26 | 2024-04-04 | 三维通信股份有限公司 | Clock synchronization method and apparatus |
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| US20090009148A1 (en) * | 2007-07-05 | 2009-01-08 | Intersil Americas Inc. | Steady state frequency control of variable frequency switching regulators |
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