CN105187033B - A kind of clock correcting method and device - Google Patents
A kind of clock correcting method and device Download PDFInfo
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- CN105187033B CN105187033B CN201510567262.0A CN201510567262A CN105187033B CN 105187033 B CN105187033 B CN 105187033B CN 201510567262 A CN201510567262 A CN 201510567262A CN 105187033 B CN105187033 B CN 105187033B
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- 238000005259 measurement Methods 0.000 claims description 40
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- 238000007689 inspection Methods 0.000 claims description 10
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- 230000010363 phase shift Effects 0.000 description 1
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Abstract
The present invention discloses a kind of clock correcting method, and methods described is applied to PET/PET CT/PET MRI systems, and it is natural number that the PET/PET CT/PET MRI systems, which include N number of time detecting unit and a reference clock unit, N, and methods described includes：Reference clock caused by the reference clock unit is obtained, and obtains local clock caused by the time detecting unit；Based on the reference clock, the local clock of the time detecting unit and the phase deviation of the reference clock are determined；When the phase deviation is not equal to zero, using the local clock of the phase deviation and the time detecting unit as the input of digital phase discriminator, calibration is digitized to the local clock.The present invention can reach the unification of the time detecting standard of each time detecting unit by carrying out clock alignment to the time detecting unit in system.
Description
Technical field
The present invention relates to distributed medical system regions, and in particular to a kind of clock correcting method and device.
Background technology
PET (positron emission computerized tomography device)/PET-CT (positron emission computerized tomography-display)/
During PET-MRI (positron emission computerized tomography-NMR imaging device) systematic difference, the radiation that is injected in vivo
Property the positive electron launched of nucleic will bury in oblivion in human body after mobile about lmm with the negatron combination in human body.
Produce two energy identical (511keV) γ photons in opposite direction during positron-electron annihilation, two spies staggered relatively in system
Device is surveyed to measure it.Because path of two γ photons in human body is different, the time for reaching two detectors also has one
Determine difference, if in defined time window, system detects two γ for being mutually 180 degree photons, then is referred to as meeting thing
Part.
Meeting the method for discrimination of event is included to detection of the γ photons to the difference of arrival detector time, small when the time difference
When process circuit time window set in advance (being usually 8~12ns) is met, you can judge it to meet event.Namely
Say, when system is higher to the resolution ratio of time detecting, it is ensured that the judgement for meeting event is more accurate.In other words, to symbol
The basis that conjunction event accurately judges is the precision that system carries out time detecting, and time detecting is the record to event generation time,
And the whether accurate of time detecting is the degree of accuracy based on system clock.
PET/PET-CT/PET-MRI systems belong to distributed system, and the front-end detector of system has multiple time inspections
Unit is surveyed, each time detecting unit realizes the detection to event generation time all in accordance with the clock of itself.
But because the clock of each time detecting unit has certain phase shift, during which results in being produced to event
The examination criteria at quarter is inconsistent.So in order to realize that the examination criteria of each time detecting unit is unified, it is necessary to institute in system
Some time detecting units carry out clock alignment.
The content of the invention
In view of this, the invention provides a kind of clock correcting method and device.
The invention provides a kind of clock correcting method, methods described is applied to PET/PET-CT/PET-MRI systems, institute
Stating PET/PET-CT/PET-MRI systems includes N number of time detecting unit and a reference clock unit, and N is natural number, described
Method includes：
Reference clock caused by the reference clock unit is obtained, and is obtained local caused by the time detecting unit
Clock；
Based on the reference clock, determine that the phase of the local clock and the reference clock of the time detecting unit is inclined
Difference；
When the phase deviation is not equal to zero, the local clock of the phase deviation and the time detecting unit is made
For the input of digital phase discriminator, calibration is digitized to the local clock.
Preferably, local clock caused by the acquisition time detecting unit, including：
The reference clock unit is encoded by serializer to the reference clock, obtains High Speed Serialized code stream；
And the High Speed Serialized code stream is sent to the time detecting unit；
The time detecting unit is unstringed using deserializer to the High Speed Serialized code stream, obtains the time inspection
Survey the local clock of unit.
Preferably, it is described to be based on the reference clock, determine the local clock of the time detecting unit and the benchmark
The phase deviation of clock, including：
Obtain respectively on the reference clock and the local clock, using default characteristic point as starting point, and with the benchmark
The rising edge of measurement pulse is the time delay of terminal caused by clock unit, as respective time measured value；
According to the time measured value of the local clock and the time measured value of the reference clock, the time inspection is determined
Survey the local clock of unit and the phase deviation of the reference clock.
Preferably, the phase deviation for being based on the reference clock, determining the local clock of the time detecting unit,
Including：
Obtain measurement pulse caused by the reference clock unit；
Input using the reference clock and the measurement pulse as default carry chain, during by determining the benchmark
The number of carry unit, obtains the time measured value of the reference clock in the carry chain that clock passes through；
Using the local clock of the time detecting unit and it is described measurement pulse as the carry chain input, by true
The number of carry unit, obtains the time measured value of the local clock in the carry chain that the fixed local clock passes through；
According to the time measured value of the local clock and the time measured value of the reference clock, the time inspection is determined
Survey the local clock of unit and the phase deviation of the reference clock.
Preferably, methods described also includes：
Calibration object is used as using the local clock after digitlization adjusts, continue executing with described in when being based on the benchmark
Clock, the local clock of the time detecting unit and the phase deviation step of the reference clock are determined, examined until the time
When the phase deviation of the local clock and the reference clock of survey unit is zero, the local clock of the time detecting unit is completed
Calibration.
The invention provides a kind of clock calibrating device, described device is applied to PET/PET-CT/PET-MRI systems, institute
Stating PET/PET-CT/PET-MRI systems includes N number of time detecting unit and a reference clock unit, and N is natural number, described
Device includes：
First acquisition module, for obtaining reference clock caused by the reference clock unit；
Second acquisition module, for obtaining local clock caused by the time detecting unit；
First determining module, for based on the reference clock, determining local clock and the institute of the time detecting unit
State the phase deviation of reference clock；
Calibration module, for when the phase deviation be not equal to zero when, by the phase deviation and the time detecting list
Input of the local clock of member as digital phase discriminator, calibration is digitized to the local clock.
Preferably, second acquisition module includes：
Encoding submodule, for being encoded by serializer to the reference clock, obtain High Speed Serialized code stream；
Submodule is transmitted, for the High Speed Serialized code stream to be sent into the time detecting unit；
Unstring submodule, for being unstringed using deserializer to the High Speed Serialized code stream, obtains the time inspection
Survey the local clock of unit.
Preferably, first determining module includes：
First acquisition submodule, pulse is measured caused by the reference clock unit for obtaining；
Second acquisition submodule, for obtaining the reference clock, using default characteristic point as starting point, and with the measurement
The rising edge of pulse is the time delay of terminal, and the time measured value using the time delay as the reference clock；
3rd acquisition submodule, for obtaining the local clock, using the default characteristic point as starting point, and with described
The rising edge for measuring pulse is the time delay of terminal, and the time measurement using the time delay as the local clock
Value；
First determination sub-module, surveyed for the time of the time measured value according to the local clock and the reference clock
Value, determine the local clock of the time detecting unit and the phase deviation of the reference clock.
Preferably, first determining module includes：
First acquisition submodule, pulse is measured caused by the reference clock unit for obtaining；
4th acquisition submodule, for using the reference clock and the measurement pulse as the defeated of default carry chain
Enter, the number of carry unit in the carry chain passed through by determining the reference clock, obtain the reference clock when
Between measured value；
5th acquisition submodule, for using the local clock of the time detecting unit and it is described measurement pulse as described in
The input of carry chain, the number of carry unit, obtains described in the carry chain passed through by determining the local clock
The time measured value of ground clock；
First determination sub-module, surveyed for the time of the time measured value according to the local clock and the reference clock
Value, determine the local clock of the time detecting unit and the phase deviation of the reference clock.
Preferably, described device also includes：
Trigger module, for using the local clock after digitlization adjusts as calibration object, triggering described first to be true
Cover half block；
Judge module, for judging that the phase deviation of local clock and the reference clock of the time detecting unit is
No is zero；
Second determining module, for when the judge module result for be when, it is determined that completing the time detecting unit
Local clock calibration.
In clock correcting method provided by the invention, reference clock caused by reference clock unit is obtained first, and obtain
Take local clock caused by time detecting unit.Secondly, based on the reference clock, the local of the time detecting unit is determined
The phase deviation of clock and the reference clock.When the phase deviation be not equal to zero when, by the phase deviation with it is described when
Between detection unit input of the local clock as digital phase discriminator, calibration is digitized to the local clock.It can be seen that this
Invention can reach the time detecting of each time detecting unit by carrying out clock alignment to the time detecting unit in system
The unification of standard.
Brief description of the drawings
In order to illustrate more clearly of the technical scheme in the embodiment of the present application, make required in being described below to embodiment
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present application, for
For those of ordinary skill in the art, without having to pay creative labor, it can also be obtained according to these accompanying drawings
His accompanying drawing.
Fig. 1 is the flow chart of clock correcting method provided by the invention；
Fig. 2 is PET/PET-CT/PET-MRI/TOF-PET/TOF-PET-CT/TOF-PET-MRI systems provided by the invention
The structural representation of system；
Fig. 3 is the schematic diagram provided by the invention encoded using serializer to reference clock；
Fig. 4 is the schematic diagram provided by the invention to be unstringed using deserializer to the High Speed Serialized code stream；
Fig. 5 is the method for the phase deviation of the local clock for determining time detecting unit and reference clock provided by the invention
Flow chart；
Fig. 6 is showing for the time measured value of the local clock for determining time detecting unit or reference clock provided by the invention
It is intended to；
Fig. 7 is the method for the phase deviation of the local clock for determining time detecting unit and reference clock provided by the invention
Flow chart；
Fig. 8 is the signal of the time measured value provided by the invention that reference clock or local clock are obtained using carry chain
Figure；
Fig. 9 is the schematic diagram provided by the invention that clock alignment is carried out using digital phase discriminator；
Figure 10 is the flow chart of precision clock calibration method provided by the invention；
Figure 11 is clock calibrating device structural representation provided by the invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present application, the technical scheme in the embodiment of the present application is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only some embodiments of the present application, rather than whole embodiments.It is based on
Embodiment in the application, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of the application protection.
With reference to figure 1, Fig. 1 is a kind of flow chart of clock correcting method provided in an embodiment of the present invention, can specifically be included：
S101：Obtain reference clock caused by reference clock unit.
S102：Obtain local clock caused by time detecting unit.
S103：Based on the reference clock, the local clock of the time detecting unit and the reference clock are determined
Phase deviation.
S104：When the phase deviation is not equal to zero, by the phase deviation and the local of the time detecting unit
Input of the clock as digital phase discriminator, calibration is digitized to the local clock.
Clock correcting method provided in an embodiment of the present invention be applied to the PET systems of various models, PET-CT systems or
PET-MRI systems, for example, this method is more suitable for TOF-PET systems, TOF-PET-CT systems or TOF-PET-MRI systems.
As shown in Fig. 2 the structure that Fig. 2 is PET/PET-CT/PET-MRI/TOF-PET/TOF-PET-CT/TOF-PET-MRI systems is shown
It is intended to.It is natural number that the system, which includes N number of time detecting unit and a reference clock unit, N,.Each time detecting unit
Realized and communicated by high-speed serial bus with the reference clock unit, the time detecting unit is used to detect touching for γ photons
Hit the time.
In S101, the reference clock unit produces reference clock, and the reference clock is used to examine as each time
Survey the standard that unit carries out clock alignment.That is, by the phase adjustment of clock caused by each time detecting unit into
The phase of the reference clock is consistent.
In S102, each time detecting unit produces local clock, as clock alignment provided in an embodiment of the present invention
The calibration object of method.That is, by caused by all time detecting units in PET/PET-CT/PET-MRI systems
After ground clock carries out clock alignment, that is, complete the clock alignment of the PET/PET-CT/PET-MRI systems.
In practical application, each time detecting unit can obtain local clock by High Speed Serialized code stream.Specifically,
After the reference clock unit produces reference clock, the reference clock is encoded using serializer, obtains high speed serialization
Change code stream.As shown in figure 3, Fig. 3 is the schematic diagram encoded using serializer to reference clock.Wherein, for identifying clock
Inputs of the flag data Data and reference clock clk_base of starting point as serializer, after serializer coding,
Export High Speed Serialized code stream Bit Stream.After the reference clock unit obtains the High Speed Serialized code stream, pass through base
High-speed serial bus between quasi- clock unit and each time detecting unit, the High Speed Serialized code stream is sent to each
Time detecting unit.Time detecting unit utilizes after the High Speed Serialized code stream from the reference clock unit is received
Deserializer unstrings to the High Speed Serialized code stream, obtains the local clock that the time detecting surveys unit.Such as Fig. 4 institutes
Show, Fig. 4 is the schematic diagram to be unstringed using deserializer to the High Speed Serialized code stream.Wherein, the High Speed Serialized code
Inputs of the Bit Stream as deserializer is flowed, after the deserializer unstrings, exports the local of the time detecting unit
Clock clk_N and flag data Data*, Data* are for maintaining speed of transfer bus etc..
Time detecting unit obtains local clock by the processing method of High Speed Serialized code stream, can ensure each time
The frequency that the frequency of local clock caused by detection unit produces reference clock with the reference clock unit is consistent, meanwhile,
The stability of the frequency of local clock caused by each time detecting unit can be ensured.
In S103, reference clock caused by reference clock unit is being obtained, and caused by the time detecting unit originally
After ground clock, based on the reference clock, the local clock of the time detecting unit and the phase of the reference clock are calculated
Deviation.
In practical application, clock count method, logic gates counting method, clock phase counting method etc. can be utilized, it is determined that
The local clock of the time detecting unit and the phase deviation of the reference clock.
In a kind of implementation, the embodiment of the present invention additionally provides a kind of local clock and base for determining time detecting unit
The method of quasi- clock-skew, with reference to figure 5, Fig. 5 is to determine that the local clock of time detecting unit and reference clock phase are inclined
The method flow diagram of difference, methods described include：
S501：Obtain measurement pulse caused by reference clock unit.
S502：Obtain on the reference clock, using default characteristic point as starting point, and using the rising edge of the measurement pulse as
The time delay of terminal, and the time measured value using the time delay as the reference clock.
S503：Obtain local clock on, using the default characteristic point as starting point, and using it is described measurement pulse rising edge as
The time delay of terminal, and the time measured value using the time delay as the local clock.
S504：Surveyed according to the time of the time measured value of the local clock of the time measuring unit and the reference clock
Value, determine the local clock of the time detecting unit and the phase deviation of the reference clock.
In S501, reference clock unit produces a measurement pulse, and the frequency of the measurement pulse is less than the benchmark
The frequency of reference clock caused by clock unit.
In S502, S503, the time of the local clock and the reference clock that obtain the time measuring unit respectively surveys
Value.Specifically, pre-setting a characteristic point first, the characteristic point can be the rising edge nearest away from the measurement pulse
Or trailing edge.Secondly, obtain using the characteristic point as starting point on the reference clock, and using it is described measurement pulse rising edge as
The time delay of terminal, the time measured value as the reference clock；And obtain on the local clock with the feature
Point is starting point, and using the rising edge of the measurement pulse as the time delay of terminal, the time measurement as the local clock
Value.As shown in fig. 6, Fig. 6 is the schematic diagram of the time measured value of the local clock or reference clock that determine time detecting unit.Its
In, with the nearest rising edge of the rising edge of range measurement pulse trigger in reference clock clk_base or local clock clk_N
As starting point, and using trigger rising edge as terminal, clk_base or clk_N starting point is obtained to trigger rising
The time delay on edge, as time measured value, i.e. the time measured value T_base of clk_base, and clk_N time measurement
Value T_N.As shown in fig. 6, T_base is different from T_N length, that is to say, that clk_base and clk_N has phase deviation.When
When T_base is identical with T_N length, then illustrates that phase deviation is not present in the clk_base and clk_N, that is, complete clk_
Base clock alignment.
In S504, calculate the local clock of the time measuring unit time measured value and the reference clock when
Between measured value difference, the phase deviation as local clock and the reference clock of the time measuring unit.
In another implementation, the invention provides a kind of local clock that time detecting unit is determined using carry chain
Phase deviation method, with reference to figure 7, Fig. 7 is the local clock of determination time detecting unit provided in an embodiment of the present invention
The flow chart of the method for phase deviation, methods described include:
S701：Obtain measurement pulse caused by reference clock unit.
S702：Using the reference clock and it is described measurement pulse as default carry chain input, by described in determination
The number of carry unit, obtains the time measured value of the reference clock in the carry chain that reference clock passes through.
S703：Using the local clock of time detecting unit and the measurement pulse as the input of the carry chain, pass through
The number of carry unit in the carry chain that the reference clock passes through is determined, obtains the time measurement of the local clock
Value.
S704：According to the time measured value of the local clock and the time measured value of the reference clock, it is determined that described
The phase deviation of the local clock of time detecting unit and the reference clock.
As shown in figure 8, Fig. 8 is the schematic diagram for the time measured value that reference clock or local clock are obtained using carry chain.
Wherein, using reference clock or local clock as START (starting point) input signal for presetting carry chain, and pulse conduct will be measured
STOP (terminal) input signal of the carry chain.Several carry units that the START input signals are passed through in carry chain
After LCELL delay, reach the STOP input signals.The number for the LCELL that the START input signals are passed through is calculated,
And according to the number of the LCELL and each LCELL time delay, calculate the time measured value of the START input signals.
The time measured value of high precision can be obtained due to being handled using carry chain clock, so, the present invention is real
Accuracy can be had more in clock alignment by applying example.Using the above method, the present embodiment can obtain the base of high precision
The time measured value of punctual clock, and the time measured value of the local clock of each time measuring unit.
In a kind of specific implementation, following setting is done in the carry chain in advance：Will be away from the measurement pulse most
Starting point of the rising edge of the near reference clock or local clock as time measured value, and by the rising for measuring pulse
Along the terminal as the time measured value.
It is worth noting that, the carry chain can be integrated on each time measuring unit, and the reference clock
On unit.
In S104, judge whether the local clock of time detecting unit and the phase deviation of reference clock are zero, work as institute
When to state phase deviation be zero, then illustrate that the local clock need not carry out clock alignment.When the phase deviation is not equal to zero
When, the embodiment of the present invention is calibrated using digital phase discriminator to the local clock.
Specifically, as shown in figure 9, Fig. 9 utilizes digital phase discriminator to carry out clock alignment to be provided in an embodiment of the present invention
Schematic diagram.Wherein, by the phase deviation Δ T of the local clock of the time detecting unit and the reference clock and the local
Inputs of the clock clk_N as digital phase discriminator, the phase of the local clock is adjusted according to the phase deviation of the local clock
Position, the local clock clk_N* after being adjusted.The digital phase discriminator can realize that the digitlization to the local clock is adjusted
It is whole, break the simulated clock adjustment modes of existing solidification.It is worth noting that, when the digital phase discriminator is integrated in each
Between in detection unit.
In addition, in order to improve the accuracy of clock alignment, the embodiment of the present invention additionally provides a kind of precision clock calibration
Method.As shown in Figure 10, Figure 10 is the flow chart of precision clock calibration method provided in an embodiment of the present invention.Methods described bag
Include：
S1001：Obtain reference clock caused by reference clock unit.
S1002：Obtain local clock caused by time detecting unit.
S1003：Based on the reference clock, the local clock of the time detecting unit and the reference clock are determined
Phase deviation.
S1004：Judge whether the phase deviation is zero, if it is, when completing the local of the time detecting unit
The calibration of clock；If it is not, then perform S1005.
S1005：Input using the local clock of the phase deviation and the time detecting unit as digital phase discriminator,
Calibration is digitized to the local clock, and using the local clock after digitlization adjusts as calibration object, is continued
Perform S1003.
Because inevitable error problem in itself be present in system, so, the present embodiment passes through repeated clock school
Standard, the inaccurate problem of measurement caused by error is reduced as far as possible.
Moreover, it is noted that in clock correcting method applied to PET/PET-CT/PET-MRI systems, only when
When all time detecting units in the PET/PET-CT/PET-MRI systems complete clock alignment, it is only and has reached PET/
The purpose of the clock alignment of PET-CT/PET-MRI systems.
In the embodiment of the present invention, first, when obtaining reference clock caused by the reference clock unit, and obtaining described
Between local clock caused by detection unit.Secondly, based on the reference clock, the local clock of the time detecting unit is determined
With the phase deviation of the reference clock.When the phase deviation is not equal to zero, the phase deviation and the time are examined
Input of the local clock of unit as digital phase discriminator is surveyed, calibration is digitized to the local clock.It can be seen that the present invention
Embodiment can reach the time inspection of each time detecting unit by carrying out clock alignment to the time detecting unit in system
The accurate unification of mark.
The embodiment of the present invention additionally provides a kind of clock calibrating device, and as shown in figure 11, Figure 11 carries for the embodiment of the present invention
The clock calibrating device structural representation of confession.Described device is applied to PET/PET-CT/PET-MRI systems, the PET/PET-
It is natural number that CT/PET-MRI systems, which include N number of time detecting unit and a reference clock unit, N, and described device includes：
First acquisition module 1101, for obtaining reference clock caused by the reference clock unit.
Second acquisition module 1102, for obtaining local clock caused by the time detecting unit.
First determining module 1103, for based on the reference clock, determining the local clock of the time detecting unit
With the phase deviation of the reference clock.
Calibration module 1104, for when the phase deviation is not equal to zero, the phase deviation and the time to be examined
Input of the local clock of unit as digital phase discriminator is surveyed, calibration is digitized to the local clock.
The embodiment of the present invention utilizes the local clock of High Speed Serialized code stream generation time detection unit, and described second obtains
Module includes：
Encoding submodule, for being encoded by serializer to the reference clock, obtain High Speed Serialized code stream；
Submodule is transmitted, for the High Speed Serialized code stream to be sent into the time detecting unit；
Unstring submodule, for being unstringed using deserializer to the High Speed Serialized code stream, obtains the time inspection
Survey the local clock of unit.
In a kind of implementation, first determining module includes：
First acquisition submodule, pulse is measured caused by the reference clock unit for obtaining；
Second acquisition submodule, for obtaining the reference clock, using default characteristic point as starting point, and with the measurement
The rising edge of pulse is the time delay of terminal, and the time measured value using the time delay as the reference clock；
3rd acquisition submodule, for obtaining the local clock, using the default characteristic point as starting point, and with described
The rising edge for measuring pulse is the time delay of terminal, and the time measurement using the time delay as the local clock
Value；
First determination sub-module, surveyed for the time of the time measured value according to the local clock and the reference clock
Value, determine the local clock of the time detecting unit and the phase deviation of the reference clock.
In another implementation, first determining module includes：
First acquisition submodule, pulse is measured caused by the reference clock unit for obtaining；
4th acquisition submodule, for using the reference clock and the measurement pulse as the defeated of default carry chain
Enter, the number of carry unit in the carry chain passed through by determining the reference clock, obtain the reference clock when
Between measured value；
5th acquisition submodule, for using the local clock of the time detecting unit and it is described measurement pulse as described in
The input of carry chain, the number of carry unit, obtains described in the carry chain passed through by determining the local clock
The time measured value of ground clock；
First determination sub-module, surveyed for the time of the time measured value according to the local clock and the reference clock
Value, determine the local clock of the time detecting unit and the phase deviation of the reference clock.
In addition, in order to improve the accuracy of clock alignment, described device also includes：
Trigger module, for using the local clock after digitlization adjusts as calibration object, triggering described first to be true
Cover half block；
Judge module, for judging that the phase deviation of local clock and the reference clock of the time detecting unit is
No is zero；
Second determining module, for when the judge module result for be when, it is determined that completing the time detecting unit
Local clock calibration.
In the embodiment of the present invention, reference clock caused by the reference clock unit is obtained, and obtains the time inspection
Survey local clock caused by unit.Based on the reference clock, the local clock of the time detecting unit and the base are determined
The phase deviation of punctual clock.When the phase deviation is not equal to zero, by the phase deviation and the time detecting unit
Input of the local clock as digital phase discriminator, calibration is digitized to the local clock.It can be seen that the embodiment of the present invention is led to
Cross and clock alignment is carried out to the time detecting unit in system, the time detecting standard of each time detecting unit can be reached
It is unified.
For device embodiment, because it corresponds essentially to embodiment of the method, so related part is real referring to method
Apply the part explanation of example.Device embodiment described above is only schematical, wherein described be used as separating component
The unit of explanation can be or may not be physically separate, can be as the part that unit is shown or can also
It is not physical location, you can with positioned at a place, or can also be distributed on multiple NEs.Can be according to reality
Need to select some or all of module therein to realize the purpose of this embodiment scheme.Those of ordinary skill in the art are not
In the case of paying creative work, you can to understand and implement.
It should be noted that herein, such as first and second or the like relational terms are used merely to a reality
Body or operation make a distinction with another entity or operation, and not necessarily require or imply and deposited between these entities or operation
In any this actual relation or order.Moreover, term " comprising ", "comprising" or its any other variant are intended to
Nonexcludability includes, so that process, method, article or equipment including a series of elements not only will including those
Element, but also the other element including being not expressly set out, or it is this process, method, article or equipment also to include
Intrinsic key element.In the absence of more restrictions, the key element limited by sentence "including a ...", it is not excluded that
Other identical element also be present in process, method, article or equipment including the key element.
A kind of clock correcting method and device provided above the embodiment of the present invention is described in detail, herein
Apply specific case to be set forth the principle and embodiment of the present invention, the explanation of above example is only intended to help
Understand the method and its core concept of the present invention；Meanwhile for those of ordinary skill in the art, according to the thought of the present invention,
There will be changes in specific embodiments and applications, in summary, this specification content should not be construed as to this
The limitation of invention.
Claims (8)
1. a kind of clock correcting method, it is characterised in that methods described is applied to PET/PET-CT/PET-MRI systems, described
It is natural number that PET/PET-CT/PET-MRI systems, which include N number of time detecting unit and a reference clock unit, N, the side
Method includes：
When obtaining reference clock caused by the reference clock unit, and obtaining local caused by the time detecting unit
Clock；
Based on the reference clock, the local clock of the time detecting unit and the phase deviation of the reference clock are determined；
When the phase deviation is not equal to zero, using the local clock of the phase deviation and the time detecting unit as number
The input of digit phase discriminator, calibration is digitized to the local clock；
Local clock caused by the acquisition time detecting unit, including：
The reference clock unit is encoded by serializer to the reference clock, obtains High Speed Serialized code stream；And will
The High Speed Serialized code stream is sent to the time detecting unit；
The time detecting unit is unstringed using deserializer to the High Speed Serialized code stream, obtains the time detecting list
The local clock of member.
2. according to the method for claim 1, it is characterised in that it is described to be based on the reference clock, determine the time inspection
The local clock of unit and the phase deviation of the reference clock are surveyed, including：
Obtain respectively on the reference clock and the local clock, using default characteristic point as starting point, and with the reference clock
The rising edge of measurement pulse is the time delay of terminal caused by unit, as respective time measured value；
According to the time measured value of the local clock and the time measured value of the reference clock, the time detecting list is determined
The local clock of member and the phase deviation of the reference clock.
3. according to the method for claim 1, it is characterised in that it is described to be based on the reference clock, determine the time inspection
The local clock of unit and the phase deviation of the reference clock are surveyed, including：
Obtain measurement pulse caused by the reference clock unit；
Input using the reference clock and the measurement pulse as default carry chain, by determining that the reference clock passes through
The number of carry unit, obtains the time measured value of the reference clock in the carry chain crossed；
Using the local clock of the time detecting unit and it is described measurement pulse as the carry chain input, by determining
The number of carry unit in the carry chain of local clock process is stated, obtains the time measured value of the local clock；
According to the time measured value of the local clock and the time measured value of the reference clock, the time detecting list is determined
The local clock of member and the phase deviation of the reference clock.
4. according to the method for claim 1, it is characterised in that methods described also includes：
Using by digitlization adjust after local clock be used as calibration object, continue executing with described in be based on the reference clock, really
The phase deviation step of the local clock and the reference clock of the fixed time detecting unit, until the time detecting unit
The phase deviation of local clock and reference clock when being zero, complete the local clock calibration of the time detecting unit.
5. a kind of clock calibrating device, it is characterised in that described device is applied to PET/PET-CT/PET-MRI systems, described
It is natural number that PET/PET-CT/PET-MRI systems, which include N number of time detecting unit and a reference clock unit, N, the dress
Put including：
First acquisition module, for obtaining reference clock caused by the reference clock unit；
Second acquisition module, for obtaining local clock caused by the time detecting unit；
First determining module, for based on the reference clock, determining the local clock of the time detecting unit and the base
The phase deviation of punctual clock；
Calibration module, for when the phase deviation is not equal to zero, by the phase deviation and the time detecting unit
Input of the local clock as digital phase discriminator, calibration is digitized to the local clock；
Second acquisition module includes：
Encoding submodule, for being encoded by serializer to the reference clock, obtain High Speed Serialized code stream；
Submodule is transmitted, for the High Speed Serialized code stream to be sent into the time detecting unit；
Unstring submodule, for being unstringed using deserializer to the High Speed Serialized code stream, obtains the time detecting list
The local clock of member.
6. device according to claim 5, it is characterised in that first determining module includes：
First acquisition submodule, pulse is measured caused by the reference clock unit for obtaining；
Second acquisition submodule, for obtaining the reference clock, using default characteristic point as starting point, and with the measurement pulse
Rising edge be terminal time delay, and the time measured value using the time delay as the reference clock；
3rd acquisition submodule, for obtaining the local clock, using the default characteristic point as starting point, and with the measurement
The rising edge of pulse is the time delay of terminal, and the time measured value using the time delay as the local clock；
First determination sub-module, the time measurement for the time measured value according to the local clock and the reference clock
Value, determines the local clock of the time detecting unit and the phase deviation of the reference clock.
7. device according to claim 5, it is characterised in that first determining module includes：
First acquisition submodule, pulse is measured caused by the reference clock unit for obtaining；
4th acquisition submodule, for using the reference clock and the measurement pulse as the input of default carry chain, leading to
The number of carry unit in the carry chain for determining the reference clock process is crossed, obtains the time measurement of the reference clock
Value；
5th acquisition submodule, for using the local clock of the time detecting unit and the measurement pulse as the carry
The input of chain, the number of carry unit in the carry chain passed through by determining the local clock, when obtaining described local
The time measured value of clock；
First determination sub-module, the time measurement for the time measured value according to the local clock and the reference clock
Value, determines the local clock of the time detecting unit and the phase deviation of the reference clock.
8. device according to claim 5, it is characterised in that described device also includes：
Trigger module, for using the local clock after digitlization adjusts as calibration object, triggering described first to determine mould
Block；
Judge module, for judge the local clock of the time detecting unit and the reference clock phase deviation whether be
Zero；
Second determining module, for when the judge module result for be when, it is determined that completing the sheet of the time detecting unit
Ground clock alignment.
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| CN115694703A (en) * | 2022-09-26 | 2023-02-03 | 三维通信股份有限公司 | Clock synchronization method and device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1523763A (en) * | 2003-02-21 | 2004-08-25 | 明基电通股份有限公司 | Method and system capable of synchronizing clock signal sources of different semiconductor components |
| CN101183244A (en) * | 2007-11-29 | 2008-05-21 | 中国人民解放军国防科学技术大学 | Accurate trigger signal producing method and producing circuit |
| CN103488247A (en) * | 2013-09-17 | 2014-01-01 | 沈阳东软医疗***有限公司 | Clock calibration method, device and system |
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| US7755341B2 (en) * | 2007-07-05 | 2010-07-13 | Intersil Americas Inc. | Steady state frequency control of variable frequency switching regulators |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1523763A (en) * | 2003-02-21 | 2004-08-25 | 明基电通股份有限公司 | Method and system capable of synchronizing clock signal sources of different semiconductor components |
| CN101183244A (en) * | 2007-11-29 | 2008-05-21 | 中国人民解放军国防科学技术大学 | Accurate trigger signal producing method and producing circuit |
| CN103488247A (en) * | 2013-09-17 | 2014-01-01 | 沈阳东软医疗***有限公司 | Clock calibration method, device and system |
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