CN105116797A - Multichannel high-speed data collecting and editing SOC chip - Google Patents

Multichannel high-speed data collecting and editing SOC chip Download PDF

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Publication number
CN105116797A
CN105116797A CN201510465760.4A CN201510465760A CN105116797A CN 105116797 A CN105116797 A CN 105116797A CN 201510465760 A CN201510465760 A CN 201510465760A CN 105116797 A CN105116797 A CN 105116797A
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China
Prior art keywords
module
interface
soc
speed data
signal
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CN201510465760.4A
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Chinese (zh)
Inventor
杨柳
王昊
郭晶晶
张历涛
杨牧
赵瑞峰
张奎彬
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Shanghai Institute of Satellite Engineering
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Shanghai Institute of Satellite Engineering
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Priority to CN201510465760.4A priority Critical patent/CN105116797A/en
Publication of CN105116797A publication Critical patent/CN105116797A/en
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/25Pc structure of the system
    • G05B2219/25314Modular structure, modules

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

The invention provides a multichannel high-speed data collecting and editing SOC chip. The chip integrates common interface protocols in various astronavigation application, a signal acquisition and conditioning circuit and a microprocessor, and peripheral and system parameters of the chip are modified through a configured open interface, thereby realizing functions of an acquisition mode and acquisition speed of multichannel signals and a mode of communication with an upper computer, so as to meet the requirements of specific application. The SOC chip supports characteristics specified by zigbee, 1553B, JTAG and other protocols, the acquisition mode is adjustable, the sampling speed is adjustable, and the external communication mode is optional, system maintenance and updating can be performed conveniently, and at the same time, the multichannel high-speed data collecting and editing SOC chip has the advantages of high integration level, low power consumption, high universality, low cost and high performance.

Description

Multi-channel high-speed data is gathered and edited SOC
Technical field
The present invention relates to multi-channel high-speed data capturing and coding technology, particularly relate to a kind of multi-channel high-speed data and to gather and edit SOC.
Background technology
Present satellites platform technology sharply develops to multi-load, high-precision direction, the technology of this aspect such as the degree of stability to the platform of satellite, gesture stability is had higher requirement, and the basis of such technology is the various sensor informations of collecting and processing on satellite platform.These sensors, according to different functions and demand, are arranged in each different parts of celestial body, and quantity is from tens to up to a hundred.The output signal of these sensors has that way is many, high precision, signal are little and the feature be easily disturbed.
Current satellite platform process is equipped with independently that unit is to complete the collection of these signals usually, but this scheme has defect:
1, unit volume occupies greatly the finite space on star.
2, Performance Match is limited, and power consumption is large, high in cost of production, result in such scheme application limitation large.
Summary of the invention
For defect of the prior art, the object of this invention is to provide a kind of multi-channel high-speed data and to gather and edit SOC.
To gather and edit SOC according to a kind of multi-channel high-speed data provided by the invention, comprise power management module, MCU module, phase-locked loop module PLL, MUX module MUX, Signal-regulated kinase, AD converter, programmable filter, data framing module, three-wire system sync cap protocol module, memory interface module, Interface for digital communication module, jtag interface protocol module, bus inferface protocol module, Zigbee protocol module;
Described MUX module MUX, Signal-regulated kinase, AD converter, programmable filter device form one group of complete data path, the gather and edit external communication interface (three-wire system sync cap, Interface for digital communication, bus protocol interface and memory interface) of SOC of described multi-channel high-speed data contains only protocol section, physical characteristics, by using different external level translation interface chips, realizes the compatibility to distinct interface level.Wherein, described complete data path is the restriction to the data path in invention, and namely the partial data path described in invention is made up of MUX module MUX, Signal-regulated kinase, AD converter, these modules of programmable filter.
Preferably, MCU module adopts the bus communication mode of localbus or adopts point-to-point direct communication mode correspondence with foreign country.
Preferably, described one group complete data path, comprise multiple signal input, MUX module MUX, according to the command request of MCU module, selects corresponding signal input, and input AD converter carries out signals collecting;
The gather and edit inside of SOC of described multi-channel high-speed data comprises multiple signal sampling channel.
Preferably, Signal-regulated kinase is used for carrying out pre-service according to the instruction of MCU module to the input signal that MUX module MUX transmits, input signal is carried out pre-amplification and pre-filtering (anti-aliasing filter), make input signal be applicable to the best effort scope of AD converter.
Preferably, the clock signal of described AD converter is exported by phase-locked loop module PLL, phase-locked loop module PLL carries out frequency division or frequency multiplication according to the control overflow of MCU module to clock signal, realizes the adjustment to AD converter sample frequency by regulation output clock signal.
Preferably, described programmable filter, according to the control overflow of MCU module, carries out filtering to the data after AD converter sampling, retains the signal in required frequency band.
Preferably, described data framing module is by the requirement of the data after AD converter sampling according to CCSDS agreement, and framing exports.
Preferably, the gather and edit Enable Pin of the inner all modules of SOC of described multi-channel high-speed data controls by MCU module, and the module that MCU module will not use according to actual conditions is closed, and reduces the power consumption of chip.
Preferably, described memory interface module is configured with PROM, SRAM, SDRAM, DDR2 and Flash interface; Described Interface for digital communication block configuration has UART interface, SPI interface and I 2c interface; Described bus inferface protocol block configuration has 1553B interface and SpaceWire interface.
Preferably, also comprise wireless communication interface, described wireless communication interface needs external radio circuit when using, described radio circuit comprises modulation-demodulation circuit and antenna, described modulation-demodulation circuit is for the demodulation of the modulation and high-frequency signal that complete baseband signal, and described antenna is for completing transmission and the reception of high-frequency signal.
Compared with prior art, the present invention has following beneficial effect:
1, described SOC has the advantage of high integration, low-power consumption, high universalizable, low cost, high-performance, highly versatile.
2, the common interface protocol in various aerospace applications and signal collection modulation circuit and microprocessor integrate by described SOC, and by the open interface configured, the peripheral hardware of chip and systematic parameter are modified, realize the functions such as the communication mode of the acquisition mode to multi channel signals, acquisition rate and host computer, to meet application-specific.
3, described SOC supports the characteristic of zigbee, 1553B, JTAG and other agreement defineds, and acquisition mode is adjustable, sampling rate is adjustable, correspondence with foreign country mode is optional, can carry out system maintenance and upgrading easily.
Accompanying drawing explanation
By reading the detailed description done non-limiting example with reference to the following drawings, other features, objects and advantages of the present invention will become more obvious:
Fig. 1 is structured flowchart of the present invention.
Fig. 2 is control flow of the present invention.
Embodiment
Below in conjunction with specific embodiment, the present invention is described in detail.Following examples will contribute to those skilled in the art and understand the present invention further, but not limit the present invention in any form.It should be pointed out that to those skilled in the art, without departing from the inventive concept of the premise, some changes and improvements can also be made.These all belong to protection scope of the present invention.
To gather and edit SOC according to a kind of multi-channel high-speed data provided by the invention, comprise power management module, MCU module, phase-locked loop module PLL, MUX module MUX, Signal-regulated kinase, AD converter, programmable filter, data framing module, three-wire system sync cap protocol module, memory interface module, Interface for digital communication module, jtag interface protocol module, bus inferface protocol module, Zigbee protocol module;
Described MUX module MUX, Signal-regulated kinase, AD converter, programmable filter device are one group of complete data path, communication interface contains only protocol section, physical characteristics, by using different external level translation interface chips, realizes the compatibility to distinct interface level.
MCU module adopts the bus communication mode of localbus or adopts point-to-point direct communication mode correspondence with foreign country.Described one group complete data path, comprise multiple signal input, MUX module MUX, according to the command request of MCU module, selects corresponding signal input, and input AD converter carries out signals collecting;
The gather and edit inside of SOC of described multi-channel high-speed data comprises multiple signal sampling channel.Signal-regulated kinase is used for carrying out pre-service according to the instruction of MCU module to the input signal that MUX module MUX transmits, input signal is carried out pre-amplification and pre-filtering (anti-aliasing filter), make input signal be applicable to the best effort scope of AD converter.The clock signal of described AD converter is exported by phase-locked loop module PLL, and phase-locked loop module PLL carries out frequency division or frequency multiplication according to the control overflow of MCU module to clock signal, realizes the adjustment to AD converter sample frequency by regulation output clock signal.Described programmable filter, according to the control overflow of MCU module, carries out filtering to the data after AD converter sampling, retains the signal in required frequency band.Described data framing module is by the requirement of the data after AD converter sampling according to CCSDS agreement, and framing exports.
The gather and edit Enable Pin of the inner all modules of SOC of described multi-channel high-speed data controls by MCU module, and the module that MCU module will not use according to actual conditions is closed, and reduces the power consumption of chip.Described memory interface module is configured with PROM, SRAM, SDRAM, DDR2 and Flash interface; Described Interface for digital communication block configuration has UART interface, SPI interface and I 2c interface; Described bus inferface protocol block configuration has 1553B interface and SpaceWire interface.Described multi-channel high-speed data SOC of gathering and editing also comprises wireless communication interface, described wireless communication interface needs external radio circuit when using, described radio circuit comprises modulation-demodulation circuit and antenna, described modulation-demodulation circuit is for the demodulation of the modulation and high-frequency signal that complete baseband signal, and described antenna is for completing transmission and the reception of high-frequency signal.
Described multi-channel high-speed data is gathered and edited the interface control method of SOC, comprises the steps:
Step 1: the control command being received host computer by bus inferface protocol module.
Step 2:MCU module resolves PC control order, carries out initialization (initialization content comprises: sampling rate, signal bandwidth, external communication interface etc.) to each acquisition channel.
Step 3: wait for bus marco instruction, to sampling input data.(selection mode of input channel, to be included in steering order but not in initialization directive, can realize flexibly a little adopting, the multiple sample mode such as Quan Cai, choosing are adopted.)
Step 4: image data is sent into data framing module and carry out framing transmission.
Step 5: be sent completely next bus marco instruction of rear wait.
Above specific embodiments of the invention are described.It is to be appreciated that the present invention is not limited to above-mentioned particular implementation, those skilled in the art can make a variety of changes within the scope of the claims or revise, and this does not affect flesh and blood of the present invention.

Claims (10)

1. a multi-channel high-speed data is gathered and edited SOC, comprise power management module, MCU module, phase-locked loop module PLL, MUX module MUX, Signal-regulated kinase, AD converter, programmable filter, data framing module, three-wire system sync cap protocol module, memory interface module, Interface for digital communication module, jtag interface protocol module, bus inferface protocol module, Zigbee protocol module, it is characterized in that:
Described MUX module MUX, Signal-regulated kinase, AD converter, programmable filter form one group of complete data path, the gather and edit external communication interface of SOC of described multi-channel high-speed data contains only protocol section, physical characteristics, by using different external level translation interface chips, realizes the compatibility to distinct interface level.
2. multi-channel high-speed data according to claim 1 is gathered and edited SOC, it is characterized in that, MCU module adopts the bus communication mode of localbus or adopts point-to-point direct communication mode correspondence with foreign country.
3. multi-channel high-speed data according to claim 1 is gathered and edited SOC, it is characterized in that, described one group complete data path, comprise multiple signal input, MUX module MUX is according to the command request of MCU module, select corresponding signal input, input AD converter carries out signals collecting;
The gather and edit inside of SOC of described multi-channel high-speed data comprises multiple signal sampling channel.
4. multi-channel high-speed data according to claim 2 is gathered and edited SOC, it is characterized in that, Signal-regulated kinase is used for carrying out pre-service according to the instruction of MCU module to the input signal that MUX module MUX transmits, input signal is carried out pre-amplification and pre-filtering, makes input signal be applicable to the best effort scope of AD converter.
5. multi-channel high-speed data according to claim 2 is gathered and edited SOC, it is characterized in that, the clock signal of described AD converter is exported by phase-locked loop module PLL, phase-locked loop module PLL carries out frequency division or frequency multiplication according to the control overflow of MCU module to clock signal, realizes the adjustment to AD converter sample frequency by regulation output clock signal.
6. multi-channel high-speed data according to claim 2 is gathered and edited SOC, it is characterized in that, described programmable filter, according to the control overflow of MCU module, carries out filtering to the data after AD converter sampling, retains the signal in required frequency band.
7. multi-channel high-speed data according to claim 1 is gathered and edited SOC, it is characterized in that, described data framing module AD converter is sampled after data according to the requirement of CCSDS agreement, framing exports.
8. multi-channel high-speed data according to any one of claim 1 to 7 is gathered and edited SOC, it is characterized in that, the gather and edit Enable Pin of the inner all modules of SOC of described multi-channel high-speed data controls by MCU module, the module do not used is closed according to actual conditions by MCU module, reduces the power consumption of chip.
9. multi-channel high-speed data according to any one of claim 1 to 7 is gathered and edited SOC, and it is characterized in that, described memory interface module is configured with PROM, SRAM, SDRAM, DDR2 and Flash interface; Described Interface for digital communication block configuration has UART interface, SPI interface and I 2c interface; Described bus inferface protocol block configuration has 1553B interface and SpaceWire interface.
10. multi-channel high-speed data according to claim 9 is gathered and edited SOC, it is characterized in that, also comprise wireless communication interface, described wireless communication interface needs external radio circuit when using, described radio circuit comprises modulation-demodulation circuit and antenna, described modulation-demodulation circuit is for the demodulation of the modulation and high-frequency signal that complete baseband signal, and described antenna is for completing transmission and the reception of high-frequency signal.
CN201510465760.4A 2015-07-31 2015-07-31 Multichannel high-speed data collecting and editing SOC chip Pending CN105116797A (en)

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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105739464A (en) * 2016-01-27 2016-07-06 四川长虹电器股份有限公司 Main control communication method used for intelligent household electrical appliances
CN105869385A (en) * 2016-05-17 2016-08-17 华南理工大学 Electrical power system data acquisition and transmission on-chip system supporting IEC61850
CN106933134A (en) * 2015-12-31 2017-07-07 中核陕西铀浓缩有限公司 Multi-channel intelligent main frame frequency signal detects box
CN106970567A (en) * 2017-05-04 2017-07-21 深圳市蟠桃树科技有限公司 A kind of configurable wireless data acquisition device and its implementation
CN106982261A (en) * 2017-05-05 2017-07-25 深圳市蟠桃树科技有限公司 A kind of remote data acquisition system
CN107123248A (en) * 2017-05-04 2017-09-01 深圳市蟠桃树科技有限公司 A kind of remote data acquisition device for supporting Modbus protocol-intelligent instrument
CN107145457A (en) * 2017-04-25 2017-09-08 电子科技大学 The device and method of multichannel valid data transmission is lifted based on RAM on piece
CN107894719A (en) * 2017-10-31 2018-04-10 中国运载火箭技术研究院 A kind of highly integrated small size is wirelessly gathered and edited device
CN109120633A (en) * 2018-09-05 2019-01-01 天津市英贝特航天科技有限公司 A kind of 1553B and Zigbee protocol conversion equipment
CN111521272A (en) * 2020-04-29 2020-08-11 南京信息工程大学 Application specific integrated circuit and ASIC chip for thermopile sensor
CN112559413A (en) * 2021-03-01 2021-03-26 南京初芯集成电路有限公司 Ultra-high speed interface of OLED screen driving chip and driving chip framework

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2750317Y (en) * 2004-12-09 2006-01-04 中国船舶重工集团公司第七二五研究所 Multi-channel galvanic corrosion experiment data collecting device
US20110320672A1 (en) * 2000-09-08 2011-12-29 Kumar Ganapathy Method and apparatus for distributed direct memory access for systems on chip
CN103777529A (en) * 2012-10-24 2014-05-07 北京强度环境研究所 Fast varying signal collector
CN203964925U (en) * 2014-07-11 2014-11-26 中国人民解放军空军航空大学 Strapdown magnetic heading signal de-noising filter processing

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110320672A1 (en) * 2000-09-08 2011-12-29 Kumar Ganapathy Method and apparatus for distributed direct memory access for systems on chip
CN2750317Y (en) * 2004-12-09 2006-01-04 中国船舶重工集团公司第七二五研究所 Multi-channel galvanic corrosion experiment data collecting device
CN103777529A (en) * 2012-10-24 2014-05-07 北京强度环境研究所 Fast varying signal collector
CN203964925U (en) * 2014-07-11 2014-11-26 中国人民解放军空军航空大学 Strapdown magnetic heading signal de-noising filter processing

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106933134A (en) * 2015-12-31 2017-07-07 中核陕西铀浓缩有限公司 Multi-channel intelligent main frame frequency signal detects box
CN105739464A (en) * 2016-01-27 2016-07-06 四川长虹电器股份有限公司 Main control communication method used for intelligent household electrical appliances
CN105739464B (en) * 2016-01-27 2018-11-30 四川长虹电器股份有限公司 Master Communications method in intelligent appliance equipment
CN105869385A (en) * 2016-05-17 2016-08-17 华南理工大学 Electrical power system data acquisition and transmission on-chip system supporting IEC61850
CN107145457A (en) * 2017-04-25 2017-09-08 电子科技大学 The device and method of multichannel valid data transmission is lifted based on RAM on piece
CN107145457B (en) * 2017-04-25 2019-10-29 电子科技大学 The device and method of multichannel valid data transmission is promoted based on piece RAM
CN106970567A (en) * 2017-05-04 2017-07-21 深圳市蟠桃树科技有限公司 A kind of configurable wireless data acquisition device and its implementation
CN107123248A (en) * 2017-05-04 2017-09-01 深圳市蟠桃树科技有限公司 A kind of remote data acquisition device for supporting Modbus protocol-intelligent instrument
CN106982261A (en) * 2017-05-05 2017-07-25 深圳市蟠桃树科技有限公司 A kind of remote data acquisition system
CN107894719A (en) * 2017-10-31 2018-04-10 中国运载火箭技术研究院 A kind of highly integrated small size is wirelessly gathered and edited device
CN109120633A (en) * 2018-09-05 2019-01-01 天津市英贝特航天科技有限公司 A kind of 1553B and Zigbee protocol conversion equipment
CN111521272A (en) * 2020-04-29 2020-08-11 南京信息工程大学 Application specific integrated circuit and ASIC chip for thermopile sensor
CN112559413A (en) * 2021-03-01 2021-03-26 南京初芯集成电路有限公司 Ultra-high speed interface of OLED screen driving chip and driving chip framework

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Application publication date: 20151202