CN204046839U - A kind of heterogeneous polynuclear high speed radio transmission equipment - Google Patents
A kind of heterogeneous polynuclear high speed radio transmission equipment Download PDFInfo
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- CN204046839U CN204046839U CN201420456825.XU CN201420456825U CN204046839U CN 204046839 U CN204046839 U CN 204046839U CN 201420456825 U CN201420456825 U CN 201420456825U CN 204046839 U CN204046839 U CN 204046839U
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Abstract
The utility model relates to a kind of heterogeneous polynuclear high speed radio transmission equipment, comprising: Ethernet interface, front radio-frequency interface, baseband processor, internal memory, GPS module, flash memory module, power supply, FMC and/or USB interface and JTAG debugging interface; Described baseband processor is connected with JTAG debugging interface with Ethernet interface, front radio-frequency interface, internal memory, GPS module, flash memory module, power supply, FMC and/or USB interface respectively.The utility model can support various communications protocols.
Description
Technical field
The utility model relates to high-speed radiocommunication technical field, particularly relates to a kind of heterogeneous polynuclear high speed radio transmission equipment.
Background technology
Current wireless communication technology is just towards two-forty, Large Copacity, flexibly rapid deployment future development, and along with the development of wireless communication technology, wireless communication system also constantly upgrades.On the one hand, radio communication is compute-intensive applications inherently, and two-forty and the conversion speed of Large Copacity to communication system are had higher requirement, and flexible rapid deployment requires that communication system is towards miniaturization, say from performance, communication system must possess higher computing capability.On the other hand in current 2G customer group scale still comparatively large, 3G has realized commercialization, 4G technology is tending towards ripe, the technology of 5G technology and even renewal is is constantly researched and developed present situation, cause multiple communication standard, communication standard will coexist within following a period of time, require that communication system can support multiple communication standard well., if complete communication system upgrading by transformation hardware device, there are problems in the demand of these two aspects, as: the construction cycle is long, cost is high, poor compatibility etc. between different system, is unfavorable for wireless communication technology develop rapidly.And along with telecommunications network, the Internet, broadcasting and television network integration of three networks process are accelerated, the conversion requirements between heterogeneous networks communication protocol forces communication system to have protocol conversion capability more flexibly further.For the problems referred to above, software and radio technique and heterogeneous multi-nucleus processor provide solution to a certain degree from system upgrade flexibility and systematic function respectively.
Heterogeneous multi-nucleus processor makes each communication module only need carry out communication in sheet, again can according to the data processing feature of module by different communication module assignment to different processor or Resources on Chip, be very suitable for realizing chip-on communication system.In embedded heterogeneous multi-core field, typical design is the embedded system platform OMPA that TI company releases, it is one " RISC+DSP " design (Reduced Instruction Set Computer Reduced Instruction Set Computer, refer to arm processor), be made up of ARM core and DSP (Digital Signal Processor digital signal processor) core, the Zynq7000 series that Ling You Xilinx company releases, these series of products merge multinuclear arm processor and FPGA resource.
The heterogeneous polynuclear Wireless Telecom Equipment existed at present, as products such as E-Link1000Q, MINI-LINK, module integration degree is low, and equipment volume is large, and transmission rate speed is 1G ~ 2.5Gbps.Therefore, development cost is lower, function is more complete, the high speed radio transmission equipment of small volume has practical application in the modem procedue of certain modulation system of research.
Utility model content
Technical problem to be solved in the utility model is to provide a kind of heterogeneous polynuclear high speed radio transmission equipment, can support various communications protocols.
The utility model solves the technical scheme that its technical problem adopts: provide a kind of heterogeneous polynuclear high speed radio transmission equipment, comprising: Ethernet interface, front radio-frequency interface, baseband processor, internal memory, GPS module, flash memory module, power supply, FMC and/or USB interface and JTAG debugging interface; Described baseband processor is connected with JTAG debugging interface with Ethernet interface, front radio-frequency interface, internal memory, GPS module, flash memory module, power supply, FMC and/or USB interface respectively.
Described Ethernet interface is gigabit ethernet interface, is made up of the physical chip of Marvell company.
The working band of described front radio-frequency interface is 70MHz-6.0GHz, and the channel width of support is 200kHz-56MHz, and antennal interface selects active antenna, built-in low noise amplifier.
Described baseband processor is made up of Xilinx company Zynq7000 family chip, the FPGA resource of the two ARM core of configuration and V7 series A rtix.
DDR3SDRAM high-speed cache is saved as in described.
Described GPS module is made up of 5 serial GPS chips of U-blox company.
Beneficial effect
Owing to have employed above-mentioned technical scheme, the utility model compared with prior art, there is following advantage and good effect: the utility model can the communication such as flexible configuration Wi-Fi, LTE, support the gigabit rate protocols data transaction of gigabit Ethernet and various wireless communication agreement, be equipped with four antennas and support later stage multiple antennas modulation demand, can various communications protocols be supported.Be configured with complete data flow processing system, possesses the hardware capabilities that network (Internet, telecommunications network or two borders of netting) website of transferring establishes one's own system, can need to be further configured to the communication equipment such as router, the little base station of radio frequency according to application, be the communication test platforms such as function is more complete, lower-cost LTE.
Accompanying drawing explanation
Fig. 1 is heterogeneous polynuclear high speed radio transmission device structure schematic diagram of the present utility model.
Embodiment
Below in conjunction with specific embodiment, set forth the utility model further.Should be understood that these embodiments are only not used in restriction scope of the present utility model for illustration of the utility model.In addition should be understood that those skilled in the art can make various changes or modifications the utility model, and these equivalent form of values fall within the application's appended claims limited range equally after the content of having read the utility model instruction.
Execution mode of the present utility model relates to a kind of heterogeneous polynuclear high speed radio transmission equipment, as shown in Figure 1, comprising: Ethernet interface, front radio-frequency interface, baseband processor, internal memory, GPS module, flash memory module, power supply, FMC and/or USB interface and JTAG debugging interface; Described baseband processor is connected with JTAG debugging interface with Ethernet interface, front radio-frequency interface, internal memory, GPS module, flash memory module, power supply, FMC and/or USB interface respectively.Wherein, Ethernet interface is used for sending and receiving data in network; Front radio-frequency interface is for receiving on-air radio signal and the deal with data of baseband processor being carried out frequency conversion transmission; The data that baseband processor is used for data or the front radio-frequency interface received gigabit ethernet interface process, (it is prior art that baseband processor carries out conversion between agreement in i.e. protocol conversion, the application does not improve protocol conversion mode, therefore repeats no more); Internal memory is in order to be temporarily stored in communication process the data having little time to receive and dispatch; GPS module is used for providing the functions such as location, range finding to upper layer application; Flash memory is used for stores system parameters; Power supply is used for powering to Ethernet interface, front radio-frequency interface, baseband processor, internal memory, GPS module and flash memory; FMC and/or USB interface, for providing system and the external world mutual ability; JTAG debugging interface, for external JTAG downloader, provides USB to turn jtag interface simultaneously, can directly download from USB port.
The utility model is based on heterogeneous multi-nucleus processor, possesses complete data flow processing system, can the communication such as flexible configuration Wi-Fi, LTE, supporting the gigabit rate protocols data transaction of gigabit Ethernet and various wireless communication agreement, is that cost is lower, function is more complete, the high speed radio transmission equipment of small volume.
Described JTAG debugging interface, uses common jtag interface, and canonical form is 4 line interfaces: TMS, TCK, TDI, TDO, is respectively model selection line, clock line, Data In-Line and DOL Data Output Line.Host computer directly can be downloaded by jtag interface with JTAG downloader.The jtag interface that this equipment not only leaves 14 pins connects JTAG downloader, and also devise USB simultaneously and turn JTAG download circuit, host computer can directly be downloaded by USB data line, and this partial circuit selects chip FT232H and usb 1 981584-1.
Described flash memory can store desired parameters in some communication process, such as Ethernet hardware address.Preferably, adopt serial Flash memory chip W25Q256, support standard SPI protocol, Dual SPI protocol and Quad SPI protocol, be operated in 2.7V to 3.6V.Have the memory space of 256Mbit, be divided into 131072 pages able to programme, every page of 256 bytes, can disposable erasing 16 pages (4kBits), 128 (32kBits) pages or 256 pages (64kBits).
Described power supply must meet the power requirement of communication system and the requirement of each chip input voltage amplitude and stability.The external power supply of whole communication system is input as 12V DC power supply, and this is more common power supply input, is commercially easy to obtain.The input voltage used due to whole communication system each chip inner is not direct 12V, also higher to the requirement of voltage stability, therefore, need to carry out voltage transitions and voltage stabilizing operation to 12V external power supply, preferably, adopt MAX8686 chip to complete 12V and turn 5V, MAX15021 chip completes 5V and turns 3.3V, 5V and turn 1.5V, 5V and turn 1.0V and 5V and turn adjustable voltage VADJ, and MAX15053 chip completes 5V and turns 1.8V and MAX1510 chip and complete 3.3V and turn DDR3RAM reference voltage 0.75V.
Described Ethernet interface is gigabit ethernet interface.In On-Chip peripheral due to the chip used Zynq7020 of baseband processor, contain two gigabit Ethernet data link layer stones, can the Frame of automatic data processing link layer.But the stone of the physical layer transmission that configuration is relevant, therefore, does not need a physical layer transmission chip.Preferably, adopt the 88E1512 chip of Marvell company, support 1.8V, 2.5V and 3.3V multiple voltage pattern, an external Ethernet RJ-45 interface, selects HR901130C interface, realizes complete gigabit ethernet interface unit.
Described baseband processor adopts the baseband processor chip simultaneously possessing arm processor and FPGA resource, and will possess high speed dominant frequency and could process gigabit Ethernet data.Preferably, select the Zynq7020 chip of Xilinx company as baseband processor, this chip includes ARM Cortex-A9 double-core treatment system (Processing System) and Xilinx former 7000 series (Artix) PLC a feature richness and is integrated in an independent processor, is the processor of high-performance, low-power consumption, 28nm magnitude.Wherein the ARM Cortex-A9 processor of PS part comprises a series of peripheral control unit, wherein just comprises Gigabit Ethernet controller.And the connection of arm processor and FPGA resource, namely interconnected between PS part and PL part, be realized by high-performance data bus.
Described front radio-frequency interface requirement can support the various wireless communication agreements such as Wi-Fi, LTE of different frequency range different bandwidth flexibly, and radio-frequency front-end should possess has allocative abilities more flexibly on frequency spectrum and bandwidth.Preferably, adopt AD9361 chip as front radio-frequency interface chip.AD9361 supports the operation of frequency division multiplexing, time division multiplexing, band limits is configurable at 70MHz ~ 6.0GHz, the frequency bandwidth of the channel supported is 200kHz ~ 56MHz, there are 6 pairs of Differential Input and 4 pairs of difference output, be integrated with phase-locked loop, voltage controlled oscillator, loop filter and 12 analog to digital converters, digital to analog converters.There are 3 receive paths, 2 sendaisles.Preferably, this equipment adopts two two to receive working method, and outside connection 4 RP-SMA antennal interfaces, possess multiple antennas allocative abilities.
Described internal memory adopts DDR3SDRAM as expansion RAM, in order to be temporarily stored in communication process the data having little time to receive and dispatch.Preferably, adopt MEM4G16D3EABG-125I chip, 4Gbit capacity DDR3SDRAM, inside is divided into 8 Ge Kuai districts, there is 32M word in each piece of district, i.e. data bit width 16, by the BDB Bi-directional Data Bus of 16 bit wides, carry out data transmission, support the data transfer rate up to 1.6Gbps/1.333Gbps/1.066Gbps.Preferably, be 32 bit data width by two panels MEM4G16D3EABG-125I parallel-expansion.
Described FMC and/or usb interface unit, wherein, FMC interface adopts ASP-134603-01, USB to adopt USB3320C-EZK chip.
Described GPS module adopts 5 serial GPS chips of U-blox company, has LEA-5, NEO-5, TIM-5H tri-kinds of models.This 5 family chip receiving satellite signal in 1575.42MHz frequency.From framework, these three sections of GPS chips have two functional areas, and one is radio-frequency front-end, and one is baseband portion.Radio-frequency front-end comprises low noise amplifier, band pass filter, crystal oscillator and radio circuit.Baseband portion comprises a baseband processor for mutual with baseband processing unit Zynq7020.Preferably, LEA-5A is adopted.
Be not difficult to find, the utility model can the communication such as flexible configuration Wi-Fi, LTE, support the gigabit rate protocols data transaction of gigabit Ethernet and various wireless communication agreement, be equipped with four antennas and support later stage multiple antennas modulation demand, can various communications protocols be supported.Be configured with complete data flow processing system, possesses the hardware capabilities that network (Internet, telecommunications network or two borders of netting) website of transferring establishes one's own system, can need to be further configured to the communication equipment such as router, the little base station of radio frequency according to application, be the communication test platforms such as function is more complete, lower-cost LTE.
Claims (6)
1. a heterogeneous polynuclear high speed radio transmission equipment, is characterized in that, comprising: Ethernet interface, front radio-frequency interface, baseband processor, internal memory, GPS module, flash memory module, power supply, FMC and/or USB interface and JTAG debugging interface; Described baseband processor is connected with JTAG debugging interface with Ethernet interface, front radio-frequency interface, internal memory, GPS module, flash memory module, power supply, FMC and/or USB interface respectively.
2. heterogeneous polynuclear high speed radio transmission equipment according to claim 1, is characterized in that, described Ethernet interface is gigabit ethernet interface, is made up of the physical chip of Marvell company.
3. heterogeneous polynuclear high speed radio transmission equipment according to claim 1, it is characterized in that, the working band of described front radio-frequency interface is 70MHz-6.0GHz, and the channel width of support is 200kHz-56MHz, antennal interface selects active antenna, built-in low noise amplifier.
4. heterogeneous polynuclear high speed radio transmission equipment according to claim 1, is characterized in that, described baseband processor is made up of Xilinx company Zynq7000 family chip, the FPGA resource of the two ARM core of configuration and V7 series A rtix.
5. heterogeneous polynuclear high speed radio transmission equipment according to claim 1, is characterized in that, save as DDR3SDRAM high-speed cache in described.
6. heterogeneous polynuclear high speed radio transmission equipment according to claim 1, is characterized in that, described GPS module is made up of 5 serial GPS chips of U-blox company.
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| CN201420456825.XU CN204046839U (en) | 2014-08-13 | 2014-08-13 | A kind of heterogeneous polynuclear high speed radio transmission equipment |
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| CN201420456825.XU CN204046839U (en) | 2014-08-13 | 2014-08-13 | A kind of heterogeneous polynuclear high speed radio transmission equipment |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105406885A (en) * | 2015-12-14 | 2016-03-16 | 天津光电通信技术有限公司 | Automatic ship identification system adopting radio frequency (RF) agile transceiver AD9361 and configuration method |
| CN106059618A (en) * | 2016-05-13 | 2016-10-26 | 湖南基石通信技术有限公司 | Method and apparatus for transmitting and receiving signals in radio frequency link |
| CN106357295A (en) * | 2016-10-17 | 2017-01-25 | 天津光电通信技术有限公司 | Ship automatic identification system with RF agile transceiver AD9361 and implementation method thereof |
| CN106970893A (en) * | 2017-04-19 | 2017-07-21 | 惠州Tcl移动通信有限公司 | A kind of 5G hardware platform systems and its implementation based on SOC |
| CN114915352A (en) * | 2022-04-11 | 2022-08-16 | 南京理工大学 | PWM modulation-demodulation control system based on FPGA |
| CN115118350A (en) * | 2022-06-27 | 2022-09-27 | 北京西姆瑞通科技有限公司 | Miniaturized channel simulator |
-
2014
- 2014-08-13 CN CN201420456825.XU patent/CN204046839U/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105406885A (en) * | 2015-12-14 | 2016-03-16 | 天津光电通信技术有限公司 | Automatic ship identification system adopting radio frequency (RF) agile transceiver AD9361 and configuration method |
| CN106059618A (en) * | 2016-05-13 | 2016-10-26 | 湖南基石通信技术有限公司 | Method and apparatus for transmitting and receiving signals in radio frequency link |
| CN106059618B (en) * | 2016-05-13 | 2018-10-19 | 湖南基石通信技术有限公司 | Signal transmit-receive method and device in a kind of radio frequency link |
| CN106357295A (en) * | 2016-10-17 | 2017-01-25 | 天津光电通信技术有限公司 | Ship automatic identification system with RF agile transceiver AD9361 and implementation method thereof |
| CN106970893A (en) * | 2017-04-19 | 2017-07-21 | 惠州Tcl移动通信有限公司 | A kind of 5G hardware platform systems and its implementation based on SOC |
| WO2018192537A1 (en) * | 2017-04-19 | 2018-10-25 | Tcl通讯（宁波）有限公司 | Soc-based 5g hardware platform system and method for achieving same |
| CN114915352A (en) * | 2022-04-11 | 2022-08-16 | 南京理工大学 | PWM modulation-demodulation control system based on FPGA |
| CN115118350A (en) * | 2022-06-27 | 2022-09-27 | 北京西姆瑞通科技有限公司 | Miniaturized channel simulator |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141224 Termination date: 20150813 |
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| EXPY | Termination of patent right or utility model |