CN105067168B - One kind grinding wafer sub-surface residual stress test method - Google Patents
One kind grinding wafer sub-surface residual stress test method Download PDFInfo
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- CN105067168B CN105067168B CN201510420054.8A CN201510420054A CN105067168B CN 105067168 B CN105067168 B CN 105067168B CN 201510420054 A CN201510420054 A CN 201510420054A CN 105067168 B CN105067168 B CN 105067168B
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Abstract
One kind grinding wafer sub-surface residual stress test method, belongs to residual stress test field.Its step includes：Grinding wafer is provided；High pressure water cleaning wafer；Fixed wafer；Corrosion sites are determined, are corroded, are cleaned；White light interferometer and laser Raman spectroscopy is utilized respectively to test corrosion depth, residual stress；Grinding wafer sub-surface residual-stress value can be obtained by repeating above experimental procedure.The present invention is simple to operate, grinding wafer sub-surface residual stress can be more accurately obtained, by test result analysis, it is proposed that grinding process prioritization scheme.
Description
Technical field
Wafer sub-surface residual stress test method is ground the present invention relates to one kind, more particularly to a kind of distribution is corroded and drawn
The method that graceful spectrum test is ground wafer sub-surface residual stress.
Background technology
With developing rapidly for IC manufacturing technologies, in order to increase IC chip yield, unit making cost is reduced, wafer tends to
Ever-larger diameterses, wafer size develops into now widely used 8 inches from initial 2 inches, or even towards more large scale direction
Development.As diameter wafer increases, in order to ensure that wafer has enough intensity, the thickness of wafer also accordingly increases.Current 8 English
725 microns of the average thickness of very little wafer, and 12 inch wafer average thickness have increased to 775 microns, in contrast, to meet IC
The need for chip package, the reliability of IC especially Power ICs is improved, thermal resistance is reduced, the heat-sinking capability and finished product of chip is improved
Rate, it is desired to which chip thickness is thinned, the average thickness of chip every two years reduces half.Current chip thickness oneself be reduced to 100-
200 microns, smart card, the IC chip thickness such as MEMS and biomedical sensor reduced to less than 100 microns, high density electronics
The three-dimensionally integrated and three-dimensional encapsulation chip of structure is even more the ultra-thin wafer for needing thickness to be less than 50 microns.
It is the key for determining wafer thickness that ability, which is thinned, in wafer, and the thinning technique of current main flow is gone round and round a millstone for wafer spin cuts skill
Art, but mechanical processing process unavoidably causes the damage of crystal column surface, damage will cause residual stress.Residual stress is one
Internal stress is planted, the presence of residual stress will cause the warpage of wafer and promote the extension of underbead crack, cause the broken of wafer
Split, the transmission belt to wafer is greatly challenged.The damage layer depth of wafer is more than ten microns, residual stress under normal circumstances
Exist in certain depth bounds.At present, the detection for being ground crystal column surface residual stress is mainly carried out using Raman spectrum
Non-Destructive Testing, and the detection to wafer sub-surface residual stress then needs to carry out wafer on mechanical microsection manufacture section sample.So
And, slicing processes can introduce new cutting residual stress while part grinding residual stress can be discharged, and influence residual stress is surveyed
The accuracy of examination.
The substep corrosion of " Young " solution can constantly remove corrosion region material and reach sub-surface, and will not introduce new remnants should
Power, influences smaller to residual stress test result.
The content of the invention
Wafer sub-surface residual stress test method, including experimental method and data processing are ground the invention provides one kind
Method.Experimental method mainly solves the test of corrosion depth and is ground the test problem of wafer sub-surface residual stress, data
Processing method mainly solves the problems, such as calculating and the residual stress calculation of corrosion depth.Experimental principle is simple, easy to operate, as a result
Reliably.
One kind grinding wafer sub-surface residual stress test method, it is characterised in that comprise the following steps：
The monocrystalline silicon wafer crystal after grinding is provided, clear water rinses crystal column surface, and fixed wafer is simultaneously cleaned with organic solvent；It is determined that
Test point, test point is located at<110>Crystal orientation, along radius distribution, at least three test point, the first test point is away from wafer center of circle 10-
15mm, the second test point is away from the first test point 40-60mm, and the 3rd test point is away from the second test point 40-60mm；Utilize " Young " molten
Liquid corrodes to each test point, and each measuring point corrodes 8 times altogether, each etching time be respectively 2s, 3s, 4s, 5s, 10s,
15s, 25s, 40s, every time corrosion terminate to clean corrosion region with clear water with etch-stop；Treat that corrosion region is dried, first with white
Optical interferometer measures corrosion depth, then utilizes raman spectroscopy measurement residual stress.
Further, the proportioning of described " Young " solution is H2O:HF (mass percent concentration is 49%):Cr2O3=
500ml:500ml:75g。
Further, it is characterised in that Gauss curve fitting is carried out to Raman test curve.
More specifically：Corrosion depth is detected using substep etch, white light interferometer, Raman spectrum is then utilized
Instrument is detected to grinding wafer sub-surface residual stress.In experimentation, wafer is ground first, wafer is rinsed with water
Wafer is fixed with removing the abrasive dust of residual in surface, with organic solvent (such as acetone, alcohol) secondary cleaning wafer.It is determined that<110>
Crystal orientation, along 3 test points of radius distribution.Each test point is corroded using " Young " solution, each measuring point corrodes 8 altogether
Secondary, each etching time is respectively 2s, 3s, 4s, 5s, 10s, 15s, 25s, 40s, cleans corrosion sites with clear water after corrosion every time
With etch-stop process.Wafer is fixed on the microscope carrier of white light interferometer, corrosion depth is tested；Then surveyed using Raman spectrum
Corrosion region residual stress is tried, Gauss curve fitting is carried out to Raman test result, residual stress is finally calculated.
The desirable following beneficial effect of the present invention：
1. experimental method proposed by the present invention can be solved, grinding wafer sub-surface residual stress test is inaccurate and corrosion is deep
The problem of degree test is difficult.
2. data processing method proposed by the present invention can accurately obtain residual-stress value and corrosion depth.
3. method of testing principle proposed by the present invention is simple, reliable, it is ensured that the accuracy of test result.
Brief description of the drawings：
Fig. 1 is that wafer is ground schematic diagram.
Fig. 2 is wafer positioning corrosion schematic diagram.
Fig. 3 is corrosion depth test schematic diagram.
Fig. 4 is residual stress distribution schematic diagram.
Fig. 5 is residual stress distribution schematic diagram in document.
Fig. 6 flow charts of the present invention
In figure：
1-emery wheel, wafer before 2-grinding, 3-sucker, 4-neck, wafer, 6-alignment pin after 5-grinding.
Embodiment
Method of testing proposed by the present invention comprises the following steps：
1：It is ground wafer：Milling drum grinding parameter is adjusted, wafer to be ground is chosen, by wafer transfer to grinding station, inhaled
Disk adsorbs wafer, is ground wafer.
2：Cleaning wafer：By manipulator by wafer transfer to rinsing table, rinse crystal column surface to remove the mill of residual
Bits.
3：Wafer is fixed on fixture, with organic solvent secondary cleaning wafer, test position is determined, utilizes " Young " molten
Liquid corrodes to each test point, and each measuring point corrodes 8 times altogether, each etching time be respectively 2s, 3s, 4s, 5s, 10s,
15s, 25s, 40s, then clean corrosion sites with etch-stop process.
4：Wafer is fixed on the microscope carrier of white light interferometer, corrosion depth is tested；Corrosion region is tested using Raman spectrum
Residual stress, carries out Gauss curve fitting to Raman test result, finally calculates residual stress.
Invention is described in detail below in conjunction with the accompanying drawings：
Fig. 1 is that wafer is ground schematic diagram, adjusts grinding parameter (emery wheel feed rate 0.8 μm/s, grinding wheel speed 5000r/
Min, wafer rotating speed 200r/min), wafer 2 is transferred to grinding station by transmission manipulator, is adsorbed by sucker 3；Emery wheel 1 it is slow to
Under be manoeuvred into grinding position, emery wheel rotates around axis both clockwise, and wafer is ground thinned wafer around axis rotate counterclockwise.
The thickness of setting is ground to, stops grinding, wafer transfer to washing station is carried out cleaning wafer surface by manipulator.
Fig. 2 is wafer positioning corrosion schematic diagram, and wafer is positioned by neck 4 and alignment pin 6, acetone cleaning wafer is used, really
Determine test position；Utilize " Young " solution (H2O:HF49%:Cr2O3=500ml:500ml:75g) each test point is carried out rotten
Erosion, each measuring point corrodes 8 times altogether, and each etching time is respectively 2s, 3s, 4s, 5s, 10s, 15s, 25s, 40s, is then cleaned rotten
Position etch-stop process is lost, treats that wafer is spontaneously dried.
Fig. 3 is corrosion depth test schematic diagram, wafer is placed on the microscope carrier of white light interferometer, the object lens of white light interferometer
Corrosion area is directed at, adjustment instrument can obtain every time the 3D figures in corrosion post-etching area, then scheme 3D until there is interference fringe
The average height H of corrosion region in the range of sample length L (250 μm -500 μm) can be calculated by importing Vision softwaresc；Then, exist
The 3D that corrosion region edge obtains non-corrosion area schemes and imports Vision softwares calculating sample length L (250 μm -500 μm) model
The average height H of non-corrosion region, takes H-H in enclosingcDifference is corrosion depth.
Fig. 4 is residual stress distribution schematic diagram, and being directed at corrosion region central area using the object lens of Raman spectrum carries out Raman
Spot scan, obtains Raman curve, and the offset that Gauss curve fitting draws Raman main peak is carried out to Raman curve, and offset is multiplied by stress
Coefficient is stress value.
Stress distribution under different depth can be obtained by repeat step 2,3,4.
Fig. 5 is residual stress distribution schematic diagram in document, the sub-surface residual compressive stress value that microtomy is measured in document compared with
It is small, because slicing processes discharge part grinding residual stress.
Claims (3)
1. one kind grinding wafer sub-surface residual stress test method, it is characterised in that comprise the following steps：
The monocrystalline silicon wafer crystal after grinding is provided, clear water rinses crystal column surface, and fixed wafer is simultaneously cleaned with organic solvent；It is determined that test
Point, test point is located at<110>Crystal orientation, along radius distribution, at least three test point, the first test point away from wafer center of circle 10-15mm,
Second test point is away from the first test point 40-60mm, and the 3rd test point is away from the second test point 40-60mm；Utilize " Young " solution pair
Each test point is corroded, and each measuring point corrodes 8 times altogether, each etching time be respectively 2s, 3s, 4s, 5s, 10s, 15s,
25s, 40s, every time corrosion terminate to clean corrosion region with clear water with etch-stop；Treat that corrosion region is dried, it is dry first with white light
Interferometer measures corrosion depth, then utilizes raman spectroscopy measurement residual stress.
2. a kind of grinding wafer sub-surface residual stress test method as claimed in claim 1, it is characterised in that " poplar
The proportioning of family name " solution is H2O:HF49%:Cr2O3=500ml:500ml:75g.
3. a kind of grinding wafer sub-surface residual stress test method as claimed in claim 1, it is characterised in that surveyed to Raman
Try curve and carry out Gauss curve fitting.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112268507A (en) * | 2020-10-14 | 2021-01-26 | 江苏鑫汉电子材料有限公司 | Be applied to carborundum wafer's infrared detection device |
| CN112577647B (en) * | 2020-11-26 | 2022-04-12 | 苏州长光华芯光电技术股份有限公司 | Stress test system and test method for semiconductor laser chip |
| CN112556905B (en) * | 2021-02-23 | 2021-05-28 | 紫创(南京)科技有限公司 | Stress detection device and detection method based on optical interference |
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| JP2013032991A (en) * | 2011-08-02 | 2013-02-14 | Nippon Steel & Sumitomo Metal | Residual stress measuring method for metallic material |
| CN104034662A (en) * | 2014-06-13 | 2014-09-10 | 北京工业大学 | Accurate positioning tool (positioning instrument) for measuring residual stress of wafer by Raman spectroscopy |
| CN104034568A (en) * | 2014-06-13 | 2014-09-10 | 北京工业大学 | Preparation method of sample for detecting sub-surface damage depth of ultra-thin silicon wafer |
| CN104061853A (en) * | 2014-07-04 | 2014-09-24 | 西安工业大学 | Method for measuring sub-surface affected layer depth and morphology of optical material |
| CN104075830A (en) * | 2014-06-13 | 2014-10-01 | 北京工业大学 | Residual stress testing method for large-size ground wafer |
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2015
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| JP2013032991A (en) * | 2011-08-02 | 2013-02-14 | Nippon Steel & Sumitomo Metal | Residual stress measuring method for metallic material |
| CN102435361A (en) * | 2011-10-27 | 2012-05-02 | 扬州晶新微电子有限公司 | Test method of residual stress of silicon single crystal piece |
| CN104034662A (en) * | 2014-06-13 | 2014-09-10 | 北京工业大学 | Accurate positioning tool (positioning instrument) for measuring residual stress of wafer by Raman spectroscopy |
| CN104034568A (en) * | 2014-06-13 | 2014-09-10 | 北京工业大学 | Preparation method of sample for detecting sub-surface damage depth of ultra-thin silicon wafer |
| CN104075830A (en) * | 2014-06-13 | 2014-10-01 | 北京工业大学 | Residual stress testing method for large-size ground wafer |
| CN104061853A (en) * | 2014-07-04 | 2014-09-24 | 西安工业大学 | Method for measuring sub-surface affected layer depth and morphology of optical material |
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| 晶圆减薄及背面金属蒸镀制程的研究;刘东生;《中国优秀硕士学位论文全文数据库 信息科技辑》;20130515(第5期);第21-27页 * |
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