CN104977653B - A kind of processing method of the micro- coupling minute surface of PLC waveguide - Google Patents
A kind of processing method of the micro- coupling minute surface of PLC waveguide Download PDFInfo
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- CN104977653B CN104977653B CN201510340742.3A CN201510340742A CN104977653B CN 104977653 B CN104977653 B CN 104977653B CN 201510340742 A CN201510340742 A CN 201510340742A CN 104977653 B CN104977653 B CN 104977653B
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- metallic film
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
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- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Optical Integrated Circuits (AREA)
Abstract
A kind of processing method of the micro- coupling minute surface of PLC waveguide, layer of metal film is deposited on PLC wafers, pass through the groove cooperatively formed with inclined-plane and vertical side to photo-etching processes and correlation step, remove metallic film, deposition of reflective metal, ultimately form effective, it is possible to achieve large-scale production is to realize that slab guide and photodiode i.e. optical signal receive component integrating on chip, so as to reduce a kind of processing method of the micro- coupling minute surface of PLC waveguide of communication equipment manufacturing cost.
Description
Technical field
The present invention relates to optic communication material manufacture field, and in particular to a kind of slab guide receives component in core with optical signal
Integration processing method on piece.
Background technology
With the application of PLC planar waveguide chip devices from wide area network to intercity net and access network extension, it is more and more
Optical module need it is integrated to realize the high integration of application module and high-performance with PLC chip.Smaller closeer index will
Ask and may require that and realized in some modules, these modules such as TOSA (light launches die-filling piece of subgroup) and ROSA (light-receiving subgroup dresses
Module).Past in the application module of wide area network, laser, waveguide chip, optical receiver generally be separation assembly.Mesh
Under the preceding trend in the requirement of 100G data networks acts on, the transmitting receiving module inserted in the intercity network equipment is required to be made more
It is small.
The associated methods of PLC chip and optical receiver are the collection of assembling based on discrete device rather than chip-scale at present
Into.Application of the application particularly on 100G networks in some forward positions, optical system, which will face, to be reduced energy consumption and reduces volume
Pressure；And the combined volume of separation assembly is difficult to meet requirement of the communication equipment supplier on device volume greatly, at the same it is this
Method manufacturing cost is also very high.
Another alternative is before PLC slab guide substrate depositions, processes one with etch on a silicon substrate
Slope.But this method is to obtain one tiltedly using the interfacial angle of silicon materials and the asymmetric etching characteristic in KOH solution
Face angle degree is 57.4 degree.But this angle in SiO2 when deposit thickness reaches more than 40 microns on this slope, be difficult to
Maintain, particularly after reflow treatment.The final angle on this method slope is not guaranteed, without repeatability.
Still an alternative is that cut out a slope with the blade of slicer after PLC waveguide machines.But have two
Individual problem：1, cutting technique typically results in rough surface, may light outflow come the side may also need to polishing (but polish
Technique is difficult to carry out).2, if wafer has hundreds of chips, the method that slope is processed with cutter is also very time-consuming.
The content of the invention
It is an object of the invention to provide a kind of effective, it is possible to achieve large-scale production to realize slab guide with it is photosensitive
Diode is that optical signal receives component integrating on chip, micro- so as to reduce a kind of PLC waveguide of communication equipment manufacturing cost
The processing method for coupling minute surface.
Technical scheme includes following preparation process：
1) raw material are the PLC wafers that substrate layer, waveguide core layer and coating are deposited in substrate, in described PLC
Wafer
Coating above deposit layer of metal film；
2) photoresist is coated on metallic film, pattern exposure, development removal part photoresist are carried out to photoresist, is passed through
Etch the partial corrosion for not being covered by photoresist metallic film and fall to be formed figure groove, then remove remaining photoresist；
3) with through 1), 2) one layer of photoresist layer of coating on the PLC wafers after step processing, pattern exposure is carried out to photoresist
Development, after removing part photoresist, the side that forms groove be by the photoresist including the metal film cladding of the side, it is recessed
The relative another side of groove is then metallic film, and the metallic film upper surface being connected with the side, which also retains, not to be photo-etched glue and cover
Lid；
4) wafer after the processing of preceding 3 step is subjected to high temperature reflux so that the side marginal ray photoresist of groove is under high temperature action
A photoresist slope is formed, while ensures that the relative another side of groove is still metallic film, the metal being connected with the side
Film still leaves end face and is not covered by photoresist；The temperature of described high temperature reflux is 110~150 DEG C；
5) by through above-mentioned 4 step processing after wafer carry out dry etching, etching be from coating to waveguide core layer, it is etched
In journey while photoresist is consumed, because in the presence of the photoresist slope of groove side, coating and waveguide core layer are also carved
A slope is lost into, and in the presence of the metallic film of relative opposite side, its side is etched into a vertical plane；
6) metallic film is removed；
7) by the PLC wafers after the processing of 6) step by photoetching process by the photoresist of designed pattern transfer,
By etching, finally retaining deposition on the slope has reflecting effect metallic film.
The processing of described 7) step can use following a or b two ways：
A, first one layer of deposition has reflecting effect metallic film on the PLC wafers after the processing of 6) step；Then in gold
Photoresist is applied on category film, exposing patterns development removes part photoresist, allows the photoresist of retention to cover on the slope, removes
The metal level that remainder is not covered by photoresist；Finally remove the photoresist of retention so that retaining deposition on slope has instead
Penetrate effect metal film.
Described is thick with the preferred 1-2 microns of reflecting effect metallic film using in a mode processing procedures, depositing one layer.
The deposit thickness of photoresist is 6-8 microns.
B, before deposition being stated on treated PLC wafers through 6) step there is reflecting effect metallic film, first cover with photoresist
The described wafer of lid, photoetching offset plate figure is fabricated to, the photoresist on inclined-plane is removed after exposing patterns development, then deposition has anti-
Penetrate effect metal film use and can dissolve the solution of photoresist and soak the wafer, because the dissolving of photoresist causes above photoresist
Metal be removed, the metallic film not being deposited on photoresist ramp then is retained.
The metal that b this way can not be etched typically to processing.
Thickness of metal film in described step 1) is 1-2 microns.
The present invention described integrated micro-reflector manufacturing theory be light inlet side waveguide process one hang down
Face directly, and one 45 degree of coupled mirrors are processed in opposite side, so incident light can be reflected away vertically.
The gradient processed in the present invention can be by photoresist with two by the ramp angles of the photoresist in 4) step
The selection ratio of oxidation Gui etching is regulated and controled together.
Inventor, which is found through experiments that when the thickness of photoresist in the step 3) of the present invention is 8-10 microns, to be advantageous to subsequently
The etching depth of dry etch process 18-22 microns and the formation on slope.
7) in the step, the metal can be the good and not oxidizable metal of the reflecting effects such as gold.
It can conveniently be manufactured by the technique of the present invention and control realizes large-scale production to realize slab guide
It is that optical signal receives component integrating on chip with photodiode, in the case of having hundreds of chips for wafer,
Design effectively is only needed to go out the desired position of coupled mirrors, it is possible to prepare well, implementing process is easily achieved industrialization
Control, so as to reduce communication equipment manufacturing cost.
Brief description of the drawings
Fig. 1 is the layer of structure figure of the resulting materials of step 1) of the present invention；
Fig. 2 is the layer of structure figure of the resulting materials of step 2) of the present invention；
Fig. 3 is the layer of structure figure of the resulting materials of step 3) of the present invention；
Fig. 4 is the layer of structure figure of the resulting materials of step 4) of the present invention；
Fig. 5 is the layer of structure figure of the resulting materials of step 5) of the present invention；
Fig. 6 is the layer of structure figure of the resulting materials of step 6) of the present invention；
Fig. 7 is the layer of structure figure of the resulting materials of step 7) of the present invention.
1- substrate layer 2- waveguide core layer 3- coating 4- metallic films A
5- photoresist 6- metallic film B 7- inclined-planes 8- grooves
Embodiment
Following examples are intended to illustrate invention rather than limitation of the invention further.
Embodiment 1
1. raw material are the PLC wafer PLC wafers that substrate layer, waveguide core layer and coating are deposited in substrate.
2. layer of metal film A is deposited on PLC wafers using PVD (physical vapour deposition (PVD)).Thickness about 1-2 microns.
The good metal of etching selection ratio (the selection ratio i.e. to silica), such as titanium, aluminium can be selected in this step.
3. a layer pattern is generated on metallic film A using photo-etching processes (light blockage coating, exposure, development etc.).That is, exist
Photoresist is coated on metallic film A, the figure on mask is transferred to the exposed and developed removal portions of on photoresist through photoengraving
Photoresist is divided, substantially figure just comes out.
4. using wet etching or RIE (reactive ion etching) etching metallic film A, by the pattern transfer of photoresist to gold
Belong on film A, remove photoresist figure layer.That is, etch is etched etc. by metal by wet etching or RIE (reactive ion etching)
The partial corrosion that film A is not covered by photoresist falls to be formed figure groove, then removes remaining photoresist.
5. generate photoetching offset plate figure on metallic film A using photo-etching processes (light blockage coating, exposure, development etc.).That is,
The photoresist layer of one layer of coating, pattern exposure development is carried out to photoresist, after removing part photoresist so that a side of groove
For photoresist, the relative another side of groove is then metallic film A, the metallic film A upper surfaces palpus being connected with the relative side
Reservation is not covered by photoresists；
6. by 110-150C high-temperature process, using Photoresist reflow, it is oblique that a photoresist is formed in metal groove
Face, so as to form a special mask.
7. the PLC wafers treated with ICP (the enhanced etching system of inductive couple plasma) etchings through above-mentioned steps,
During the dry etching, equally photoresist can also be performed etching；And coating and waveguide core layer can be also etched, while by
Effect in photoresist inclined-plane, metal groove can be etched to form an inclined-plane；And the relative opposite side in metal groove inclined-plane by
In metallic film A protective effect, a vertical plane is etched to.
8. remove photoresist and metallic film A.
9. a floor height reflectivity and easily etching metallic film B are deposited on PLC wafers with PVD (physical vapour deposition (PVD)),
Such as gold.
10. a layer pattern is generated on metal film using photoetching process (light blockage coating, exposure, development etc.)；That is, in metal
Photoresists are coated on film B, pattern covers on a photoresist, after exposure, development, remove the portion after development as needed for generating mask
It is divided photoresist.
11. KI (KI) solution is applied, the metallic film B not being covered by photoresist by wet etching, so as to oblique
Face overlying cap-shaped is into a metallic film B.
12. remove photoresist.
Embodiment 2
The subsequent process steps 9 that step 1-8 is with embodiment 1, difference) start to last, sunk using on wafer
Product is first covered on the wafer through aforementioned processing with photoresist before having reflecting effect metallic film, is fabricated to photoetching offset plate figure；
The photoresist on inclined-plane is removed after exposing patterns development, then deposition has high reflectance and easily etching metallic film B, wherein tiltedly
Directly there is the upper metallic film of deposition on face, use can dissolve solution (such as acetone) the immersion wafer of photoresist so that photoresist
Metallic film above just falls down；The metallic film B of inclined-plane Direct precipitation is retained.(this way typically to processing not
The metal that can be etched).
Claims (3)
1. a kind of processing method of the micro- coupling minute surface of PLC waveguide, including following preparation process：
1) raw material are the PLC wafers that substrate layer, waveguide core layer and coating are deposited in substrate, in described PLC wafers
Coating above deposit layer of metal film；
2) photoresist is coated on metallic film, pattern exposure, development removal part photoresist are carried out to photoresist, passes through etching
The partial corrosion that metallic film is not covered by photoresist falls to be formed figure groove, then removes remaining photoresist；
3) with through 1), 2) one layer of photoresist layer of coating on the PLC wafers after step processing, pattern exposure is carried out to photoresist and shown
Shadow, after removing part photoresist, the side for forming groove is by the photoresist including the metal film cladding of the side, groove
Relative another side is then metallic film, and the metallic film upper surface being connected with the side, which also retains, not to be covered by photoresist；
4) wafer after the processing of preceding 3 step is subjected to high temperature reflux so that the side marginal ray photoresist of groove is formed under high temperature action
One photoresist slope, while ensure that the relative another side of groove is still metallic film, the metallic film being connected with the side
End face is still left not to be covered by photoresist；The temperature of described high temperature reflux is 110~150 DEG C；
5) wafer after the processing of above-mentioned 4 step is subjected to dry etching, etching is from coating to waveguide core layer, in etching process
While photoresist is consumed, because in the presence of the photoresist slope of groove side, coating and waveguide core layer are also etched into
One slope, and in the presence of the metallic film of relative opposite side, its side is etched into a vertical plane；
6) metallic film is removed；
7) first one layer of deposition has reflecting effect metallic film on the PLC wafers after the processing of 6) step；Then in metal foil
Photoresist is applied on film, exposing patterns development removes part photoresist, allows the photoresist of retention to cover on the slope, removes remaining
The metal level that part is not covered by photoresist；Finally remove the photoresist of retention so that retaining deposition on slope has reflection effect
Fruit metallic film.
2. preparation method according to claim 1, it is characterised in that the processing of described 7) step is in the following ways：
Before deposition has reflecting effect metallic film on the PLC wafers treated through 6) step, it is brilliant that described PLC is first covered with photoresist
Circle, photoetching offset plate figure is fabricated to, the photoresist on inclined-plane is removed after exposing patterns development, then deposition has reflecting effect metal
The solution that film use can dissolve photoresist soaks the wafer, because photoresist dissolving cause photoresist above metal by except
Fall, the metallic film not being deposited on photoresist ramp then is retained.
3. preparation method according to claim 1, it is characterised in that the metal foil thickness in described step 1) is 1-2
Micron.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510340742.3A CN104977653B (en) | 2015-06-18 | 2015-06-18 | A kind of processing method of the micro- coupling minute surface of PLC waveguide |
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|---|---|---|---|
| CN201510340742.3A CN104977653B (en) | 2015-06-18 | 2015-06-18 | A kind of processing method of the micro- coupling minute surface of PLC waveguide |
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| Publication Number | Publication Date |
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| CN104977653A CN104977653A (en) | 2015-10-14 |
| CN104977653B true CN104977653B (en) | 2018-03-23 |
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| CN201510340742.3A Expired - Fee Related CN104977653B (en) | 2015-06-18 | 2015-06-18 | A kind of processing method of the micro- coupling minute surface of PLC waveguide |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111239897B (en) * | 2020-01-17 | 2022-02-11 | 上海新微技术研发中心有限公司 | Method for manufacturing optical waveguide microfluid chip |
| CN112787211A (en) * | 2021-01-22 | 2021-05-11 | 珠海奇芯光电科技有限公司 | TO packaging structure and optical assembly of integrated PLC chip |
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| CN1467517A (en) * | 2002-06-07 | 2004-01-14 | ��ʿ��Ƭ��ʽ���� | Fabrication method of optical wiring circuit and optical wiring baseboard having the same optical wiring circuit |
| CN101122655A (en) * | 2007-09-25 | 2008-02-13 | 晶方半导体科技（苏州）有限公司 | Optical waveguide and its manufacture method thereof |
| CN102565941A (en) * | 2010-12-22 | 2012-07-11 | 日东电工株式会社 | Method of manufacturing optical waveguide |
| CN104793288A (en) * | 2015-04-30 | 2015-07-22 | 上海美维科技有限公司 | Manufacturing method of printed circuit boards with optical waveguide couplers |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003240997A (en) * | 2002-02-21 | 2003-08-27 | Fujitsu Ltd | Manufacturing method for optical integrated circuit having spatial reflection type structure |
| DK2798389T3 (en) * | 2011-12-27 | 2017-09-11 | Neophotonics Corp | CLUTCH SYSTEM FOR INTEGRATED CIRCUIT WITH WAVE CONTROLLER AND METHOD OF PRODUCING THEREOF |
| JP5750732B2 (en) * | 2013-01-17 | 2015-07-22 | 国立研究開発法人産業技術総合研究所 | Silicon sharp structure and manufacturing method thereof, spot size converter, non-reflective termination |
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2015
- 2015-06-18 CN CN201510340742.3A patent/CN104977653B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1467517A (en) * | 2002-06-07 | 2004-01-14 | ��ʿ��Ƭ��ʽ���� | Fabrication method of optical wiring circuit and optical wiring baseboard having the same optical wiring circuit |
| CN101122655A (en) * | 2007-09-25 | 2008-02-13 | 晶方半导体科技（苏州）有限公司 | Optical waveguide and its manufacture method thereof |
| CN102565941A (en) * | 2010-12-22 | 2012-07-11 | 日东电工株式会社 | Method of manufacturing optical waveguide |
| CN104793288A (en) * | 2015-04-30 | 2015-07-22 | 上海美维科技有限公司 | Manufacturing method of printed circuit boards with optical waveguide couplers |
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