CN104977653A - PLC waveguide micro-coupling mirror machining method - Google Patents
PLC waveguide micro-coupling mirror machining method Download PDFInfo
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- CN104977653A CN104977653A CN201510340742.3A CN201510340742A CN104977653A CN 104977653 A CN104977653 A CN 104977653A CN 201510340742 A CN201510340742 A CN 201510340742A CN 104977653 A CN104977653 A CN 104977653A
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
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Abstract
A PLC waveguide micro-coupling mirror machining method comprises the steps of depositing a metal film on a PLC wafer, forming a groove with a slope and a vertical side through cooperation of a photo-etching process and related steps, removing the metal film, depositing reflective metal, and finally, forming an effective reflective metal film. By adopting the PLC waveguide micro-coupling mirror machining method, scale production can be realized, a planar waveguide and a photosensitive diode (namely, a light signal receiving component) can be integrated on a chip, and the manufacturing cost of communication equipment can be reduced.
Description
Technical field
The present invention relates to optical communication material and manufacture field, be specifically related to a kind of slab guide and light signal accepts the integration processing method of assembly on chip.
Background technology
Along with the application of PLC planar waveguide chip device is from wide area network to the expansion of intercity net and Access Network, increasing optical module needs with PLC chip integrated with the high integration realizing application module and high-performance.Less closeer index request can require to realize in some modules, and these modules are as TOSA (light launches sub-Knockdown block) and ROSA (the sub-Knockdown block of light-receiving).Past in the application module of wide area network, laser instrument, waveguide chip, optical receiver usually be separation assembly.At present under the trend effect of 100G data network requirement, the transmitting of inserting in the intercity network equipment accepts module and is required to do less.
The associated methods of current PLC chip and optical receiver is based on the assembling of discrete device instead of the integrated of chip-scale.The application of application in some forward positions particularly on 100G network, optical system will face the pressure reducing energy consumption and reduce volume; And the combined volume of separation assembly is difficult to greatly meet the requirement of communication facilities supplier on device volume, this method manufacturing cost is also very high simultaneously.
Another kind of alternative method is before PLC slab guide substrate deposition, processes a slope on a silicon substrate by etch.But this method is that to utilize the interfacial angle of silicon materials and the asymmetric corrosive property in KOH solution and obtain a bevel angle be 57.4 degree.But this angle is when on this slope, deposit thickness reaches more than 40 microns SiO2, be just difficult to maintain, particularly after reflow treatment.The final angle on this method slope does not have guaranteed, do not have repeatability.
A kind of method is also had to be cut out a slope with the blade of microtome after PLC waveguide machines.But have two problems: 1, cutting technique causes rough surface usually, may spread out of at light the side come also may need polishing (but glossing is difficult to implement).2, if a wafer has a hundreds of chip, also very time-consuming by the method on cutter processing slope.
Summary of the invention
The object of the present invention is to provide a kind of effective, large-scale production can be realized and accept integrated on chip of assembly in order to realize slab guide and photodiode and light signal, thus reduce the job operation of the micro-coupling minute surface of a kind of PLC waveguide of communication equipment manufacturing cost.
Technical scheme of the present invention comprises following preparation process:
1) starting material for deposited substrate layer in substrate, and waveguide core layer and tectal PLC wafer, at described PLC wafer
Overlayer above deposit layer of metal film;
2) on metallic film, apply photoresist, pattern exposure is carried out to photoresist, development removal unit divides photoresist, by etching, the partial corrosion that metallic film is not covered by photoresist is fallen formation figure connected in star, then remove remaining photoresist;
3) with through 1), 2) PLC wafer after step process applies the photoresist layer of one deck, pattern exposure development is carried out to photoresist, after removal unit divides photoresist, the side forming groove is at interior photoresist by the metal film cladding of this side, another side that groove is relative is then metallic film, and the metallic film upper surface be connected with this side also retains not covered by photoresist;
4) wafer after front 3 step process is carried out high temperature reflux, limit, the side photoresist of groove is made to form a photoresist slope under high temperature action, guarantee that another side that groove is relative is still metallic film, it is not covered by photoresist that the metallic film be connected with this side still leaves end face simultaneously; The temperature of described high temperature reflux is 110 ~ 150 DEG C;
5) wafer after above-mentioned 4 step process is carried out dry etching, etching is from overlayer to waveguide core layer, in etching process while consumption photoresist, due under the effect on photoresist slope, groove side, overlayer and waveguide core layer are also etched into a slope, and under the effect of the metallic film of relative opposite side, its side is etched into a vertical plane;
6) metallic film is removed;
7) by through 6) PLC wafer after step process by the photoresist of Graphic transitions that designs by photoetching process, by etching, finally retains deposition on the slope and has reflecting effect metallic film.
Described 7) process of step can adopt following a or b two kinds of modes:
A, first through 6) PLC wafer after step process deposits one deck there is reflecting effect metallic film; Then on metallic film, apply photoresist, exposing patterns development removal unit divides photoresist, allows the photoresist retained cover on the slope, removes the metal level that remainder is not covered by photoresist; Finally remove the photoresist of retention, make slope to retain deposition and there is reflecting effect metallic film.
In described employing a mode processing procedure, deposition one deck has the preferred 1-2 micron thickness of reflecting effect metallic film.The deposit thickness of photoresist is 6-8 micron.
B, through 6) step states before on the PLC wafer that processed, deposition has reflecting effect metallic film, first cover described wafer with photoresist, be made into photoetching offset plate figure, the photoresist on inclined-plane is removed after exposing patterns development, then deposition has reflecting effect metallic film. soak this wafer with the solution that can dissolve photoresist, dissolving because of photoresist makes the metal above photoresist be removed, and the metallic film be not deposited on photoresist ramp is then retained.
This way of b is normally in order to process the metal that can not be etched.
Described step 1) in thickness of metal film be 1-2 micron.
The present invention the manufacturing theory of integrated micro-reflector that describes be process a vertical plane in the waveguide of light inlet side, and process the coupled mirrors of 45 degree at opposite side, light incident so just can be gone out by vertical reflection.
The gradient of processing in the present invention can by 4) ramp angles of photoresist in step can be regulated and controled together by the Selection radio of photoresist with titanium dioxide Gui etching.
Inventor found through experiments step 3 of the present invention) in the thickness of photoresist be conducive to when being 8-10 micron follow-up dry etch process 18-22 micron etching depth and the formation on slope.
Described 7), in step, described metal can be the golden metal waiting reflecting effect good and not oxidizable.
Conveniently can be manufactured by technique of the present invention and accept integrated on chip of assembly with control realization large-scale production in order to realize slab guide and photodiode and light signal, when having a hundreds of chip for a wafer, design effectively is only needed to go out the desired position of coupled mirrors, just can well prepare, implementing process is easy to realize industrialized control, thus reduces communication equipment manufacturing cost.
Accompanying drawing explanation
Fig. 1 is step 1 of the present invention) the layer of structure figure of resulting materials;
Fig. 2 is for for step 2 of the present invention) the layer of structure figure of resulting materials;
Fig. 3 is for for step 3 of the present invention) the layer of structure figure of resulting materials;
Fig. 4 is for for step 4 of the present invention) the layer of structure figure of resulting materials;
Fig. 5 is for for step 5 of the present invention) the layer of structure figure of resulting materials;
Fig. 6 is for for step 6 of the present invention) the layer of structure figure of resulting materials;
Fig. 7 is for for step 7 of the present invention) the layer of structure figure of resulting materials.
1-substrate layer 2-waveguide core layer 3-overlayer 4-metallic film A
5-photoresist 6-metallic film B 7-inclined-plane 8-groove
Embodiment
Following examples are intended to the present invention instead of limitation of the invention further are described.
Embodiment 1
1. starting material for deposited substrate layer in substrate, waveguide core layer and tectal PLC wafer PLC wafer.
2. adopt PVD (physical vapour deposition (PVD)) on PLC wafer, deposit layer of metal film A.The about 1-2 micron of thickness.The metal that etching selection ratio (namely to the Selection radio of silicon dioxide) is good can be selected, as titanium, aluminium etc. in this step.
3. adopt photo-etching processes (light blockage coating, exposure, development etc.) to generate a layer pattern on metallic film A.That is, metallic film A applying photoresist, the figure on mask is transferred on photoresist through photoengraving. exposure and development removal unit divide photoresist, and figure is just out substantially.
4. adopt wet etching or RIE (reactive ion etching) to etch metallic film A, by the Graphic transitions of photoresist on metallic film A, remove photoresist layer.That is, by etch such as wet etching or RIE (reactive ion etching) etchings, the partial corrosion that metallic film A is not covered by photoresist is fallen formation figure connected in star, then remove remaining photoresist.
5. adopt photo-etching processes (light blockage coating, exposure, development etc.) to generate photoetching offset plate figure on metallic film A.That is, apply the photoresist layer of one deck, pattern exposure development is carried out to photoresist, after removal unit divides photoresist, make a side of groove be photoresist, another side that groove is relative is then metallic film A, and the metallic film A upper surface that is connected with this relative side must retain and do not covered by photoresists;
6. by the pyroprocessing of 110-150C, use Photoresist reflow, in metal groove, form a photoresist inclined-plane, thus form a special mask.
7. use ICP (inductive couple plasma enhancement mode etching system) etching through the PLC wafer of above-mentioned steps process, in the process of this dry etching, equally also can etch photoresist; And also can etch overlayer and waveguide core layer, simultaneously due to the effect on photoresist inclined-plane, metal groove can be etched formation inclined-plane; And the relative opposite side in metal groove inclined-plane is due to the protective effect of metallic film A, is etched to a vertical plane.
8. remove photoresist and metallic film A.
9. use PVD (physical vapour deposition (PVD)) on PLC wafer, deposit one deck high reflectance and easily etch metallic film B, as gold.
10. adopt photoetching process (light blockage coating, exposure, development etc.) on metal film, generate a layer pattern; That is, metallic film B applies photoresists, generate required pattern covers on a photoresist by mask, after exposure, development, remove the part photoresist after development.
11. application KI (potassium iodide) solution, by the metallic film B that wet etching is not covered by photoresist, thus cover formation metallic film B on inclined-plane.
12. remove photoresist.
Embodiment 2
Step 1-8 with embodiment 1, the subsequent process steps 9 that difference is) start to last, employing be first cover with photoresist on the wafer of aforementioned processing before on wafer, deposition has reflecting effect metallic film, be made into photoetching offset plate figure; The photoresist on inclined-plane is removed after exposing patterns development, then deposition has high reflectance and easily etches metallic film B, wherein inclined-plane directly there is the upper metallic film of deposition, soak wafer with the solution (as acetone etc.) that can dissolve photoresist, the metallic film above photoresist is just fallen down; The metallic film B of inclined-plane Direct precipitation retains.(this way is normally in order to process the metal that can not be etched).
Claims (4)
1. a job operation for the micro-coupling minute surface of PLC waveguide, comprises following preparation process:
1) starting material for deposited substrate layer in substrate, and waveguide core layer and tectal PLC wafer, deposit layer of metal film on the overlayer of described PLC wafer;
2) on metallic film, apply photoresist, pattern exposure is carried out to photoresist, development removal unit divides photoresist, by etching, the partial corrosion that metallic film is not covered by photoresist is fallen formation figure connected in star, then remove remaining photoresist;
3) with through 1), 2) PLC wafer after step process applies the photoresist layer of one deck, pattern exposure development is carried out to photoresist, after removal unit divides photoresist, the side forming groove is at interior photoresist by the metal film cladding of this side, another side that groove is relative is then metallic film, and the metallic film upper surface be connected with this side also retains not covered by photoresist;
4) wafer after front 3 step process is carried out high temperature reflux, limit, the side photoresist of groove is made to form a photoresist slope under high temperature action, guarantee that another side that groove is relative is still metallic film, it is not covered by photoresist that the metallic film be connected with this side still leaves end face simultaneously; The temperature of described high temperature reflux is 110 ~ 150 DEG C;
5) wafer after above-mentioned 4 step process is carried out dry etching, etching is from overlayer to waveguide core layer, in etching process while consumption photoresist, due under the effect on photoresist slope, groove side, overlayer and waveguide core layer are also etched into a slope, and under the effect of the metallic film of relative opposite side, its side is etched into a vertical plane;
6) metallic film is removed;
7) by through 6) PLC wafer after step process by the photoresist of Graphic transitions that designs by photoetching, by etching, finally retains deposition on the slope and has reflecting effect metallic film.
2. preparation method according to claim 1, is characterized in that, described 7) process of step is in the following ways:
First through 6) PLC wafer after step process deposits one deck there is reflecting effect metallic film; Then on metallic film, apply photoresist, exposing patterns development removal unit divides photoresist, allows the photoresist retained cover on the slope, removes the metal level that remainder is not covered by photoresist; Finally remove the photoresist of retention, make slope to retain deposition and there is reflecting effect metallic film.
3. preparation method according to claim 1, it is characterized in that, described 7) process of step is in the following ways: through 6) before deposition has reflecting effect metallic film on the PLC wafer of step process, first cover described PLC wafer with photoresist, be made into photoetching offset plate figure, the photoresist on inclined-plane is removed after exposing patterns development, then deposition has reflecting effect metallic film. soak this wafer with the solution that can dissolve photoresist, dissolving because of photoresist makes the metal above photoresist be removed, the metallic film be not deposited on photoresist ramp is then retained.
4. preparation method according to claim 1, is characterized in that, described step 1) in metal foil thickness be 1-2 micron.
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| CN201510340742.3A CN104977653B (en) | 2015-06-18 | 2015-06-18 | A kind of processing method of the micro- coupling minute surface of PLC waveguide |
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| CN201510340742.3A CN104977653B (en) | 2015-06-18 | 2015-06-18 | A kind of processing method of the micro- coupling minute surface of PLC waveguide |
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| CN104977653B CN104977653B (en) | 2018-03-23 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111239897A (en) * | 2020-01-17 | 2020-06-05 | 上海新微技术研发中心有限公司 | Method for manufacturing optical waveguide microfluid chip |
| CN112787211A (en) * | 2021-01-22 | 2021-05-11 | 珠海奇芯光电科技有限公司 | TO packaging structure and optical assembly of integrated PLC chip |
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| US20030155327A1 (en) * | 2002-02-21 | 2003-08-21 | Fujitsu Limited | Manufacturing method for optical integrated circuit having spatial reflection type structure |
| CN1467517A (en) * | 2002-06-07 | 2004-01-14 | ��ʿ��Ƭ��ʽ���� | Fabrication method of optical wiring circuit and optical wiring baseboard having the same optical wiring circuit |
| CN101122655A (en) * | 2007-09-25 | 2008-02-13 | 晶方半导体科技（苏州）有限公司 | Optical waveguide and its manufacture method thereof |
| CN102565941A (en) * | 2010-12-22 | 2012-07-11 | 日东电工株式会社 | Method of manufacturing optical waveguide |
| US20130163918A1 (en) * | 2011-12-27 | 2013-06-27 | Neophotonics Corporation | Integrated circuit coupling system with waveguide circuitry and method of manufacture thereof |
| US20140199018A1 (en) * | 2013-01-17 | 2014-07-17 | National Institute Of Advanced Industrial Science And Technology | Semiconductor pointed structure and method for fabricating same, spot size converter, and non-reflective terminator |
| CN104793288A (en) * | 2015-04-30 | 2015-07-22 | 上海美维科技有限公司 | Manufacturing method of printed circuit boards with optical waveguide couplers |
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2015
- 2015-06-18 CN CN201510340742.3A patent/CN104977653B/en not_active Expired - Fee Related
Patent Citations (7)
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| US20030155327A1 (en) * | 2002-02-21 | 2003-08-21 | Fujitsu Limited | Manufacturing method for optical integrated circuit having spatial reflection type structure |
| CN1467517A (en) * | 2002-06-07 | 2004-01-14 | ��ʿ��Ƭ��ʽ���� | Fabrication method of optical wiring circuit and optical wiring baseboard having the same optical wiring circuit |
| CN101122655A (en) * | 2007-09-25 | 2008-02-13 | 晶方半导体科技（苏州）有限公司 | Optical waveguide and its manufacture method thereof |
| CN102565941A (en) * | 2010-12-22 | 2012-07-11 | 日东电工株式会社 | Method of manufacturing optical waveguide |
| US20130163918A1 (en) * | 2011-12-27 | 2013-06-27 | Neophotonics Corporation | Integrated circuit coupling system with waveguide circuitry and method of manufacture thereof |
| US20140199018A1 (en) * | 2013-01-17 | 2014-07-17 | National Institute Of Advanced Industrial Science And Technology | Semiconductor pointed structure and method for fabricating same, spot size converter, and non-reflective terminator |
| CN104793288A (en) * | 2015-04-30 | 2015-07-22 | 上海美维科技有限公司 | Manufacturing method of printed circuit boards with optical waveguide couplers |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111239897A (en) * | 2020-01-17 | 2020-06-05 | 上海新微技术研发中心有限公司 | Method for manufacturing optical waveguide microfluid chip |
| CN112787211A (en) * | 2021-01-22 | 2021-05-11 | 珠海奇芯光电科技有限公司 | TO packaging structure and optical assembly of integrated PLC chip |
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| CN104977653B (en) | 2018-03-23 |
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