JP2902640B2 - Manufacturing method of planar optical waveguide - Google Patents
Manufacturing method of planar optical waveguideInfo
- Publication number
- JP2902640B2 JP2902640B2 JP10193029A JP19302998A JP2902640B2 JP 2902640 B2 JP2902640 B2 JP 2902640B2 JP 10193029 A JP10193029 A JP 10193029A JP 19302998 A JP19302998 A JP 19302998A JP 2902640 B2 JP2902640 B2 JP 2902640B2
- Authority
- JP
- Japan
- Prior art keywords
- vapor deposition
- chemical vapor
- polishing
- optical waveguide
- core layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/56—After-treatment
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
- C23C16/402—Silicon dioxide
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/453—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating passing the reaction gases through burners or torches, e.g. atmospheric pressure CVD
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/10—Wire waveguides, i.e. with a single solid longitudinal conductor
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Plasma & Fusion (AREA)
- Optical Integrated Circuits (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は均一な平面光導波路
の製造方法に関する。特に、堆積後に研磨を行う平面光
導波路の製造方法に関する。[0001] The present invention relates to a method of manufacturing a uniform planar optical waveguide. In particular, the present invention relates to a method for manufacturing a planar optical waveguide in which polishing is performed after deposition.
【０００２】[0002]
【従来の技術】平面光波回路は、光通信用素子を製造す
るマイクロ・オプティクス方法の短所を補完し、大量生
産するために開発された。図３は従来の平面光導波路の
製造過程を大きく区分して示すことであって、図３Ａは
基板１００上に下位被覆層１０２及びコア層１０４の堆
積段階を示す。図３Ｂは図３Ａのコア層をパターニング
して導波路１０６を形成するパターンニング工程段階を
示し、図３Ｃは図３Ｂで形成された導波路上に上位被覆
層１０８の堆積段階を示す。2. Description of the Related Art Planar lightwave circuits have been developed to supplement the shortcomings of the micro-optics method of fabricating optical communication devices and for mass production. FIG. 3 is a sectional view schematically illustrating a conventional manufacturing process of a planar optical waveguide, and FIG. 3A illustrates a step of depositing a lower coating layer 102 and a core layer 104 on a substrate 100. FIG. 3B illustrates a patterning process step of patterning the core layer of FIG. 3A to form the waveguide 106, and FIG. 3C illustrates a deposition step of the upper cover layer 108 on the waveguide formed in FIG. 3B.
【０００３】図４は図３の製造方法を細分化したフロー
チャートである。まず、膜堆積工程により下位被覆及び
コア層が堆積される（１１２段階）。膜堆積はポリマー
のような有機物質はスピンコーティング、無機物質は化
学気相堆積法（ＣＶＤ）、変形したＣＶＤ、火炎加水堆
積法（ＦＨＤ）の方法でなされる。この際、膜堆積方法
と条件によって少し差はあるが、厚さの不均一が存在す
る。スピンコーティングは有機物質を合成した後、所定
の溶媒を利用してその濃度及び粘度を調節した後、スピ
ンコータ上に噴射させた後、高速で回転させて数ミクロ
ンの有機膜を形成する方法である。ＣＶＤ方法は堆積し
ようとする膜の原料になる物質のガスを注入させて反応
炉でエネルギーを加えて基板に膜を形成する方法であ
る。変形されたＣＶＤには低圧ＣＶＤ、ＡＰＣＶＤ、Ｐ
ＥＣＶＤの方法がある。ＦＨＤは水素と酸素炎を利用し
て反応ガスを合成して小さな粒子を作った後、基板上に
堆積させる方法である。各々の膜堆積工程時基板として
は主にシリコン基板が使われ、以外にも石英、酸化アル
ミニウム、ガリウム砒素、インジウムリン化物及びＩＩ
Ｉ−Ｖ族化合物半導体基板が使われる。FIG. 4 is a flow chart obtained by subdividing the manufacturing method of FIG. First, a lower coating and a core layer are deposited by a film deposition process (step 112). Film deposition is performed by spin coating organic materials such as polymers, and by chemical vapor deposition (CVD), modified CVD, and flame hydration (FHD) methods for inorganic materials. At this time, although there is a slight difference depending on the film deposition method and conditions, there is unevenness in the thickness. Spin coating is a method of synthesizing an organic material, adjusting the concentration and viscosity of the organic material using a predetermined solvent, spraying the material on a spin coater, and rotating the material at a high speed to form an organic film of several microns. . The CVD method is a method in which a gas of a substance serving as a raw material of a film to be deposited is injected and energy is applied in a reaction furnace to form a film on a substrate. Low pressure CVD, APCVD, P
There is an ECVD method. FHD is a method of synthesizing a reaction gas using hydrogen and an oxygen flame to form small particles, and then depositing them on a substrate. In each film deposition process, a silicon substrate is mainly used as a substrate, and besides quartz, aluminum oxide, gallium arsenide, indium phosphide and II
An IV compound semiconductor substrate is used.
【０００４】パターン製造は清浄室内で行われる。膜の
堆積されたウェーハは洗浄及び乾燥過程を経てフォトレ
ジスト（ＰＲ）スピンコーティングが行われる（１１６
段階）。この際、前述した１１２段階と１１６段階との
間に食刻条件によって金属マスクが堆積される場合もあ
る（１１４段階）。ＰＲスピンコーティングした後、Ｐ
Ｒパターンが固くなるようにベーキングされ（１１８段
階）、マスクアライメント器を利用して設計パターンが
ウェーハ上に転写された後、紫外線が照射される（１２
０段階）。紫外線照射によりパターンが形成されると現
像液を使用して反応しないＰＲを剥がし（１２２段
階）、露出されたコア層を乾式食刻する（１２４段
階）。食刻方法は誘導結合プラズマあるいは反応性イオ
ンエッチングが使われる。食刻が終わるとパターンマス
クとして使われた物質（ＰＲや金属膜）が除去され（１
２６段階）、後熱処理された後（１２８段階）、膜堆積
工程により上位被覆が形成される（１３０段階）。この
ような過程が完了するとウェーハ単位の工程は終わり、
各素子単位で切断加工された後パッケージング過程を経
て素子として完成される。[0004] Pattern production is performed in a clean room. The wafer on which the film is deposited is subjected to a photoresist (PR) spin coating through a cleaning and drying process (116).
Stages). At this time, a metal mask may be deposited between the steps 112 and 116 according to etching conditions (step 114). After PR spin coating, P
The R pattern is baked so as to be hard (step 118), and after the design pattern is transferred onto the wafer using a mask alignment device, ultraviolet rays are irradiated (12).
0 stage). When the pattern is formed by the irradiation of ultraviolet rays, the unreacted PR is removed using a developer (step 122), and the exposed core layer is dry-etched (step 124). As an etching method, inductively coupled plasma or reactive ion etching is used. When the etching is completed, the substance (PR or metal film) used as the pattern mask is removed (1).
After the post heat treatment (step 128), the upper coating is formed by a film deposition process (step 130). When such a process is completed, the process for each wafer is completed,
After each element is cut and processed, the device is completed through a packaging process.
【０００５】前述したように従来の平面光導波路の製造
方法は基本的に膜を堆積する過程が３度反復され、多層
構造の素子を作る時はその以上が必要である。この場
合、膜堆積条件を最適化させても厚さの均一度が２〜３
％程度である。膜の厚さが一定でないとこれを基本とし
て作られる導波路の厚さも共に不均一になり、これは結
局素子特性の不均一を招く。図５Ａは厚さの不均一な光
導波路の断面を示すことであって、図５Ｂは図５Ａに示
した厚さの不均一な光導波路の側断面を示すことであ
る。参照番号２００は基板、２０２はコア層、それから
２０４は被覆層を示し、ｄは光導波路の厚さ、ｗは光導
波路の幅、それからｌは光導波路の長さを示す。前述し
た厚さの不均一が素子特性に及ぼす影響は次の通りであ
る。例えば、アレイ導波路デマルチプレクサ(AWG DEMU
X) は色々な波長が混ざってくる入力光信号の波長を分
離して各々の独立したチャンネルに分ける。この際、各
チャンネルの位相差△φは一定の間隔に決まるべきであ
り、この位相差は△Ｌが経路差、βが導波路の伝播指数
の時、△φ＝△Ｌ・βによって与えられる。導波路の伝
播指数βは、ｋ0 が波属(wave factor) 、ｄが導波路の
厚さ、θが入射角である時、β＝ｋ0 ×ｄ・sinθによっ
て与えられるが、導波路が均一でないと光が伝播される
途中でｄが変わるようになり、結局各チャンネルの終端
で望みの特定波長に分離できなくなって漏話が大きくな
る。これが実際の素子製造に問題点として作用する。As described above, in the conventional method of manufacturing a planar optical waveguide, the process of depositing a film is basically repeated three times, and when a device having a multilayer structure is manufactured, more steps are required. In this case, even if the film deposition conditions are optimized, the uniformity of the thickness is 2-3.
%. If the thickness of the film is not constant, the thickness of the waveguide formed on the basis thereof will also be non-uniform, resulting in non-uniform element characteristics. FIG. 5A shows a cross section of an optical waveguide having a non-uniform thickness, and FIG. 5B shows a side cross section of the optical waveguide having a non-uniform thickness shown in FIG. 5A. Reference numeral 200 indicates a substrate, 202 indicates a core layer, and 204 indicates a coating layer, d indicates the thickness of the optical waveguide, w indicates the width of the optical waveguide, and 1 indicates the length of the optical waveguide. The effect of the non-uniform thickness described above on the device characteristics is as follows. For example, an array waveguide demultiplexer (AWG DEMU
X) separates the wavelength of the input optical signal, in which various wavelengths are mixed, and divides them into independent channels. At this time, the phase difference Δφ of each channel should be determined at a constant interval. This phase difference is given by Δφ = ΔL · β when ΔL is a path difference and β is a propagation index of the waveguide. . The propagation index β of a waveguide is given by β = k 0 × d · sin θ, where k 0 is a wave factor, d is the thickness of the waveguide, and θ is the angle of incidence. If it is not uniform, d will change during the propagation of light, and eventually the desired wavelength cannot be separated at the end of each channel, resulting in increased crosstalk. This acts as a problem in actual device manufacture.
【０００６】AWG DEMUX 素子のみならず光導波路を基本
とする素子ではこのような問題点が発生する恐れがあ
る。基本的にこれによって発生する誤差が許容範囲内で
あれば使用可能であるが、多層構造になってより精密な
光信号の制御が必要な素子の場合にはより正確な光導波
路が要求される。Such a problem may occur not only in an AWG DEMUX element but also in an element based on an optical waveguide. Basically, it can be used as long as the error caused by this is within an allowable range. However, in the case of an element requiring a more precise control of an optical signal with a multilayer structure, a more accurate optical waveguide is required. .
【０００７】[0007]
【発明が解決しようとする課題】本発明が達成しようと
する技術的課題は２〜３％の厚さ偏差を有する上／下位
被覆層、コア層の厚さの不均一を解決するために表面平
坦化工程を追加して膜の厚さの差を最小化することによ
って、表面均一度を増加させる均一な平面光導波路の製
造方法を提供することにある。The technical problem to be solved by the present invention is to solve the non-uniform thickness of the upper / lower coating layer and the core layer having a thickness deviation of 2-3%. It is an object of the present invention to provide a method of manufacturing a planar optical waveguide having a uniform planar optical waveguide by increasing a surface uniformity by adding a planarization process to minimize a difference in film thickness.
【０００８】[0008]
【課題を解決するための手段】前記の技術的な課題を達
成するための、本発明による均一な平面光導波路の製造
方法は、基板に下位被覆層を堆積した後、堆積された表
面を研磨する第１段階と、前記第１段階の結果物上にコ
ア層を堆積した後、堆積された表面を研磨する第２段階
と、光導波路を形成するために前記第２段階で表面研磨
されたコア層をパターニングする第３段階と、前記第３
段階でパターニングされて形成された光導波路上に上位
被覆層を堆積した後、堆積された表面を研磨する第４段
階とを含むことが望ましい。SUMMARY OF THE INVENTION In order to achieve the above technical object, a method of manufacturing a uniform planar optical waveguide according to the present invention comprises the steps of: depositing a lower coating layer on a substrate; and polishing the deposited surface. A second step of depositing a core layer on the resultant of the first step, and then polishing the deposited surface; and a second step of polishing the surface in the second step to form an optical waveguide. A third step of patterning the core layer;
Depositing an upper coating layer on the optical waveguide patterned and formed in the step, and polishing the deposited surface.
【０００９】[0009]
【発明の実施の形態】以下、添付した図面を参照して本
発明をより詳細に説明する。図１は本発明による均一な
平面光導波路の製造方法に関するフローチャートであ
る。図１による均一な平面光導波路の製造方法は、下位
被覆層堆積段階３００、第１表面研磨段階３１０、コア
層堆積段階３２０、第２表面研磨段階３３０、パターニ
ング段階３４０、上位被覆層堆積段階３５０及び第３表
面研磨段階３６０よりなる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. FIG. 1 is a flowchart illustrating a method for manufacturing a uniform planar optical waveguide according to the present invention. The method of manufacturing a uniform planar optical waveguide according to FIG. 1 includes a lower coating layer deposition step 300, a first surface polishing step 310, a core layer deposition step 320, a second surface polishing step 330, a patterning step 340, and an upper coating layer deposition step 350. And a third surface polishing step 360.
【００１０】上／下位被覆層とコア層の膜堆積段階３０
０、３２０、３５０は前述したようなスピンコーティン
グ、ＣＶＤ、低圧ＣＶＤ、ＰＥＣＶＤ、ＡＰＣＶＤ及び
ＦＨＤの中で一つの方法が使われる。基板も前述したシ
リコン、石英、Ａｌ2 Ｏ3 、ＧａＡｓ、ＩｎＰ及びＩＩ
Ｉ−Ｖ族化合物半導体基板中一つが使われる。[0010] Upper / lower overlayer and core layer film deposition stage 30
For 0, 320 and 350, one of spin coating, CVD, low pressure CVD, PECVD, APCVD and FHD is used. The substrate is also made of silicon, quartz, Al 2 O 3 , GaAs, InP and II described above.
One of the IV group compound semiconductor substrates is used.
【００１１】第１、第２及び第３表面研磨段階３１０、
３３０、３６０は表面を平坦化するための過程である。
表面研磨には機械的研磨と化学的研磨方法があるが、機
械的研磨は研磨しようとする表面物質の硬度以上の物質
を使用して物理的に表面を少しずつ削る方法である。化
学的研磨は表面と反応する化学物質を使用して表面を少
しずつ溶かす方法である。前述した二つの研磨方法を結
合した機械化学的研磨法が使われる場合もある。機械化
学的研磨方法は化学薬品を使用して研磨しようとする表
面と化学反応させて表面の特性を変化させて機械的研磨
効率を増進させる方法である。この方法は特にウェーハ
を用いた大量生産工程と微細な表面研磨の可能な半導体
工程に多用される。図２は前述した機械化学的研磨方法
を示すことである。図２Ａは研磨されない堆積面を示
し、図２Ａの４００は基板、４０２は堆積膜を示す。図
２Ｂは４０４の研摩器具と研磨剤、化学薬品を利用して
研磨する過程を示し、図面の○は研磨剤、●は化学薬品
を示す。図２Ｃは研磨された後表面が均一になったこと
を示す図面である。A first, second and third surface polishing step 310;
Steps 330 and 360 are for flattening the surface.
Surface polishing includes mechanical polishing and chemical polishing. Mechanical polishing is a method in which a surface is physically ground little by little using a material having a hardness higher than the surface material to be polished. Chemical polishing is a method of gradually melting a surface using a chemical that reacts with the surface. In some cases, a mechanochemical polishing method combining the two polishing methods described above is used. The mechano-chemical polishing method is a method of using a chemical to chemically react with a surface to be polished to change the characteristics of the surface, thereby improving the mechanical polishing efficiency. This method is frequently used especially in a mass production process using a wafer and a semiconductor process capable of fine surface polishing. FIG. 2 illustrates the aforementioned mechanochemical polishing method. FIG. 2A shows an unpolished deposition surface, where 400 in FIG. 2A shows a substrate and 402 shows a deposited film. FIG. 2B shows a process of polishing using a polishing tool 404, an abrasive and a chemical, and ○ in the drawing indicates an abrasive and ● indicates a chemical. FIG. 2C is a view showing that the surface becomes uniform after polishing.
【００１２】例えば、シリカ光導波路の場合、表面研磨
対象がＢＰＳＧで主成分が珪素酸化物であるので、これ
と反応するアルカリ、例えばＫＯＨが添加された研磨剤
（ＳｉＯ2 微粒子、セラミック微粒子）が使われればシ
リカガラスの表面特性が変わる。このように化学反応に
より膜の表面特性が変わることによって機械的研磨効率
が増進される。For example, in the case of a silica optical waveguide, since the surface to be polished is BPSG and the main component is silicon oxide, an alkali (eg, KOH-added abrasive (SiO 2 fine particles, ceramic fine particles)) added thereto reacts with BPSG. If used, the surface properties of the silica glass will change. The mechanical polishing efficiency is enhanced by changing the surface characteristics of the film due to the chemical reaction.
【００１３】一方、本発明の均一な平面光導波路の製造
方法によると、まず下位被覆層膜が堆積され（３００段
階）、前述した方法で表面研磨作業が遂行される（３１
０段階）。その上にコア層膜が堆積され（３２０段
階）、また表面研磨作業が遂行される（３３０段階）。
コア層の堆積及び表面研磨作業が完了するとパターニン
グが行われる（３４０段階）。On the other hand, according to the method of manufacturing a uniform planar optical waveguide of the present invention, first, a lower coating layer is deposited (step 300), and the surface is polished by the method described above (31).
0 stage). A core layer film is deposited thereon (step 320), and a surface polishing operation is performed (step 330).
When the core layer deposition and surface polishing operations are completed, patterning is performed (operation 340).
【００１４】パターニング過程は次の通りである。ま
ず、ウェーハが洗浄された後、ＰＲスピンコーティング
が行われる（３４２段階）。３４２段階の遂行以前に食
刻条件によって金属マスクが堆積される場合もある（３
４１段階）。ＰＲスピンコーティング後、ＰＲパターン
が固くなるようにベーキングされ（３４３段階）、マス
ク整列して設計パターンがウェーハ上に転写された後、
紫外線が照射される（３４４段階）。紫外線照射により
パターンが形成されると、所定の溶液に浸して現像し
（３４５段階）、露出されたコア層を乾式食刻する（３
４６段階）。食刻方法はプラズマ食刻方法、例えば誘導
結合プラズマあるいは反応性イオンエッチングが使われ
る。食刻が終わるとパターンマスクとして使われた物質
（ＰＲや金属膜）が除去され（３４７段階）、後熱処理
されて（３４８段階）、膜パターニング過程が完了す
る。The patterning process is as follows. First, after the wafer is cleaned, PR spin coating is performed (step 342). Before performing step 342, a metal mask may be deposited depending on the etching conditions (3).
41 stages). After the PR spin coating, the PR pattern is baked so as to be hard (step 343), and after the mask is aligned and the design pattern is transferred onto the wafer,
Ultraviolet rays are irradiated (step 344). When the pattern is formed by irradiating the ultraviolet rays, it is immersed in a predetermined solution and developed (step 345), and the exposed core layer is dry-etched (3).
46 stages). As the etching method, a plasma etching method, for example, inductively coupled plasma or reactive ion etching is used. When the etching is completed, the material (PR or metal film) used as the pattern mask is removed (step 347) and post-heat treated (step 348) to complete the film patterning process.
【００１５】パターニングした後、膜堆積工程により上
位被覆層が形成され（３５０段階）、表面研磨作業が遂
行される（３６０段階）。After patterning, an upper coating layer is formed by a film deposition process (step 350), and a surface polishing operation is performed (step 360).
【００１６】前述した過程が全て終了すると、この過程
を反復して多層構造の素子が製造できる。When all of the above steps are completed, the steps are repeated to manufacture a multi-layer device.
【００１７】前述した方法に従って研磨を行って製造さ
れた単一モードシリカ導波路の場合、導波路の厚さの偏
差は５００Å以内に抑えられる。単一モードシリカ導波
路の場合、コア層の厚さが約８μｍであるので、厚さの
偏差率が０．６％になって従来の２〜３％に比べて均一
度が３〜５倍ほど向上する。多重モードの場合には導波
路の大きさがさらに大きくなり、厚さの偏差は変わらな
いので偏差率はさらに抑えられる。従って、いくつかの
波長を扱う素子、光の伝播距離が長い素子または多層の
導波路を有する素子に利用できる。In the case of a single-mode silica waveguide manufactured by polishing according to the method described above, the deviation of the thickness of the waveguide is suppressed to within 500 °. In the case of a single-mode silica waveguide, since the thickness of the core layer is about 8 μm, the thickness deviation rate is 0.6%, and the uniformity is 3 to 5 times as compared with the conventional 2-3%. The better. In the case of the multiple mode, the size of the waveguide is further increased and the deviation of the thickness does not change, so that the deviation rate can be further suppressed. Therefore, it can be used for an element that handles several wavelengths, an element having a long light propagation distance, or an element having a multilayer waveguide.
【００１８】[0018]
【発明の効果】本発明によると、表面平坦化工程が追加
されて光導波路の厚さの均一度が増加することによって
光導波路内の有効屈折率が均一になり、より精密な光素
子が製造できる。特にAWG DeMUX の場合、各チャンネル
での位相差が望みの値に一致して漏話が減少する。According to the present invention, a surface flattening step is added to increase the uniformity of the thickness of the optical waveguide, so that the effective refractive index in the optical waveguide becomes uniform and a more precise optical element is manufactured. it can. In the case of AWG DeMUX, in particular, the phase difference in each channel matches the desired value, and crosstalk is reduced.
【図１】本発明による均一な平面光導波路の製造方法を
示すフローチャートである。FIG. 1 is a flowchart illustrating a method of manufacturing a uniform planar optical waveguide according to the present invention.
【図２】本発明による表面平坦化過程を示した図であ
る。FIG. 2 is a view illustrating a process of planarizing a surface according to the present invention.
【図３】従来の平面光導波路の製造過程を示した図であ
る。FIG. 3 is a view showing a manufacturing process of a conventional planar optical waveguide.
【図４】従来の平面光導波路の製造方法を細分化したフ
ローチャートである。FIG. 4 is a flow chart in which a conventional method for manufacturing a planar optical waveguide is subdivided.
【図５】図５Ａは厚さの不均一な光導波路の断面図であ
り、図５Ｂは図５Ａに示した厚さの不均一な光導波路の
側断面図である。5A is a cross-sectional view of an optical waveguide having a non-uniform thickness, and FIG. 5B is a side cross-sectional view of the optical waveguide having a non-uniform thickness shown in FIG. 5A.
Claims (9)
れた表面を研磨する第１段階と、前記第１段階の研磨済
み表面上にコア層を堆積した後、堆積された表面を研磨
する第２段階と、光導波路を形成するために前記第２段
階で表面研磨されたコア層をパターニングする第３段階
と、第３段階でパターニングされて形成された光導波路
上に上位被覆層を堆積した後、堆積された表面を研磨す
る第４段階とを含むことを特徴とする均一な平面光導波
路の製造方法。1. A first step of polishing a deposited surface after depositing an undercoat layer on a substrate, and polishing a deposited surface after depositing a core layer on the polished surface of the first step. A second step of forming the optical waveguide, a third step of patterning the surface-polished core layer in the second step to form an optical waveguide, and forming an upper coating layer on the optical waveguide patterned and formed in the third step. Polishing the deposited surface after the deposition. 4. A method for manufacturing a uniform planar optical waveguide, comprising:
化アルミニウム、ガリウム砒素、インジウムリン化物、
又はＩＩＩ−Ｖ族化合物半導体のうちのいずれかであ
る、請求項１に記載の製造方法。2. The method according to claim 1, wherein the material of the substrate is silicon, quartz, aluminum oxide, gallium arsenide, indium phosphide,
The manufacturing method according to claim 1, which is any one of a group III-V compound semiconductor.
ィング、化学気相堆積法、プラズマ強化化学気相堆積
法、低圧化学気相堆積法、大気圧化学気相堆積法、又は
火炎加水堆積法のうちのいずれかによって行われる、請
求項１に記載の製造方法。3. The method of claim 1, wherein the depositing of the undercoat layer comprises spin coating, chemical vapor deposition, plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition, or flame hydration. The method according to claim 1, wherein the method is performed by any one of the following.
又は機械化学的研磨のうちのいずれかによって行われ
る、請求項１に記載の製造方法。4. The polishing is performed by mechanical polishing, chemical polishing,
The method according to claim 1, wherein the method is performed by any one of: mechanical polishing;
グ、化学気相堆積法、プラズマ強化化学気相堆積法、低
圧化学気相堆積法、大気圧化学気相堆積法、又は火炎加
水堆積法のうちのいずれかによって行われる、請求項１
に記載の製造方法。5. The method of claim 1, wherein the deposition of the core layer comprises spin coating, chemical vapor deposition, plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition, or flame hydration. 2. The method of claim 1, wherein the method is performed by one of the methods.
The production method described in 1.
ィング、化学気相堆積法、プラズマ強化化学気相堆積
法、低圧化学気相堆積法、大気圧化学気相堆積法、又は
火炎加水堆積法のうちのいずれかによって行われる、請
求項１に記載の製造方法。6. The method of claim 1, wherein the depositing of the overlying coating comprises spin coating, chemical vapor deposition, plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition, or flame hydration. The method according to claim 1, wherein the method is performed by any one of the following.
記表面研磨されたコア層表面にフォトレジストをスピン
コーティングする段階と、熱を加えてフォトレジストを
硬化させるベーキング段階と、マスクをアライメントし
て設計パターンをフォトレジストに転写させた後に紫外
線を照射する段階と、所定の溶液に浸してフォトレジス
トパターンを現像する段階と、設計パターンに従ってコ
ア層を食刻した後、パターンマスクとして使用した物質
を除去する食刻段階と、後熱処理段階とを具備すること
を特徴とする、請求項１に記載の製造方法。7. The third step of performing the patterning includes spin coating a photoresist on the surface of the polished core layer, baking the photoresist by applying heat, and aligning the mask. After transferring the design pattern to the photoresist, irradiating with ultraviolet light, immersing the photoresist pattern in a predetermined solution to develop the photoresist pattern, etching the core layer according to the design pattern, and then removing the substance used as the pattern mask. The method according to claim 1, further comprising an etching step for removing and a post heat treatment step.
グする段階よりも前に前記表面研磨されたコア層に金属
マスクを堆積する段階をさらに具備することを特徴とす
る、請求項７に記載の製造方法。8. The method of claim 7, further comprising depositing a metal mask on the surface-polished core layer before spin-coating the photoresist.
なることを特徴とする、請求項７に記載の製造方法。9. The method according to claim 7, wherein the etching is performed by using a plasma etching method.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1997-32888 | 1997-07-15 | ||
| KR1019970032888A KR100509510B1 (en) | 1997-07-15 | 1997-07-15 | Fabrication for uniform planar waveguide |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1172637A JPH1172637A (en) | 1999-03-16 |
| JP2902640B2 true JP2902640B2 (en) | 1999-06-07 |
Family
ID=19514551
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10193029A Expired - Fee Related JP2902640B2 (en) | 1997-07-15 | 1998-07-08 | Manufacturing method of planar optical waveguide |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP2902640B2 (en) |
| KR (1) | KR100509510B1 (en) |
| CN (1) | CN1105927C (en) |
| GB (1) | GB2327280B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2373343A (en) * | 2001-03-16 | 2002-09-18 | Bookham Technology Plc | Rib waveguide for connection to an optical component |
| CN100356216C (en) * | 2005-12-29 | 2007-12-19 | 天津大学 | Method of preparing long period bar wave guide optical grating on optical glass surface |
| JP2009205112A (en) * | 2008-02-29 | 2009-09-10 | Sumitomo Electric Ind Ltd | Optical waveguide and method of manufacturing the same |
| JP6004550B2 (en) * | 2012-12-20 | 2016-10-12 | 日本碍子株式会社 | Seed crystal substrate, composite substrate and functional element |
| WO2019117588A1 (en) * | 2017-12-15 | 2019-06-20 | 주식회사 엘지화학 | Wearable device |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4086001A (en) * | 1975-01-13 | 1978-04-25 | Honeywell Inc. | Planar optical waveguide |
| US4169009A (en) * | 1977-03-30 | 1979-09-25 | United Technologies Corporation | Large area microstructure processing |
| JPS5540477A (en) * | 1978-09-14 | 1980-03-21 | Nec Corp | Production of diffraction grating |
| JPS5930508A (en) * | 1982-08-12 | 1984-02-18 | Matsushita Electric Ind Co Ltd | Optical waveguide |
| NL8701478A (en) * | 1987-06-25 | 1989-01-16 | Philips Nv | METHOD FOR MANUFACTURING A PLANAR OPTICAL COMPONENT. |
| JPH0563296A (en) * | 1991-09-03 | 1993-03-12 | Mitsubishi Electric Corp | Forming method for optical waveguide |
| US5613995A (en) * | 1993-04-23 | 1997-03-25 | Lucent Technologies Inc. | Method for making planar optical waveguides |
| JPH0727937A (en) * | 1993-07-09 | 1995-01-31 | Sumitomo Electric Ind Ltd | Production of optical waveguide |
| JPH07294760A (en) * | 1994-04-22 | 1995-11-10 | Sumitomo Electric Ind Ltd | Production of optical waveguide |
| JP3674061B2 (en) * | 1994-10-31 | 2005-07-20 | 株式会社日立製作所 | Thin film multilayer circuit board and optical waveguide manufacturing method |
-
1997
- 1997-07-15 KR KR1019970032888A patent/KR100509510B1/en active IP Right Grant
-
1998
- 1998-07-08 JP JP10193029A patent/JP2902640B2/en not_active Expired - Fee Related
- 1998-07-13 CN CN98103201A patent/CN1105927C/en not_active Expired - Fee Related
- 1998-07-14 GB GB9815126A patent/GB2327280B/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH1172637A (en) | 1999-03-16 |
| CN1205444A (en) | 1999-01-20 |
| GB2327280B (en) | 1999-08-11 |
| KR100509510B1 (en) | 2005-10-21 |
| CN1105927C (en) | 2003-04-16 |
| GB2327280A (en) | 1999-01-20 |
| GB9815126D0 (en) | 1998-09-09 |
| KR19990010190A (en) | 1999-02-05 |
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