CN104917494A - Function signal generator - Google Patents

Abstract

The invention discloses a function signal generator. The function signal generator comprises a phase accumulator which is used for carrying out phase accumulation under the effect of a first clock according to a frequency control word input by a user, a waveform lookup table which is used for storing waveform data and outputting corresponding waveform data according to a waveform lookup table address, a digital to analog converter which is used for converting the waveform data into a waveform signal under the effect of the first clock, a low-pass filter which is used for filtering out glitch noise in the waveform signal and outputting the waveform signal, and a clock conversion module which is used for generating a tunable virtual sampling clock according to the phase accumulator and generating the waveform lookup table address under the effect of the virtual sampling clock. According to the specific embodiment of the invention, the clock conversion module is comprised; through the phase accumulator, the tunable virtual sampling clock is generated, and the waveform lookup table address is generated under the effect of the virtual sampling clock; and through a programmable logic device, the sampling rate of the function signal generator is changed without a clock generation chip.

Description

A kind of function signal generator

Technical field

The application relates to electronic instrument, particularly relates to a kind of function signal generator.

Background technology

As shown in Figure 1, existing function signal generator comprises phase accumulator, phase register, waveform question blank, digital to analog converter and low pass filter.Phase accumulator is used for carrying out phase-accumulated under the first clock effect according to the frequency control word of user's input, and accumulation result is sent to phase register; Phase register, under the first clock effect according to accumulation result, obtain waveform question blank address; Waveform question blank, for exporting corresponding Wave data according to waveform question blank address.

Have the function signal generator of variable sampling rate at present, great majority use clock generation chip, change sample rate by configurable clock generator chip.

Summary of the invention

The technical problem that the application will solve is for the deficiencies in the prior art, provides a kind of function signal generator.

The technical problem that the application will solve is solved by the following technical programs:

A kind of function signal generator, comprises phase accumulator, waveform question blank, digital to analog converter and low pass filter;

Described phase accumulator, carries out phase-accumulated for the frequency control word inputted according to user under the first clock effect;

Described waveform question blank, exports corresponding Wave data for stored waveform data according to waveform question blank address;

Described digital to analog converter, for being converted to waveform signal by described Wave data under described first clock effect;

Described low pass filter, for exporting described waveform signal filtering glitch noise;

Also comprising clock conversion module, for being made by programmable logic device described phase accumulator produce adjustable virtual sampling clock, and producing described waveform question blank address under described virtual sampling clock effect.

Above-mentioned function signal generator, described waveform question blank address obtains under described virtual sampling clock effect, and described waveform lookup table data is exported one by one.

Above-mentioned function signal generator, described waveform question blank address obtains especially by the mode of cumulative 1.

Above-mentioned function signal generator, when described phase accumulator is added to maximum, produces the enable signal of described virtual sampling clock, and the size of described virtual sampling clock designs according to described frequency control word, phase accumulator width and described first clock.

Above-mentioned function signal generator, the computing formula of described virtual sampling clock is:

$F_{\mathrm{var}}=\frac{\mathrm{FTW}}{2^N}\×F_s$

Wherein, F _varfor virtual sampling clock, FTW is frequency control word, and N is phase accumulator width, and Fs is the first clock.

Above-mentioned function signal generator, the computing formula of the output signal frequency of described function signal generator is:

$F_{\mathrm{out}}=\frac{\mathrm{FTE}}{2^N}\×\frac{F_s}{L}$

Wherein, F _outfor output signal frequency, L is waveform table length.

The computing formula of the virtual sampling clock resolution of above-mentioned function signal generator is:

$F_0=\frac{F_s}{2^N}$

Wherein, F ₀for virtual sampling clock resolution.

Owing to have employed above technical scheme, the beneficial effect that the application is possessed is:

(1) in the embodiment of the application, owing to comprising clock conversion module, produce adjustable virtual sampling clock by phase accumulator, and produce waveform question blank address under virtual sampling clock effect.The application changes function signal generator sample rate by programmable logic device, and without the need to using clock generation chip, portable high, cost is low.

(2) in the embodiment of the application, because waveform question blank address obtains under virtual sampling clock effect, waveform question blank address obtains especially by the mode of cumulative 1, and waveform lookup table data is exported one by one, without repeating or skipping waveform table data, undistorted during output random waveform.

(3) in the embodiment of the application, because virtual sampling clock resolution is the first clock and 2 ⁿratio, N is phase accumulator width, by adjustment N make the value of virtual sampling clock resolution very little.

Accompanying drawing explanation

Fig. 1 is the high-level schematic functional block diagram of existing function signal generator;

Fig. 2 is the application's function signal generator high-level schematic functional block diagram in one embodiment;

Fig. 3 is the application's phase accumulator accumulation result and virtual sampling clock matching relationship schematic diagram.

Embodiment

By reference to the accompanying drawings the application is described in further detail below by embodiment.

As shown in Figure 2, the function signal generator of the application, its a kind of execution mode, comprises phase accumulator, clock conversion module, waveform question blank, digital to analog converter and low pass filter.Phase accumulator, carries out phase-accumulated for the frequency control word inputted according to user under the first clock effect.Clock conversion module, for being made phase accumulator produce adjustable virtual sampling clock by programmable logic device, and produces waveform question blank address under virtual sampling clock effect.Waveform question blank, exports corresponding Wave data for stored waveform data according to waveform question blank address.Digital to analog converter, for being converted to waveform signal by Wave data under the first clock effect.Low pass filter, for exporting after waveform signal filtering glitch noise.In one embodiment, first clock of the application can be system clock, and each several part of function signal generator is all realized by programmable logic device.

Waveform question blank address obtains under virtual sampling clock effect, and waveform lookup table data is exported one by one.Waveform question blank address specifically obtains by the mode of cumulative 1.The initial address of waveform question blank can be preset by user.Waveform question blank address also obtains, as long as make waveform lookup table data export one by one by the mode of other numerals cumulative.

As shown in Figure 3, when phase accumulator is added to maximum, produce the enable signal of virtual sampling clock, the size of virtual sampling clock designs according to frequency control word, phase accumulator width and the first clock.The instantaneous value of phase accumulator, by 0 to 2 ^n-1, digital quantity represents, whenever accumulator is greater than maximum 2 ^n-1time, accumulator will produce spill over, namely creates adjustable sampling clock F _varenable signal, heavy accumulator continues to add up again afterwards.In one embodiment, the computing formula of virtual sampling clock is:

$F_{\mathrm{var}}=\frac{\mathrm{FTW}}{2^N}\×F_s$

Wherein, F _varfor virtual sampling clock, FTW is frequency control word, and N is phase accumulator width, and Fs is the first clock.

The computing formula of the output signal frequency of function signal generator is:

$F_{\mathrm{out}}=\frac{\mathrm{FTE}}{2^N}\×\frac{F_s}{L}$

Wherein, F _outfor the output signal frequency of function signal generator output, FTW is frequency control word, and N is phase accumulator width, and Fs is the first clock, and L is waveform table length.

The computing formula of the virtual sampling clock resolution of function signal generator is:

$F_0=\frac{F_s}{2^N}$

Wherein, F ₀for virtual sampling clock resolution, Fs is the first clock, and N is phase accumulator width.

In one embodiment, the function signal generator of the application is specifically that carrier is realized by programmable logic device.

If phase accumulator bit wide 4bit, FTW are 3, so if waveform table length L is 4, the frequency so exported if Fs is 100MHz, so F _out=4.6875MHz.

When phase accumulator bit wide N is 4bit, virtual sampling clock resolution and when N is 48bit, virtual sampling clock resolution namely the application can export the signal of wide range of frequencies when waveform table length is fixed, and virtual sampling clock resolution can be very little.

Above content is the further description done the application in conjunction with concrete execution mode, can not assert that the concrete enforcement of the application is confined to these explanations.For the application person of an ordinary skill in the technical field, under the prerequisite not departing from the application's design, some simple deduction or replace can also be made.

Claims (7)

1. a function signal generator, comprises phase accumulator, waveform question blank, digital to analog converter and low pass filter;

Described phase accumulator, carries out phase-accumulated for the frequency control word inputted according to user under the first clock effect;

Described waveform question blank, exports corresponding Wave data for stored waveform data according to waveform question blank address;

Described digital to analog converter, for being converted to waveform signal by described Wave data under described first clock effect;

Described low pass filter, for exporting described waveform signal filtering glitch noise;

It is characterized in that, also comprise clock conversion module, for being made by programmable logic device described phase accumulator produce adjustable virtual sampling clock, and producing described waveform question blank address under described virtual sampling clock effect.

2. function signal generator as claimed in claim 1, it is characterized in that, described waveform question blank address obtains under described virtual sampling clock effect, and described waveform lookup table data is exported one by one.

3. function signal generator as claimed in claim 2, is characterized in that, described waveform question blank address obtains especially by the mode of cumulative 1.

4. function signal generator as claimed in claim 1, it is characterized in that, when described phase accumulator is added to maximum, produce the enable signal of described virtual sampling clock, the size of described virtual sampling clock designs according to described frequency control word, phase accumulator width and described first clock.

5. function signal generator as claimed in claim 4, it is characterized in that, the computing formula of described virtual sampling clock is:

$F_{\mathrm{var}}=\frac{\mathrm{FTW}}{2^N}\×F_s$

Wherein, F _varfor virtual sampling clock, FTW is frequency control word, and N is phase accumulator width, and Fs is the first clock.

6. function signal generator as claimed in claim 5, it is characterized in that, the computing formula of the output signal frequency of described function signal generator is:

$F_{\mathrm{out}}=\frac{\mathrm{FTW}}{2^N}\×\frac{F_s}{L}$

Wherein, F _outfor output signal frequency, L is waveform table length.

7. function signal generator as claimed in claim 5, it is characterized in that, the computing formula of the virtual sampling clock resolution of described function signal generator is:

$F_0=\frac{F_s}{2^N}$

Wherein, F ₀for virtual sampling clock resolution.