CN113376585B - High-resolution pulse signal synthesizer - Google Patents
High-resolution pulse signal synthesizer Download PDFInfo
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- CN113376585B CN113376585B CN202110556592.5A CN202110556592A CN113376585B CN 113376585 B CN113376585 B CN 113376585B CN 202110556592 A CN202110556592 A CN 202110556592A CN 113376585 B CN113376585 B CN 113376585B
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Abstract
The invention belongs to the technical field of digital testing, and particularly relates to a high-resolution pulse signal synthesis device. The problem of low timing resolution of the pulse signal synthesized by the prior art is solved by adopting the nfs sampling frequency through the waveform sampling point generating module; high-frequency harmonic interference is filtered by the digital filter, and effective transmission of waveform sampling points is guaranteed. The matching of the waveform sample points and the digital-to-analog converter is ensured through the arrangement of the waveform sample point extraction module. The digital filter is matched with the waveform sampling point extraction module, so that the output waveform sampling points can be matched with digital-to-analog converters with different performances. The device under test is provided with a high-resolution pulse width adjustable signal, the pulse width adjustable resolution is not limited by the time interval of the sampling clock, and the manufacturing cost is low.
Description
Technical Field
The invention belongs to the technical field of digital testing, and particularly relates to a high-resolution pulse signal synthesis device.
Background
The pulse signal with adjustable pulse width has wide application in the technical field of digital test, such as the setup and hold time of the tested device, the response of the communication device, the playback test of radar waveform, and the like. In the current waveform Synthesis method, an arbitrary waveform Synthesis method based on Direct Digital Synthesis technology (Direct Digital Synthesis) has the advantages of flexible signal generation mode, high frequency resolution, high frequency switching speed and the like. Where the pulse signal synthesis is an important branch of direct digital frequency synthesis.
In the prior art, when a pulse signal is synthesized, the synthesis of the pulse signal is usually realized by presetting pulse waveform data of one cycle in a waveform memory, specifically, as shown in fig. 1, under the action of a sampling clock, a frequency control word K with a bit width N is accumulated on each clock rising edge. Obtaining high M bits through phase truncation for reading waveform data in the waveform memory, and sending the waveform data to a digital-to-analog converter to output an analog signal; after spurious signals such as image frequency and the like of the analog signal are filtered by a low-pass filter, a relatively pure pulse waveform is obtained. When the method is used for realizing pulse signal synthesis, the resolution of the pulse width, the trigger delay and other timing parameters depends on the time interval of the sampling clock, so that the timing resolution of the pulse signal is relatively low.
Disclosure of Invention
The invention aims to: a high-resolution pulse signal synthesizing device is provided to solve the problem of low timing resolution of synthesized pulse signals in the prior art.
In order to realize the purpose, the invention adopts the following technical scheme:
a high-resolution pulse signal synthesis device comprises an upper computer, a local interface, a parameter control module, a waveform sampling point generation module, a frequency divider, a digital filter, a waveform sampling point extraction module, a digital-to-analog converter and a low-pass filter;
the upper computer is connected with the parameter control module through a local interface, sets pulse parameter information according to user requirements, converts the set pulse parameter information into a data format matched with the local interface, and provides the data format to the input end of the parameter control module after decoding through the local interface; wherein the pulse parameter information comprises pulse signal frequency f and pulse width TwRising edge time TrFalling edge time TfHigh level VHLow level VLAnd the pulse width resolution t to be achieved;
the output end of the parameter control module is connected with the first input end of the waveform sampling point generation module and provides decoded pulse parameter information for the waveform sampling point generation module;
the second input end of the waveform sampling point generation module is externally connected with a sampling clock nfs(ii) a Waveform sampling point generating module at sampling clock nfsThe phase accumulation operation is carried out under the driving of the digital filter, and an original waveform sampling point is generated according to the phase accumulation operation result and is provided for a first input end of the digital filter;
the second input end of the digital filter is externally connected with a sampling clock nfsThe output end of the sampling module is connected with the first input end of the waveform sampling point extraction module; digital filter pass sampling clock nfsThe high-frequency harmonic component in the original waveform sampling point is removed by the driving of the driver, and the filtering processing of the original waveform sampling point is completed;
said frequency divider (no accompanying text in figure 2)Receiving the sampling clock nf at the input terminalsFor the sampling clock nfsFrequency division processing is carried out to obtain a sampling clock fsThe output end of the digital-to-analog converter is connected with the second input end of the waveform sampling point extraction module and the digital-to-analog converter respectively;
the output end of the waveform sampling point extraction module is connected with the digital-to-analog converter, the filtered waveform sampling points are extracted through resampling, and the waveform sampling points are extracted according to the received sampling clock fsConverting the sampled waveform sample sampling frequency to fsTo achieve data synchronization with the digital-to-analog converter;
the D/A converter is based on a sampling clock fsCarrying out digital-to-analog conversion on the waveform sampling point data provided by the waveform sampling point extraction module to generate an analog signal and providing the analog signal to the low-pass filter circuit;
the low-pass filter performs low-pass filtering on the analog signal output by the digital-to-analog converter to remove the stray signal and outputs the analog signal to the outside.
Furthermore, in practical application, the waveform signal of the pulse needs to be calibrated, so that the output pulse signal meets the required precision, and the precise output of the signal is realized. The parameter control module of the device also comprises a second output end and a third output end, wherein the second output end is connected with the digital filter, and the third output end is connected with the waveform sampling point extraction module; the digital filter and the waveform sampling point extraction module realize the sub-band calibration through the pulse parameter information provided by the parameter control module, and further improve the precision of the pulse signal.
Further, the detailed process of generating the original waveform sampling points by the waveform sampling point generating module is as follows:
setting the initial value of phase accumulation as 1, resetting to 1 after the pulse signal period is reached, and circularly generating pulse waveform sampling points; specifically, at each sampling clock nfsAnd then carrying out accumulation operation on the K value to obtain a current value K of phase accumulation, comparing the current value K with a threshold value based on the precision requirement, and selecting a corresponding waveform sampling point calculation formula according to the comparison result to calculate to obtain a waveform sampling point value under the current phase:
when phase accumulator threshold
And then selecting a rising edge waveform sampling point calculation formula:
when the phase accumulation threshold is
When the current is over; selecting high-level waveform sampling points: vH；
When the phase accumulation threshold is
When the current is over; selecting a calculation formula of the falling edge waveform sampling point:
when the phase accumulation threshold is
Selecting low-level waveform sampling points: vL。
The waveform sampling point calculation formula is obtained by defining a pulse.
The invention provides a high-resolution pulse signal synthesizer.A waveform sampling point generating module of the synthesizer carries out phase accumulation under the driving of a sampling clock nfs and generates an original waveform sampling point according to a phase accumulation operation result. The pulse width resolution t in the pulse signal is related to the sampling clock frequency, and the smaller the sampling time interval is, the higher the pulse width resolution t of the generated pulse signal is, so that the problem of low timing resolution of the pulse signal synthesized by the prior art can be solved by setting the sampling clock frequency of the waveform sampling point generation module to nfs. Because the generated original waveform sampling point contains high-frequency harmonic components, the interference factor of the finally synthesized pulse signal in a circuit can be increased, and the application effect is influenced; in order to solve the problem, the device provided by the invention is additionally provided with a digital filter, and the digital filter ensures the effective transmission of waveform samples. The waveform sampling point extraction module ensures the matching of the waveform sampling point and the digital-to-analog converter, and in the process of matching the waveform sampling point and the digital-to-analog converter, the waveform sampling point extraction module obtains the sampling frequency fs after adopting nfs frequency division for enabling the output waveform sampling point to be matched with the digital-to-analog converters with different performances.
In summary, the invention adopts the technical scheme, so that the invention has the following beneficial effects:
(1) the sampling clock nfs used when the original waveform is generated is subjected to frequency division to obtain the sampling clock fs, and the sampling clock fs is used as the sampling rate of the waveform sampling point extraction module, so that the pulse width resolution exceeding the limit of the sampling rate of the digital-to-analog converter is realized;
(2) fs is an integral multiple of the frequency f of the pulse signal, so the sampling rate nf adopted by the waveform sampling point generating modulesThe pulse width resolution of the pulse signal is improved, and the waveform sampling points are fixed in each pulse period, so that the waveform is prevented from shaking caused by the change of the sampling points in each period from the source.
Drawings
FIG. 1 is a schematic block diagram of a prior art digital synthesis;
FIG. 2 is a functional block diagram of an embodiment apparatus;
FIG. 3 is a schematic block diagram of a waveform sample generation module, shown in phantom in FIG. 2;
fig. 4 is a schematic diagram of the rising edge, pulse width and period of the pulse signal shown in fig. 3.
Detailed Description
The following description of the embodiments of the present invention is provided in order to better understand the present invention for those skilled in the art with reference to the accompanying drawings. It is to be expressly noted that in the following description, a detailed description of known functions and designs will be omitted when it may obscure the subject matter of the present invention.
Fig. 2 is a schematic block diagram of the apparatus of the present embodiment. As shown in fig. 1, the high-resolution pulse signal synthesizer of the present invention includes an upper computer, a local interface, a parameter control module, a waveform sampling point generation module, a frequency divider, a digital filter, a waveform sampling point extraction module, a digital-to-analog converter, and a low-pass filter;
and the upper computer is connected with the parameter control module through a local interface. In the upper computer, a calculation user inputs required waveform parameters through control software, converts the waveform parameters into a data format matched with the local interface, and then sends the data format to the local interface through the communication interface. Wherein, the input waveform parameters include pulse signal frequency f and pulse width TwRising edge time TrFalling edge time TfHigh level VHLow level VLAnd the pulse width resolution t to be achieved. Sampling clock frequency nf in this embodimentsThe pulse signal frequency f depending on the actual requirement and the pulse width resolution t to be realized can be obtained by performing calculation according to the pulse signal frequency f and the pulse width resolution t to be realized, in this embodiment, the sampling clock frequency nfsLess than 1/t and fsIs an integer multiple of the frequency of the pulse signal.
The local interface is used for receiving the waveform parameters, decoding the waveform parameters into a local bus format and sending the local bus format to the parameter control module.
The output end of the parameter control module is connected with the first input end of the waveform sampling point generation module and used for distributing the local bus data to each module, and the parameter control module comprises the waveform sampling point generation module, a digital filter and a waveform sampling point extraction module.
The second input end of the waveform sampling point generation module is externally connected with a sampling clock nfsAnd generating original waveform sampling points under the driving of a sampling clock, and sending the original waveform sampling points into a digital filter for digital filtering. The clock frequency of the waveform sampling point generation module is nfsBecause of nfsLess than 1/t, and therefore pulse width variation above the pulse width resolution requirement can be achieved. And fs is an integral multiple of the frequency f of the pulse signal, nfsIs also integer times of f, so that the waveform sampling points generated by the waveform sampling point generating module are fixed waveform sampling points in each pulse period and are derived from the sourceJitter in the waveform due to variations in the number of samples per cycle is avoided overhead.
The output end of the digital filter is connected with the first input end of the waveform sampling point extraction module; the digital filter is used for carrying out digital filtering on the original waveform sampling points to obtain the waveform sampling points matched with the analog bandwidth of the digital-to-analog converter. Since the operating frequency of the sampling clock affects both the pulse width resolution and the operating frequency of the digital filter. Meanwhile, to filter the high-frequency harmonic component to match the bandwidth of the dac, the working frequency of the digital filter is nf in this embodiments. Therefore, the waveform sample point frequency spectrum after passing through the digital filter is reduced from the infinite harmonic component of the original waveform to the finite harmonic component.
The input end of the frequency divider is connected with a sampling clock nfsThe output end of the digital-to-analog converter is respectively connected with a waveform sampling point extraction module and a digital-to-analog converter; for sampling clock nfsPerforming frequency division to obtain clock signal fs；
The output end of the waveform sampling point extraction module is connected with the digital-to-analog converter, the waveform sampling points are extracted through resampling, and then the waveform sampling points are extracted according to the received sampling clock fsConverting output waveform sample rate to fsTo achieve data synchronization with the digital-to-analog converter;
D/A converter according to sampling clock fsCarrying out digital-to-analog conversion on the waveform sampling point data provided by the waveform sampling point extraction module to generate an analog signal and providing the analog signal to a low-pass filter circuit;
the low-pass filtering is carried out on the analog signal output by the digital-to-analog converter to remove the stray signal, and a relatively pure pulse waveform is output. Due to the zero-order hold characteristic of the digital-to-analog converter, the output analog signal contains spurious signals including image frequency, and the analog signal containing the spurious signals needs to be filtered to obtain a pure pulse signal. The low-pass filter filters out higher harmonics and image frequency outside the pulse signal bandwidth required by a user to obtain a high-resolution pulse signal with controllable pulse width.
Fig. 3 is a schematic block diagram of a waveform sample generation module, which is a dashed box in fig. 2.As shown in FIG. 3, in the present embodiment, the pulse waveform control module is at the sampling clock nfsIs driven to carry out phase accumulation operation, and the accumulation operation parameter of the phase is pulse width TwRise time TrA fall time TfAnd a pulse frequency f. The pulse waveform control module carries out waveform sampling point switching through phase accumulation operation, and realizes that a rising edge waveform sampling point, a high-level waveform sampling point, a falling edge waveform sampling point and a low-level waveform sampling point are sequentially and alternately output in a circulating manner. The rising edge waveform sampling point, the high level waveform sampling point, the falling edge waveform sampling point and the low level waveform sampling point can be obtained by the following calculation formulas:
the rising edge waveform sampling point calculation formula:
k is the current value of the phase accumulator;
the phase accumulator threshold corresponding to the rising edge calculation formula:
high level waveform sampling point: vH；
High level corresponds to phase accumulator threshold:
the calculation formula of the waveform sampling point of the falling edge is as follows:
and a phase accumulator threshold corresponding to a falling edge calculation formula:
low level waveform sampling points: vL；
Low level corresponds to phase accumulator threshold:
and the phase accumulator performs accumulation operation under each sampling clock to obtain a current value K, compares the K with a threshold value, selects calculation formulas of different waveform segments, and brings the calculation formulas into the K to obtain a waveform sample value under the current phase. The initial value of the phase accumulator is set to be 1, 1 is reset after the period of the pulse signal is reached, and the pulse waveform sampling point is generated circularly.
In this embodiment, in the process of generating the original waveform sampling point, the waveform sampling point generation module performs an accumulation operation under the drive of each sampling clock to obtain a current value K, compares K with a threshold, selects a calculation formula of different waveform segments, and brings the calculation formula into K to obtain a waveform sampling point value in the current phase. Therefore, the pulse width modulation can be realized more conveniently, and the inter-channel delay resolution when multiple paths of pulse signals are generated can be improved.
Fig. 4 is a schematic diagram of the rising edge, pulse width and period of the pulse signal shown in fig. 3. As shown in FIG. 3, the high and low levels of the pulse signal are VHAnd VLThe period of the pulse signal is 1/f, and the rise time TrFor the time of the level transition from 10% to 90% of the amplitude, the fall time TfFor the time the level transits from 90% to 10% of the amplitude, the pulse width TwIs the time involved in the transition of the pulse high level from 50% amplitude in the rising edge to 50% amplitude in the falling edge. An ideal pulse signal can be determined by the six parameters.
In this embodiment, the user selects the pulse width T according to the pulse signal frequency fwRising edge time TrFalling edge time TfHigh level VHLow level VLAnd the pulse width resolution t, the desired pulse signal can be generated. Wherein the pulse width resolution t corresponds to the sampling clock frequency nf at which the original waveform samples are calculatedsAnd generating original waveform sampling points at the sampling rate, sending the original waveform sampling points to a digital filter for bandwidth limitation, and then obtaining the waveform sampling points matched with the digital-to-analog converter after resampling. Exceeding the sampling rate f of a digital-to-analog converter by means of the method and the devicesPulse ofThe width resolution is realized, and the generation of pulse signal jitter is avoided because the sampling clock frequency is integral multiple of the pulse signal frequency.
It should be noted that, in the present invention, the sampling clock frequency nf is calculated by the pulse width resolution tsThe resolution of the rising and falling edges of the pulse signal can also reach t.
According to the embodiment, the high-resolution pulse signal synthesis device provided by the invention solves the problem of low timing resolution of the synthesized pulse signal in the prior art by adopting the nfs sampling frequency through the waveform sampling point generation module; high-frequency harmonic interference is filtered by the digital filter, and effective transmission of waveform sampling points is guaranteed. The waveform sampling point extraction module is arranged to ensure that the extracted waveform sampling point is matched with the digital-to-analog converter. Furthermore, the digital filter is matched with the waveform sampling point extraction module in the invention, so that the output waveform sampling points can be matched with digital-to-analog converters with different performances. The device under test is provided with a high-resolution pulse width adjustable signal, the pulse width adjustable resolution is not limited by the time interval of the sampling clock, and the manufacturing cost is low.
Although illustrative embodiments of the present invention have been described above to facilitate the understanding of the present invention by those skilled in the art, it should be understood that the present invention is not limited to the scope of the embodiments, and various changes may be made apparent to those skilled in the art as long as they are within the spirit and scope of the present invention as defined and defined by the appended claims, and all matters of the invention which utilize the inventive concepts are protected.
Claims (3)
1. A high resolution pulse signal synthesizing apparatus, characterized in that: the device comprises an upper computer, a local interface, a parameter control module, a waveform sampling point generation module, a frequency divider, a digital filter, a waveform sampling point extraction module, a digital-to-analog converter and a low-pass filter;
the upper computer is connected with the parameter control module through a local interface and sets pulse parameters according to user requirementsCounting information, converting the set pulse parameter information into a data format matched with a local interface, decoding the data format by the local interface, and providing the decoded data format to the input end of the parameter control module; wherein the pulse parameter information comprises pulse signal frequency f and pulse width TwRising edge time TrFalling edge time TfHigh level VHLow level VLAnd the pulse width resolution t to be achieved;
the output end of the parameter control module is connected with the first input end of the waveform sampling point generation module and provides decoded pulse parameter information for the waveform sampling point generation module;
the external frequency value of the second input end of the waveform sampling point generation module is nfsThe sampling clock signal of (a); waveform sampling point generation module at frequency value nfsThe sampling clock signal is driven to carry out phase accumulation operation, and an original waveform sampling point is generated according to the phase accumulation operation result and is provided for a first input end of the digital filter;
the external frequency value of the second input end of the digital filter is nfsThe output end of the sampling clock is connected with the first input end of the waveform sampling point extraction module; digital filter pass frequency value of nfsThe high-frequency harmonic component in the original waveform sampling point is removed by the driving of the sampling clock, and the filtering processing of the original waveform sampling point is completed;
the frequency value of the input end receiving frequency of the frequency divider is nfsFor a frequency value of nfsThe sampling clock is subjected to frequency division to obtain a frequency value fsThe output end of the sampling clock is respectively connected with the waveform sampling point extraction module and the digital-to-analog converter;
the output end of the waveform sampling point extraction module is connected with the digital-to-analog converter, the filtered waveform sampling points are extracted through resampling, and the frequency value f is the received frequency valuesThe sampling clock signal converts the sampling frequency of the sampled waveform samples into fsTo achieve data synchronization with the digital-to-analog converter;
the digital-to-analog converter depends on the frequency value nfsThe sampling clock provides waveform samples for the waveform sample point extraction moduleThe point data is subjected to digital-analog conversion to generate an analog signal and the analog signal is provided for a low-pass filter circuit;
the low-pass filter performs low-pass filtering on the analog signal output by the digital-to-analog converter to remove the stray signal and outputs a relatively pure pulse waveform.
2. The high-resolution pulse signal synthesizing apparatus according to claim 1, characterized in that: the parameter control module also comprises a second output end and a third output end, wherein the second output end is connected with the digital filter, and the third output end is connected with the waveform sampling point extraction module; the parameter control module provides the decoded pulse parameter information to the waveform sampling point generation module, the digital filter and the waveform sampling point extraction module respectively.
3. The high-resolution pulse signal synthesizing apparatus according to claim 1, characterized in that: the detailed process of generating the original waveform sampling points by the waveform sampling point generating module comprises the following steps:
setting the initial value of phase accumulation as 1, resetting to 1 after the pulse signal period is reached, and circularly generating pulse waveform sampling points; in particular, at each frequency value nfsThe sampling clock signal of (2) carrying out accumulation operation on the K value to obtain a current value K of phase accumulation, comparing the current value K with a threshold value, selecting a corresponding calculation formula of a waveform section according to a comparison result, and substituting the calculation formula into the K to obtain a waveform sample value under the current phase:
when in use
And then selecting a rising edge waveform sampling point calculation formula:
when in use
When the current is over; selecting high-level waveform sampling points: vH；
When in use
When the current is over; selecting a calculation formula of the falling edge waveform sampling point:
when is as
Selecting low-level waveform sampling points: vL。
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| CN1753312B (en) * | 2005-10-14 | 2010-05-12 | 吕铁良 | Direct digital synthesis device of pulse signal and its method |
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