CN104867982B - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

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Publication number
CN104867982B
CN104867982B CN201510142874.5A CN201510142874A CN104867982B CN 104867982 B CN104867982 B CN 104867982B CN 201510142874 A CN201510142874 A CN 201510142874A CN 104867982 B CN104867982 B CN 104867982B
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layer
insulating layer
oxide semiconductor
oxide
semiconductor layer
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CN104867982A (en
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山崎舜平
宫永昭治
高桥正弘
岸田英幸
坂田淳郎
坂田淳一郎
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Semiconductor Energy Laboratory Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

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  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Electroluminescent Light Sources (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
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  • Liquid Crystal (AREA)
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Abstract

The present invention relates to semiconductor device and its manufacturing methods.Semiconductor device includes：The gate electrode layer of substrate；Gate insulating layer on the gate electrode layer；Oxide semiconductor layer on the gate insulating layer；Source electrode layer and drain electrode layer, each in the source electrode layer and the drain electrode layer are contacted with the oxide semiconductor layer；Insulating layer on the source electrode layer and the drain electrode layer, the insulating layer include oxygen and silicon；And the first area between the oxide semiconductor layer and the insulating layer, wherein the first area is comprising oxygen, silicon and is contained at least one of oxide semiconductor layer metallic element.

Description

Semiconductor device and its manufacturing method
The application be October 6, international application no PCT/JP2010/067997, national applications in 2010 applying date Number for 201080048595.8, the divisional application of the patent application of entitled " semiconductor device and its manufacturing method ".
Technical field
The present invention relates to a kind of semiconductor devices and its manufacturing method using oxide semiconductor.
Note that the semiconductor device in this specification refers to all devices that can utilize characteristic of semiconductor work, and Electro-optical device, semiconductor circuit and electronic device are semiconductor device.
Background technology
It is a kind of that thin film transistor (TFT) (TFT) is formed using the semiconductive thin film for being formed in the substrate with insulating surface Technology has been attract attention.Thin film transistor (TFT) is used for using LCD TV as the display device of Typical Representative.Based on silicon Semi-conducting material be it is known for suitable for thin film transistor (TFT) semiconductive thin film material, in addition to this oxide partly lead Body also results in the attention of people.
Known zinc oxide and contain the material that zinc oxide can be used as the oxide semiconductor as the material of its ingredient. In addition, it includes that electron carrier density is less than 10 to also disclose a kind of18/cm3Amorphous oxides (oxide semiconductor) it is thin Film transistor (referenced patent document 1 to 3).
[bibliography]
[patent document 1] Japanese Laid-Open Patent Application No.2006-165527
[patent document 1] Japanese Laid-Open Patent Application No.2006-165528
[patent document 1] Japanese Laid-Open Patent Application No.2006-165529
Invention content
But will occur deviateing the stoichiometric composition of oxide semiconductor in film formation process.For example, due to oxygen It is excessive or lack and change the conductivity of oxide semiconductor.In addition, entering oxide in the forming process of film The hydrogen or moisture of semiconductor form hydrogen-oxygen (O-H) key, and play a part of electron donor, this is one of conductivity variations Factor.Further, since O-H is polar molecule, thus it will lead to such as thin film transistor (TFT) formed using oxide semiconductor Active device characteristic variation.
In view of these problems, being designed to provide for one embodiment of the present of invention a kind of having stable electrical feature Semiconductor device including oxide semiconductor.
Include the variation of the electrical characteristics of the thin film transistor (TFT) of oxide semiconductor layer in order to prevent, is partly led from the oxide The removal of body layer causes the impurity of such as hydrogen of variation, moisture, hydroxyl or hydride (also known as hydrogen compound).
Being formed on oxide semiconductor layer has much using dangling bonds as the insulating layer of the defect of Typical Representative, and It is inserted into oxygen excess Mixed Zone or oxygen excess oxide insulating layer therebetween, thus makes such as hydrogen or wet in oxide semiconductor layer Gas (hydrogen atom or compound (such as H containing hydrogen atom2O impurity movement)) passes through the oxygen excess Mixed Zone or oxygen Excess oxide insulating layer, and be diffused into the defective insulating layer of tool.Thus, reduce the miscellaneous of oxide semiconductor layer Matter concentration.
Since the insulating layer with many defects is with (hydrogen atom contains the compound of hydrogen atom with hydrogen or moisture (such as H2O high combination energy)), and these impurity are stabilized in the insulating layer with many defects, thus this A little impurity can be diffused into from oxide semiconductor layer in the defective insulating layer of tool, and thus, it is possible to from oxide semiconductor Layer removes these impurity.
Further it is provided that the Mixed Zone between the oxide semiconductor layer and the defective insulating layer of tool or oxygen Compound insulating layer contains excessive oxygen, thus with many oxygen dangling bonds as defect, and have and such as hydrogen or moisture (hydrogen atom or compound (such as H containing hydrogen atom2O the high combination energy of impurity)).Therefore, in impurity from oxide When semiconductor layer is diffused into the defective insulating layer of tool, the oxygen excess Mixed Zone or oxygen excess oxide insulating layer play Promote the effect of diffusion.On the other hand, it is being removed from oxide semiconductor layer and is being diffused into the defective insulating layer of tool When interior impurity is moved back to oxide semiconductor layer, oxygen excess Mixed Zone or oxygen excess oxide insulating layer play protective layer The effect on (barrier layer) is combined with impurity and is made its stabilization, to prevent impurity from entering oxide semiconductor layer.
Thus, (hydrogen atom or compound containing hydrogen atom are (such as such as hydrogen or moisture in oxide semiconductor layer H2O in impurity diffusion)) to the oxygen excess Mixed Zone or oxygen excess oxide insulating layer.
Thus, the oxygen excess Mixed Zone or oxygen excess oxide insulating layer eliminate from oxide semiconductor layer and cause Such as hydrogen of variation, the impurity of moisture, hydroxyl or hydride (also known as hydrogen compound), and barrier layer is further acted as, It prevents the impurity having diffused into the defective insulating layer of tool to be again introduced into oxide semiconductor layer.Therefore, it is possible to make oxygen Compound semiconductor layer keeps low impurity concentration.
From the foregoing, it can be understood that include reducing cause variation such as hydrogen, moisture, hydroxyl or hydride (be otherwise known as hydrogen Compound) the thin film transistor (TFT) of oxide semiconductor layer of impurity there are stable electrical characteristics, thus include that the film is brilliant The semiconductor device of body pipe can realize height reliability.
The Mixed Zone refers to the material contained in oxide semiconductor layer and the defective insulating layer of tool above The Mixed Zone of the material inside contained.By providing the Mixed Zone so that oxide semiconductor layer and tool are defective It is not defined clearly at interface between insulating layer；Thus be conducive to hydrogen from oxide semiconductor layer be diffused into tool it is defective In insulating layer.For example, using silicon oxide layer as have defective insulating layer when, the Mixed Zone include oxygen, silicon and At least one of metallic element for including in oxide semiconductor layer.To oxygen excess oxide insulating layer, oxidation may be used Silicon layer (SiO2+x, wherein x is preferably greater than or equal to 0 and less than 3).The thickness of the Mixed Zone or oxide insulating layer can be 0.1nm to 30nm (preferably 2nm to 10nm).
It is preferred that reducing the film formation chamber of impurity concentration in the trapping-type vacuum pump depletion by using such as cryogenic pump The oxide semiconductor layer, oxygen excess Mixed Zone, oxygen excess oxide insulating layer are formed in (process chamber) and there is defect Insulating layer.To trapping-type vacuum pump, it is preferred to use such as cryogenic pump, ionic pump or titanium sublimation pump.The trapping-type vacuum pump Playing reduces the oxide semiconductor layer, oxygen excess Mixed Zone, oxygen excess oxide insulating layer and the defective insulation of tool The effect of the amount of hydrogen, water, hydroxyl or hydride in layer.
The oxide semiconductor layer, oxygen excess Mixed Zone, oxygen excess oxide insulating layer and the defective insulation of tool Each sputter gas for using is preferably high-pure gas in the forming process of layer, in the gas, make such as hydrogen, water, The impurity of hydroxyl or hydride is reduced to the degree that its concentration can be indicated as unit of ppm or ppb.
In the thin film transistor (TFT) of this disclosure, channel formation region is formed in oxide semiconductor layer, wherein Hydrogen is set as to be less than or equal to 5 × 1019/cm3, preferably smaller than it is equal to 5 × 1018/cm3, more preferably less than or equal to 5 × 1017/cm3； Remove dehydrogenation or O-H roots；And carrier concentration is less than or equal to 5 × 1014 cm3, preferably smaller than it is equal to 5 × 1012/cm3。
The energy gap of oxide semiconductor is set as to be more than or equal to 2eV, preferably greater than or equal to 2.5eV is more preferably greater than equal to 3eV for example, forming the hydrogen of alms giver, and the carrier concentration of oxide semiconductor is set as to be reduced as far as impurity Less than or equal to 1 × 1014/cm3, preferably smaller than it is equal to 1 × 1012/cm3。
When the oxide semiconductor so purified to be used for the channel formation region of thin film transistor (TFT), even in raceway groove Width be 10mm in the case of, the drain voltage of 1V and 10V and in -5V arrive -20V in the range of gate voltage under, also still It obtains and is less than or equal to 1 × 10-13The drain current of A.
One embodiment of the present of invention disclosed in this specification is a kind of semiconductor device comprising：In substrate it On gate electrode layer；Gate insulating layer on the gate electrode layer；Oxide on the gate insulating layer Semiconductor layer；Source electrode layer on the oxide semiconductor layer and drain electrode layer；And in the oxide half The defective insulation of tool contacted on conductor layer, source electrode layer and drain electrode layer and with the part oxide semiconductor layer Layer；Wherein, oxygen excess oxide insulating layer is provided between the oxide semiconductor layer and the defective insulating layer of tool.
Another embodiment of the present invention disclosed in this specification is a kind of semiconductor device comprising：In substrate it On gate electrode layer；Gate insulating layer on the gate electrode layer；Oxide on the gate insulating layer Semiconductor layer；Source electrode layer on the oxide semiconductor layer and drain electrode layer；And it is in the source electrode layer With the defective insulating layer of tool contacted on the drain electrode layer and with the part oxide semiconductor layer；Wherein, exist Interface between the oxide semiconductor layer and the defective insulating layer of tool provides oxygen excess Mixed Zone；Wherein, The defective insulating layer of tool includes silicon；And wherein, the oxygen excess Mixed Zone includes oxygen, silicon and the oxide At least one of metallic element contained in semiconductor layer.
In said structure, the protection insulating layer that covering has defective insulating layer can be provided.
Another embodiment of the present invention disclosed in this specification is a kind of manufacturing method of semiconductor device comprising： Gate electrode layer is formed in substrate and covers the gate insulating layer of the gate electrode layer, and the substrate is introduced into drop In process chamber under low pressure；Remove it is described handle indoor residual moisture while introduce and eliminate splashing for hydrogen and moisture It emanates body；It is formed on the gate insulating layer using the metal oxide target in the indoor offer of processing for eliminating moisture Oxide semiconductor layer；Source electrode layer and drain electrode layer are formed on the oxide semiconductor layer；It is formed by sputtering method The oxygen excess oxide contacted on the source electrode layer and the drain electrode layer and with the oxide semiconductor layer Insulating layer；The defective insulating layer of tool is formed on the oxygen excess oxide insulating layer by sputtering method；And to described Silicon, to make the hydrogen contained in the oxide semiconductor layer or moisture move through the oxygen excess insulated by oxide Layer, and be diffused into the defective insulating layer of tool.
Another embodiment of the present invention disclosed in this specification is a kind of manufacturing method of semiconductor device comprising： Gate electrode layer is formed in substrate and covers the gate insulating layer of the gate electrode layer, and the substrate is introduced into drop In process chamber under low pressure；Remove it is described handle indoor residual moisture while introduce and eliminate splashing for hydrogen and moisture It emanates body；Oxygen is formed on the gate insulating layer using the metal oxide target provided in the process chamber for eliminating moisture Compound semiconductor layer；Source electrode layer and drain electrode layer are formed on the oxide semiconductor layer；By sputtering method formed with The oxygen excess Mixed Zone of the oxide semiconductor layer contact and the defective insulating layer of tool, the defective insulation of tool Layer on the source electrode layer and drain electrode layer, and with the oxide semiconductor layer, the oxygen excess mixing Region is between tool defective insulating layer and the oxide semiconductor layer；To the silicon, to make The hydrogen contained in oxide semiconductor layer or moisture movement are stated by the oxygen excess Mixed Zone, and is diffused into described with scarce In sunken insulating layer.
In said structure, (can have at least in described being formed on the defective insulating layer of tool On the part Chong Die with the channel formation region in the oxide semiconductor layer of the insulating layer of defect) protection insulating layer Later or simultaneously, the impurity for executing such as hydrogen or moisture for making to include in oxide semiconductor layer is mixed by oxygen excess Region or oxygen excess oxide insulating layer are diffused into the heat treatment in the defective insulating layer of tool.At 100 DEG C to 400 DEG C The temperature of (or 150 DEG C to 400 DEG C) executes the heat treatment.
In the manufacturing method of above-mentioned semiconductor device, may be used contain zinc oxide be used as target as main component as In the target for forming oxide semiconductor film.Alternatively, the metal oxide for containing indium, gallium or zinc may be used as target.
In the manufacturing method of above-mentioned semiconductor device, the defective insulating layer of tool can be silicon oxide film.It can be with Using silicon target or synthetic quartz target as the target for being used to form silicon oxide film containing silicon.
At least one in above-mentioned purpose can be realized any one of using the above structure.
Note that using by InMO3(ZnO)mThe film of (m ＞ 0) uses the film as oxide semiconductor layer Thin film transistor (TFT) is formed as oxide semiconductor layer.Note that m indicates one or more in Ga, Fe, Ni, Mn and Co Metallic element.For example, M can be Ga, or it can also contain any of above metallic element other than Ga；For example, M can be Ga and Ni or Ga and Fe.In addition, in above-mentioned oxide semiconductor, in some cases, in addition to the contained gold as M Belong to other than element, the transition metal element of such as Fe or Ni or the oxide of the transition metal can also be contained, as miscellaneous Prime element.In the present specification, by InMO3(ZnO)m(m ＞ 0) is indicated in the oxide semiconductor layer of its ingredient expression formula, Ga will be contained and be known as the oxide semiconductor based on In-Ga-Zn-O as the oxide semiconductor of M, and In-Ga-Zn- will be based on The film of the oxide semiconductor of O is known as the film based on In-Ga-Zn-O.
For the metal oxide suitable for the oxide semiconductor layer, can also be applied down other than mentioned component State any one of oxide semiconductor：Based on In-Sn-O, based on In-Sn-Zn-O, based on In-Al-Zn-O, base In it is Sn-Ga-Zn-O, based on Al-Ga-Zn-O, based on Sn-Al-Zn-O, based on In-Zn-O, based on Sn-Zn-O, Metal oxide based on Al-Zn-O, based on In-O, based on Sn-O and based on Zn-O.It is aoxidized using above-mentioned metal It can contain silicon in the oxide semiconductor layer that object is formed.
The oxide semiconductor is preferably the oxide semiconductor containing In, the more preferably oxide containing In and Ga Semiconductor.In order to obtain i types (intrinsic) oxide semiconductor layer, dehydration or dehydrogenation are effective.
Furthermore, it is possible to form oxide conducting layer between oxide semiconductor layer and source electrode layer and drain electrode layer.It can To sequentially form the oxide conducting layer and be used to form the source electrode layer and the metal layer of drain electrode layer.
Since thin film transistor (TFT) is easy to because of damages such as electrostatic, thus preferably substrate identical with grid line or source electrode line it The protection circuit of thin film transistor (TFT) of the upper offer for protecting pixel portion.It is preferred that using including the non-thread of oxide semiconductor layer Property element forms the protection circuit.
Note that for convenience's sake, using such as first and second ordinal number in the present specification, but it is not indicated that The sequence of step and the stacking order of layer.In addition, the ordinal number in this specification be not offered as to the present invention make as defined in it is specific Title.
It is capable of providing a kind of semiconductor device including oxide semiconductor with stable electrical characteristics.
Description of the drawings
Figure 1A to 1E shows a kind of semiconductor device and its manufacturing method.
Fig. 2A to 2D shows a kind of semiconductor device and its manufacturing method.
Fig. 3 A to 3E show a kind of semiconductor device and its manufacturing method.
Fig. 4 A to 4C show a kind of semiconductor device and its manufacturing method.
Fig. 5 A to 5E show a kind of semiconductor device and its manufacturing method.
Fig. 6 A to 6D show a kind of semiconductor device and its manufacturing method.
Fig. 7 shows a kind of semiconductor device.
Fig. 8 A to 8C show a kind of semiconductor device.
Fig. 9 is a kind of pixel equivalent circuit figure of semiconductor device.
Figure 10 A to 10C are each to all illustrate a kind of semiconductor device.
Figure 11 A and 11B show a kind of semiconductor device.
Figure 12 shows a kind of semiconductor device.
Figure 13 A and 13B is each to all illustrate a kind of electronic device.
Figure 14 A and 14B is each to all illustrate a kind of electronic device.
Figure 15 shows a kind of electronic device.
Figure 16 shows a kind of electronic device.
Figure 17 shows electronic devices.
Figure 18 shows a kind of semiconductor device.
Figure 19 is the longitdinal cross-section diagram for the reversion alternating expression thin film transistor (TFT) for including oxide semiconductor.
Figure 20 A and 20B are the energy band diagrams (schematic diagram) in the sections A-A' shown in Figure 19.
Figure 21 A show that the state for applying positive potential (+VG) to grid (G1), Figure 21 B are shown to the grid (G1) Apply the state of negative potential (- VG).
Figure 22 shows relationship between vacuum level and the work function (φ M) of metal and vacuum level and oxide Relationship between the electron affinity (χ) of semiconductor.
Specific implementation mode
The embodiment of the present invention will hereinafter be described in detail with reference to the attached drawings.Note that the present invention is not limited to following the description, this Field technology personnel, which will readily appreciate that, by various modes to modify to pattern and details.It therefore, should not be by this Invention is construed to be limited by the description of embodiments given below.
(embodiment 1)
In this embodiment, the embodiment of a kind of semiconductor device and its manufacturing method will be described with reference to figure 1A to 1E. The semiconductor device described in this embodiment is thin film transistor (TFT).
Figure 1A to 1E shows the example of the cross section structure of semiconductor device.Thin film transistor (TFT) 110 shown in Figure 1A to 1E With a kind of bottom grating structure type, be otherwise known as reversion alternating expression thin film transistor (TFT).
Thin film transistor (TFT) 110 shown in Figure 1A to 1E includes the gate electrode on the substrate 100 with insulating surface Layer 111, gate insulating layer 102, oxide semiconductor layer 112, oxygen excess Mixed Zone 119, source electrode layer 115a and drain electrode Layer 115b.In addition, additionally providing the defective insulating layer 116 of tool, thin film transistor (TFT) 110 and and oxide semiconductor are covered Layer 112 is overlapped, and oxygen excess Mixed Zone 119 is between the two, in addition, also being provided on defective insulating layer 116 having Protection insulating layer 103.
Since oxygen excess Mixed Zone 119 and the defective insulating layer 116 of tool have and hydrogen or moisture (hydrogen atom or packet Include compound (such as H of hydrogen atom2O high combination energy)), and these impurity are stabilized in oxygen excess Mixed Zone 119 And have in defective insulating layer 116, thus these impurity can be diffused into oxygen excess Mixed Zone from oxide semiconductor layer 119 and have in defective insulating layer 116, thus, it is possible to remove these impurity from oxide semiconductor layer.In addition, oxygen excess is mixed It closes region 119 and plays a part of the barrier layer for having the impurity in defective insulating layer 116 to having diffused into, it is miscellaneous to prevent Matter is again introduced into oxide semiconductor layer 112；Thus, it is possible to which oxide semiconductor layer 112 is made to keep low impurity concentration.Therefore, Impurity including wherein reducing such as hydrogen that causes variation, moisture, hydroxyl or hydride (be otherwise known as hydrogen compound) The thin film transistor (TFT) 110 of oxide semiconductor layer 112 is a kind of highly reliable thin film transistor (TFT) with stable electrical characteristics.
Figure 19 is the longitdinal cross-section diagram for the reversion alternating expression thin film transistor (TFT) for including oxide semiconductor.In gate electrode (GE1) oxide semiconductor layer (OS) is provided on, gate insulating film (GI) is inserted into therebetween, and provides source electrode on it (S) and drain electrode (D).
Figure 20 A and 20B are the energy band diagrams (schematic diagram) in the sections A-A' shown in Figure 19.Figure 20 A show the source of being applied to The current potential of the voltage of pole is equal to the case where current potential (VD=0V) for the voltage for being applied to drain electrode, and Figure 20 B, which are shown to drain electrode, to be applied The case where positive potential (VD ＞ 0) relative to source electrode.
Figure 21 A and 21B are the energy band diagrams (schematic diagram) along the sections B-B' of Figure 19.Figure 21 A show to grid (G1) and apply Add positive potential (+VG), and conducting (on) state that carrier (electronics) flows between source electrode and drain electrode.Figure 21 B are shown Apply negative potential (- VG), and cut-off (off) state that few sub- carrier does not flow to grid (G1).
Figure 22 shows relationship between vacuum level and the work function (φ M) of metal and vacuum level and oxide Relationship between the electron affinity (χ) of semiconductor.
Since the electronics in metal at room temperature fails, thus fermi level is located in conduction band.On the contrary, regular oxidation Object semiconductor is usually N-shaped, and the present position fermi level (Ef) is more nearly conduction band in this case, and far from energy Intrinsic Fermi level (Ei) among band gap.Pay attention to, it is well known that part hydrogen is to contribute applying for electronics in oxide semiconductor A main factor is that conventional oxide semiconductor is N-shaped oxide semiconductor.Pay attention to, it is well known that make conventional oxide Semiconductor is that one of the factor of N-shaped oxide semiconductor is, the part hydrogen in oxide semiconductor becomes contribution electronics Alms giver.
On the other hand, oxide semiconductor according to the present invention is intrinsic (i types) or substantially intrinsic oxide half Conductor, acquisition pattern is hydrogen of the removal as p-type impurity from oxide semiconductor, and makes the oxide semiconductor height Purifying, to prevent from making as much as possible wherein containing the impurity for the main component for being not oxide semiconductor.In other words, not By adding impurity highly purified i types (intrinsic) semiconductor is obtained by removing the impurity of such as hydrogen or water as much as possible Or close semiconductor.This can make fermi level (Ef) be in intrinsic Fermi level (Ei) identical energy level or base This identical energy level.
It is said that in the case where the band gap (Eg) of oxide semiconductor is 3.15eV, electron affinity (χ) is 4.3eV. The work function for being used to form the titanium (Ti) of source electrode and drain electrode is substantially equal to the electron affinity of the oxide semiconductor (χ).In this case, the interface between metal and oxide semiconductor does not form the Schottky barrier for electronics.
In other words, it is equal to each other in the electron affinity (χ) of the work function of metal (φ M) and oxide semiconductor, and In the case that the metal and the oxide semiconductor contact with each other, energy band diagram as shown in FIG. 20 A (schematic diagram) is obtained.
In Figure 20 B, black dot () indicates electronics.When applying positive potential to drain electrode, electronics crosses potential barrier (h) note Enter into oxide semiconductor, and is flowed towards drain electrode.In this case, the height (h) of potential barrier is according to gate voltage and electric leakage Pressure changes；In the case where applying positive drain voltage, the height (h) of the potential barrier is less than in Figure 20 A of no applied voltage Potential barrier height, i.e. the 1/2 of band gap (Eg).
In this case, as illustrated in fig. 21, electronics is partly led along in gate insulating film and highly purified oxide The lowermost portion of the oxide semiconductor of the energy stabilization of interface between body moves.
In Figure 21 B, when applying negative potential (reverse bias) to grid (G1), the number in the hole as minority carrier It measures substantially zeroed；Thus current value becomes the value extremely close to zero.
For example, even if having 1 × 10 in the thin film transistor (TFT)4μm channel width W and when 3 μm of channel length, 10 can be obtained-13Subthreshold value (S values) (thickness of gate insulating film of A or lower cut-off currents and 0.1V/dec.： 100nm)。
As described above, keeping the oxide semiconductor highly purified, it is not to prevent from making as much as possible wherein containing The impurity of the main component of the oxide semiconductor, thus, it is possible to obtain the excellent operation of thin film transistor (TFT).
Although thin film transistor (TFT) 110 is described as single grid thin film transistor (TFT), can also be formed if necessary including The multi-grid electrode film transistor of multiple channel formation regions.
Hereinafter, the process of thin film transistor (TFT) 110 will be manufactured on substrate 100 with reference to figure 1A to 1E descriptions.
First, conductive film is formed on the substrate 100 with insulating surface, later, is formed by the first lithography step Gate electrode layer 111.Preferably, the end section for being formed by gate electrode layer is tapered, and is formed in because can improve in this way The covering of gate insulating layer thereon.Note that Etching mask can be formed by ink-jet method.Resist is formed by ink-jet method Mask will be without photomask；Manufacturing cost thus can be reduced.
Although the substrate to the substrate 100 that may be used as having insulating surface does not limit specifically, the substrate It is still necessary to the heat resistance for being at least sufficient to resist the heat treatment executed below.It may be used by barium borosilicate glass, aluminium The glass substrate of borosilicate glass etc..
For glass substrate, if the temperature of the heat treatment executed below is high, preferably use strain point for 730 DEG C Or higher glass substrate.For glass substrate, for example, using such as alumina silicate glass, aluminium borosilicate glass or barium The glass material of borosilicate glass.Note that by make containing barium monoxide (BaO) amount be higher than boron oxide amount, can obtain Obtain heat-resisting and more practical glass substrate.It is therefore preferable that using contained BaO ratios B2O3More glass substrates.
Note that may be used the substrate of such as ceramic substrate, quartz substrate or Sapphire Substrate formed by insulator Lai Instead of above-mentioned glass substrate.Alternatively, crystallized glass etc. may be used.In addition, alternatively, plastic lining may be used in due course Bottom etc..
Insulating film as basilar memebrane can be provided between substrate 100 and gate electrode layer 111.The basilar memebrane has anti- The effect that only impurity element is spread from substrate 100, and can form it into single layer or laminated construction, the structure Including one or more of silicon nitride film, silicon oxide film, silicon oxynitride film and oxygen silicon nitride membrane.
Gate electrode layer 111 can be formed to have single layer or laminated construction, use metal material as its mainly at Point, the metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminium, copper, neodymium or scandium, or include any material in these materials Make alloy material as main component.
For example, for the gate electrode layer 111 of double-layer structure, it is preferred to use form two layers of knot of molybdenum layer on aluminium layer Structure, the double-layer structure that molybdenum layer is formed on layers of copper, the double-layer structure for forming on layers of copper titanium nitride layer or tantalum nitride layer or Person forms the double-layer structure of molybdenum layer on titanium nitride layer.For three-decker, it is preferred to use be stacked tungsten layer or tungsten nitride layer, The laminated construction of the layer and titanium nitride layer or titanium layer of the alloy or aluminium of aluminium and silicon and the alloy of titanium.Note that may be used Light guide electrolemma forms gate electrode layer.Example of the light transmitting conductive oxide as transparency conducting film can be provided.
Later, gate insulating layer 102 is formed on gate electrode layer 111.
Gate insulating layer 102 can be formed to have single layer or lamination knot by plasma CVD method or sputtering method etc. Structure comprising silicon oxide layer, silicon nitride layer, silicon oxynitride layer, silicon oxynitride layer, alumina layer, aln layer, aluminium oxynitride Layer, nitrogen oxidation aluminium layer or hafnium oxide layer.Gate insulating layer 102 contains a large amount of hydrogen in order to prevent, is preferably formed by sputtering method Gate insulating layer 102.When forming silicon oxide film by sputtering method, target is used as using silicon target or quartzy target, and use oxygen or The mixed gas of person's oxygen and argon gas is as sputter gas.
Gate insulating layer 102 can have laminated construction, in the laminated construction, by suitable on gate electrode layer 111 Sequence is stacked silicon nitride layer and silicon oxide layer.For example, the gate insulator of the thickness with 100nm can be formed in this way Layer, the mode is that is, form silicon nitride layer (SiNy (the y ＞ of the thickness with 50nm to 200nm (containing end value) by sputtering method 0) it) is used as first grid insulating layer, and is formed with 5nm to 300nm's (containing end value) on the first grid insulating layer Silicon oxide layer (the SiO of thicknessx(x ＞ 0)) it is used as second grid insulating layer.It can be appropriate according to expected tft characteristics The thickness of gate insulating layer is arranged in ground.The thickness can be about 350nm to 400nm.
In addition, in order to make to contain hydrogen, hydroxyl in gate insulating layer 102 and oxide semiconductor film 120 as few as possible And moisture, to foring the substrate 100 of gate electrode layer 111 thereon or being formed thereon preferably in the pre-add hot cell of sputtering equipment Until multiple layers of substrate 100 of gate insulating layer 102 preheats, in this, as the pretreatment formed for film, in this way quilt Being absorbed into the impurity of such as hydrogen or moisture of substrate 100 will be removed or be discharged.It (is arrived note that the pre-warmed temperature is 100 DEG C 400 DEG C (containing end value), preferably 150 DEG C to 300 DEG C (containing end value).It is preferred that using cryogenic pump as the pumping provided for pre-add hot cell Vacuum plant.Pay attention to, it is convenient to omit this pre-add is heat-treated.Furthermore, it is possible to before formation has defective insulating layer 116, In a similar way to being formed on until multiple layers of the substrate 100 of source electrode layer 115a and drain electrode layer 115b executes The pre-add is heat-treated.
Later, being formed on gate insulating layer 102, there is the oxide of the thickness of 2nm to 200nm (containing end value) partly to lead Body film 120 (referring to Figure 1A).
Note that by sputtering method formed oxide semiconductor film 120 before, preferably by wherein introduce argon gas and The reverse sputtering (reverse sputtering) for generating plasma removes the dust on the surface for being attached to gate insulating layer 102. Reverse sputtering refers to such a method, in the method, in the case where not applying voltage to target side, using RF power supply in argon Apply voltage to substrate side in atmosphere, to generate plasma in substrate proximity, to change surface.Note that may be used nitrogen, Helium, oxygen etc. replace argon atmospher.
Oxide semiconductor film 120 is formed by sputtering method.For oxide semiconductor film 120, using based on In-Ga- The film of Zn-O, the oxide semiconductor film based on In-Al-Zn-O, is based on the oxide semiconductor film based on In-Sn-Zn-O The oxide semiconductor film of Sn-Ga-Zn-O, the oxide semiconductor film based on Al-Ga-Zn-O, the oxygen based on Sn-Al-Zn-O Compound semiconductor film, the oxide semiconductor film based on Sn-Zn-O, is based on Al- at the oxide semiconductor film based on In-Zn-O The oxide semiconductor film of Zn-O, the oxide semiconductor film based on In-O, oxide semiconductor film or base based on Sn-O In the oxide semiconductor film of Zn-O.In this embodiment, it is aoxidized using the metal based on In-Ga-Zn-O by sputtering method Object target forms oxide semiconductor film 120.Furthermore, it is possible to by sputtering method in rare gas (being usually argon gas) atmosphere, oxygen Oxide semiconductor film 120 is formed in atmosphere or rare gas (being usually argon gas) and the atmosphere of oxygen.Using sputtering method In the case of film forming, the SiO for including 2wt% to 10wt% (containing end value) may be used2Target.
The sputter gas used in the forming process of oxide semiconductor film 120 is preferably high-pure gas, wherein makes The impurity of such as hydrogen, water, hydroxyl or hydride is reduced to the degree that its concentration can be indicated as unit of ppm or ppb.
For forming target used by oxide semiconductor film 120 by sputtering method, may be used including zinc oxide conduct The metal oxide target of its main component.Another example for the metal oxide target that may be used is the gold for including In, Ga and Zn Belonging to oxide target (has In2O3:Ga2O3:ZnO=1:1:The ingredient ratio of 1 [molar ratio]).For the metal including In, Ga and Zn Oxide target may be used with In2O3:Ga2O3:ZnO=1:1:The ingredient of 2 [molar ratios] than target or have In2O3: Ga2O3:ZnO=1:1:The ingredient of 4 [molar ratios] than target.The fill factor of the metal oxide target is 90% to 100% (containing end value), preferably 95% to 99.9% (containing end value).The case where using the metal oxide target with high fill-factor Under, being formed by oxide semiconductor film has high density.
The substrate is placed into the process chamber under the pressure reduced, and is heated to the temperature less than 400 DEG C Degree.While removing moisture remaining in process chamber, the sputter gas for eliminating hydrogen and moisture is introduced, to be aoxidized using metal Object is that target forms oxide semiconductor film 120 on substrate 100.In order to remove moisture remaining in process chamber, it is preferred to use Trapping-type vacuum pump.For example, it is preferable to using cryogenic pump, ionic pump or titanium sublimation pump.Vacuum extractor can be provided with cold-trap Turbine pump.In the film formation chamber using low temperature pump depletion, for example, hydrogen atom, compound (such as H comprising hydrogen atom2O)、 And the compound comprising carbon atom is discharged.Correspondingly, the oxide semiconductor formed in the film formation chamber can be reduced The concentration of the impurity contained in film.
Formation for oxide semiconductor film, not only in the process chamber for being used to form oxide semiconductor film, but also The step of before and after forming the film contacted with the oxide semiconductor film, is used and forms the oxide half In the step of before and after electrically conductive film process chamber used, it is preferably to using the vacuum extractor of such as cryogenic pump, to prevent The impurity of remaining moisture is mixed into oxide semiconductor film in such as process chamber.
As the example of film formation condition, using following conditions：The distance between substrate and target are 100mm, and pressure is 0.6Pa, direct current (DC) power supply are 0.5kW, and atmosphere is oxygen atmosphere (ratio of oxygen flow is 100%).It is preferred that using pulse Direct current (DC) power supply, because the powdered rubber (be otherwise known as particle or dust) generated in film forming process can be reduced, and And film thickness can be made uniform.Thickness of the oxide semiconductor film preferably with 5nm to 30nm (containing end value).Note that institute The thickness for stating oxide semiconductor film changes according to material；Therefore thickness can be determined according to material.
By using for example above-mentioned formation oxide semiconductor film 120 of sputtering method, the oxidation with low hydrogen concentration can be obtained Object semiconductor film.The hydrogen concentration provided in the present specification is the quantitative result obtained by secondary ion mass spectrometry (SIMS).
The example of sputtering method includes being sputtered using RF sputtering method of the high frequency electric source as shielding power supply, the DC using DC power supply Method and the pulse DC sputtering methods for applying biasing in a pulsed fashion.RF sputtering methods are mainly used in the case where forming insulating film, DC sputtering methods are mainly used in the case where forming metal film.
In addition, there is the multi-source sputtering equipment for the target that multiple and different materials can be arranged.Using the multi-source sputtering equipment, The film of different materials can be formed in same room so that it is stacked, or by discharging while multiple material in same room Form film.
In addition, there is the sputtering equipment for magnetron sputtering method being equipped with positioned at indoor magnet system, and it is used for The sputtering equipment of ECR sputtering methods, in ECR sputtering methods, using the plasma generated using microwave without using glow discharge.
In addition, being taken as the film forming method of sputtering method, also its target substances and sputter gas ingredient are formed in film Chemical reaction mutually occurs in the process to form the reactive sputtering of its compound film, and wherein in film forming process Alive bias sputtering method is applied to substrate.
Later, the oxide semiconductor film is processed by island oxide semiconductor layer 121 by the second lithography step (referring to Figure 1B).Note that the resist that can be used to form the island oxide semiconductor layer 121 by ink-jet method formation is covered Mould.Etching mask is formed without photomask by ink-jet method；Manufacturing cost thus can be reduced.
In the case of forming contact hole in gate insulating layer 102, it can be executed when forming oxide semiconductor layer 121 The step.
Oxide semiconductor film can be executed by dry etching, wet etching or both wet etching and dry etching 120 etching.
As the etching gas for dry etching, it is preferred to use gas (gas based on chlorine, such as chlorine containing chlorine (Cl2), boron chloride (BCl3), silicon chloride (SiCl4) or carbon tetrachloride (CCl4))。
Furthermore, it is possible to using gas (gas based on fluorine, such as carbon tetrafluoride (CF containing fluorine4), sulfur fluoride (SF6)、 Nitrogen fluoride (NF3) or fluoroform (CHF3)), hydrogen bromide (HBr), oxygen (O2) or be added to such as helium (He) Or any of these gases of rare gas etc. of argon gas (Ar).
As dry etching method, parallel-plate reactive ion etching (RIE) method or inductive couple plasma may be used Body (ICP) etching method.In order to which film is etched into desired shape, suitably adjusts etching condition and (be applied to ine ring-shaped electrode The amount of electrical power, the amount of the electrical power for the electrode being applied in substrate side, the temperature etc. of electrode in substrate side).
As the etchant for wet etching, obtained by mixed phosphate, acetic acid and nitric acid for example, may be used Solution and the ammonia peroxide mixture (aquae hydrogenii dioxidi of 31wt%：The ammonium hydroxide of 28wt%：Water=5:2:2) etc..In addition, also ITO-07N (being produced by KANTO CHEMICAL CO., INC.) may be used.
After wet etching, etchant is removed together with the material etched away by cleaning.Can make containing etchant and The waste liquid of the material etched away purifies, and the material can re-use.Oxide semiconductor is collected from the waste liquid after etching The material for such as indium for including in layer, and it is re-used, thus, it is possible to effectively utilize resource, and can reduce Manufacturing cost.
Etching condition (for example, etchant, etching period and temperature) is suitably adjusted according to material, so as to will be described Film is etched into desired shape.
Note that it is preferred that the reverse sputtering is executed before forming conductive film by subsequent step, to be removably attached oxidation Resist residual on the surface of object semiconductor layer 121 and gate insulating layer 102 etc..
Later, conductive film is formed on gate insulating layer 102 and oxide semiconductor layer 121.Sputtering method can be passed through Or vacuum vapour deposition forms the conductive film.As the material of second conductive film, can provide selected from aluminium (Al), chromium (Cr), the element of copper (Cu), tantalum (Ta), titanium (Ti), molybdenum (Mo) and tungsten (W), contain any element in these elements be used as at The alloy divided or the alloy etc. of the combination containing any element in these elements.Furthermore, it is possible to using selected from manganese (Mn), One or more materials in magnesium (Mg), zirconium (Zr), beryllium (Be) and thorium (Th).In addition, the metal conductive film can have list Layer structure or the laminated construction being made of two or more layers.For example, the single layer being made of the aluminium film containing silicon can be provided Structure, the double-layer structure that titanium film has been stacked on aluminium film, the three-decker for being stacked titanium film, aluminium film and titanium film in order.Or Person may be used containing aluminium (Al) and be selected from titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd) and scandium (Sc) In one or more elements film, alloy film or nitride film.
By third lithography step, Etching mask is formed on the conductive film, and selectively execute etching；From And form source electrode layer 115a and drain electrode layer 115b.Later, removal Etching mask (referring to Fig. 1 C).
Using ultraviolet light, KrF laser or ArF laser for exposure, the exposure is for shape in the third photolithography step At Etching mask.Below thin film transistor (TFT) to be formed channel length L depend on oxide semiconductor layer 121 Interval width between source electrode layer bottom and drain electrode layer bottom adjacent to each other.Note that the ditch Taoist priest less than 25nm When spending L execution exposures, using the deep uv exposure of the extremely short wavelength with several nanometers to several tens of nanometers, in third light It carves in step and forms Etching mask.High-resolution and big pentrution will be obtained using deep uv exposure.Therefore, it is possible to incite somebody to action Below the channel length L of thin film transistor (TFT) to be formed be set as 10nm to 1000nm (contain end value).Thus, it is possible to improve circuit Arithmetic speed, and since OFF-state current is minimum, it is thus possible to realize low-power consumption.
Note that each material and etching condition can be suitably adjusted, so that will not be removed because etching conductive film Oxide semiconductor layer 121.
In this embodiment, it using Ti films as conductive film, is partly led as oxide using the layer based on In-Ga-Zn-O Body layer 121 is used as etchant using the hydrogen peroxide ammonia mixture of water and hydrogen peroxide (ammonia).
Note that in the third photolithography step, in some cases, part erosion can be carried out to oxide semiconductor layer 121 It carves, becomes the oxide semiconductor layer with groove (sunk part).It can be formed by ink-jet method and be used to form source electricity The Etching mask of pole layer 115a and drain electrode layer 115b.Etching mask is formed without photomask by ink-jet method；Cause And manufacturing cost can be reduced.
In addition, in order to reduce the quantity of the photomask used in lithography step, and the quantity of lithography step is reduced, it can be with Etching step is executed using masstone mask, the masstone mask is the exposure for making to have multiple intensity by the light of its transmission Mask.There are multiple thickness using the Etching mask that masstone mask is formed, and its shape can also be changed by etching, It can thus use it in multiple etching steps, to provide different patterns.It is therefore possible to use a masstone mask is come Form the Etching mask corresponding at least two different patterns.Thus, it is possible to the quantity of exposed mask is reduced, but also can The quantity for reducing corresponding lithography step, thus, it is possible to realize the simplification of process.
It can execute using such as N2O、N2Or the exposure of the corona treatment removal oxide semiconductor layer of the gas of Ar The water etc. of Surface absorption.The mixed gas that oxygen and argon gas may be used executes corona treatment.
Later, it is formed on oxide semiconductor layer 121 in the case where being not exposed to air and has defective insulation Layer 116.In the forming process for having defective insulating layer 116, in oxide semiconductor layer 121 and has defective insulating layer Oxygen excess Mixed Zone 119 is formed between 116 (referring to Fig. 1 D).In this embodiment, have defective insulating layer 116 to be formed It is Chong Die with oxide semiconductor layer 121, and wherein oxide semiconductor layer 121 between them not with source electrode layer 115a or Oxygen excess Mixed Zone 119 is provided in the region of drain electrode layer 115b overlappings.
The Mixed Zone refers to the material for including and the defective insulating layer of tool above in oxide semiconductor layer In include material Mixed Zone.By providing the Mixed Zone so that oxide semiconductor layer and tool are defective absolutely Interface between edge layer is not limited clearly；Thus be conducive to hydrogen from oxide semiconductor layer be diffused into tool it is defective absolutely In edge layer.For example, when using silicon oxide layer as having defective insulating layer, the Mixed Zone includes oxygen, silicon and oxygen At least one of the metallic element for including in compound semiconductor layer.
For in the embodiment, it is being used for silica to have defective insulating layer 116, and using based on In-Ga- In the case that the film of Zn-O is as oxide semiconductor, Mixed Zone 119 include oxygen, silicon and selected from In, Ga and Zn at least A kind of metallic element.Metal in oxide semiconductor may exist in Mixed Zone 119 with various states；By oxide half The metal for including in conductor is known as M, and the metal in Mixed Zone 119 can be expressed as M-OH, M-H, M-O-Si-H and M- by side O-Si-OH, especially specifically, Zn-H, Zn-OH etc..
It Mixed Zone 119 can be with the thickness of 0.1nm to 30nm (preferably 2nm to 10nm).There is defect being formed Insulating layer 116 when can pass through the film formation condition of sputtering method control Mixed Zone 119 thickness.If in the sputtering method It is middle that higher is arranged to obtain in power supply, and the distance between substrate and target are arranged shorter, then Mixed Zone 119 can be formed It obtains thicker.When implementing to carry out sputtering method with higher power supply, it can remove and absorb on the surface of oxide semiconductor layer 121 Water etc..
Offer Mixed Zone 119 is conducive to aoxidize between oxide semiconductor layer 121 and the defective insulating layer 116 of tool The hydrogen atom for including in object semiconductor layer 121, compound (such as H containing hydrogen atom2O), the compound etc. containing carbon atom It is diffused into and has in defective insulating layer 116.
Mixed Zone 119 needs to include excessive oxygen, therefore the Mixed Zone is using the sputtering containing a large amount of oxygen What gas was formed, to provide oxygen excess region, and after forming Mixed Zone 119, the oxygen in sputter gas can be adjusted Amount, have defective insulating layer 116 to be formed.
As the replacement of silicon oxide layer, silicon oxynitride layer, alumina layer or oxynitriding aluminium layer etc., which may be used, and be used as has The insulating layer 116 of defect.Further, it is also possible to using conducts such as silicon nitride layer, silicon oxynitride layer, aln layer, nitrogen oxidation aluminium layers Has defective insulating layer 116.
In this embodiment, in order to form the oxygen excess Mixed Zone and silicon oxide layer, will be formed on until Multiple layers of substrate 100 of island oxide semiconductor layer 121, source electrode layer 115a and drain electrode layer 115b be heated to room temperature or Person is less than 100 DEG C of temperature, introduces the sputter gas containing high purity oxygen for eliminating hydrogen and moisture, and use silicon target.
The sputter gas used in the forming process for having defective insulating layer 116 is preferably high-pure gas, in institute It states in gas, its concentration can be indicated as unit of ppm or ppb by so that the impurity of such as hydrogen, water, hydroxyl or hydride is reduced to Degree.
For example, forming silicon oxide film by pulse DC sputtering methods according to following conditions：Using the boron-doping of the purity with 6N Silicon target (resistivity be 0.01 Ω cm)；The distance between substrate and target (T-S distances) are 89mm；Pressure is 0.4Pa, direct current (DC) power supply is 6kW, and atmosphere is oxygen (ratio of oxygen flow is 100%).Film thickness is 300nm.Note that stone may be used English (preferably synthetic quartz) replaces silicon target as the target for being used to form silicon oxide film.Oxygen or oxygen and argon gas may be used Mixed gas as sputter gas.
It is preferred that forming Mixed Zone 119 while the residual moisture in removing process chamber and having defective insulating layer 116, to make oxide semiconductor layer 121, Mixed Zone 119 or have not including hydrogen, hydroxyl in defective insulating layer 116 Or moisture.
Mixed Zone 119 is formed note that silicon oxynitride, aluminium oxide or aluminium oxynitride etc. may be used and substitute silica.
Later, it contacts with each other with oxide semiconductor layer 121 in the defective insulating layer 116 of tool, and oxygen excess mixes In the state that region 119 is interposed therebetween, heat treatment is executed in 100 DEG C to 400 DEG C of temperature.The heat treatment can make oxide half The hydrogen or moisture diffusion contained in conductor layer 121 is to oxygen excess Mixed Zone 119 and has in defective insulating layer 116.Due to Having oxygen excess Mixed Zone 119, thus island are provided between defective insulating layer 116 and oxide semiconductor layer 121 Such as impurity of hydrogen, hydroxyl or moisture contained in oxide semiconductor layer 121 is diffused into oxygen from oxide semiconductor layer 121 It is diffused into excessive Mixed Zone 119 or by the oxygen excess Mixed Zone 119 and is had in defective insulating layer 116.
Contain excessively the Mixed Zone 119 for being set to oxide semiconductor layer 121 and having between defective insulating layer 116 Oxygen, thus with many oxygen dangling bonds as defect, and have miscellaneous with such as hydrogen, moisture, hydroxyl or hydride The high combination energy of matter.The offer of oxygen excess Mixed Zone 119 promote such as hydrogen contained in oxide semiconductor layer 121, Moisture, hydroxyl or hydride impurity diffusion and be moved in the defective insulating layer of tool 116.
In addition, by from the impurity that oxide semiconductor layer 121 removes and is diffused into having defective insulating layer 116 to When oxide semiconductor layer 121 moves back, oxygen excess Mixed Zone 119 plays a part of protective layer (barrier layer), with impurity knot Merging makes its stabilization, to prevent impurity from entering oxide semiconductor layer 121.
As described above, causing such as hydrogen, moisture, hydroxyl or the hydrogen of variation by being removed from oxide semiconductor layer 121 The impurity of compound is capable of providing the oxide semiconductor layer 112 of the impurity with reduction.In addition, playing a part of barrier layer Oxygen excess Mixed Zone 119 prevents the impurity for having diffused into and having in defective insulating layer 116 to be again introduced into oxide half Conductor layer 112；Oxide semiconductor layer 112 can be thus set to keep low impurity concentration.
The oxygen excess Mixed Zone being set between oxide semiconductor layer and the defective insulating layer of tool or oxygen excess oxygen Compound insulating layer contains excessive oxygen, thus with many oxygen dangling bonds as defect.In view of hydrogen is from oxide semiconductor Diffusion of the layer into the defective insulating layer of such tool, calculate hydrogen atom more likely there are it is (non-in oxide semiconductor layer Brilliant IGZO) and defective insulating layer (the amorphous SiO of toolx) which of in.
Such as give a definition the combination energy E_bind of hydrogen atom, to estimate the stability of the hydrogen atom in environment.
E_bind={ E (prototype structure)+E (H) }-E (structure with H)
The E_bind of the combination becomes bigger, hydrogen atom more there may be.E (prototype structure), E (H) and E (have H's Structure) energy of the energy of prototype structure, the energy of hydrogen atom and the structure with H is indicated respectively.Calculate four samples In conjunction with energy：Amorphous IGZO, the amorphous SiO for not having dangling bonds (hereinafter referred to as DB)2And two kinds of amorphous SiO with DBx。
Implement to calculate using CASTEP, CASTEP is a kind of program for Density Functional Theory.As for density letter The method of mathematics opinion uses plane wave basis pseudopotential (plane wave basis pseudopotential) method.Using LDA As function.Cut-off (cut-off) energy is 300eV.Use 2 × 2 × 2 grid K point grids.
Calculated structure is described below.First, prototype structure is described.The structure cell (unit cell) of amorphous IGZO is total Include 84 atom altogether：12 In atoms, 12 Ga atoms, 12 Zn atoms and 48 O atoms.Amorphous SiO without DB2 Structure cell in total include 48 atoms：16 silicon atoms and 32 O atoms.Amorphous SiO with DBx(1) there is such knot Structure, wherein from the amorphous SiO without DB2Remove an O atom, and the Si atom key that the O atom will be bonded in the past It is bonded to H；That is, it includes 48 atoms in total：16 Si atoms, 31 O atoms and 1 H atom.Amorphous with DB SiOx(2) it has a structure in which, wherein from the amorphous SiO without DB2A Si atom is removed, and makes to be bonded to this in the past Each in three O atoms of Si atoms is bonded to H atom；That is, it includes 50 atoms in total：15 Si originals Son, 32 O atoms and 3 H atoms.Structure with H is the knot of each that wherein H is attached in four kinds of structures above Structure.Note that H is attached to the O atom in amorphous IGZO, do not have the amorphous SiO of DB2In Si atoms and with the non-of DB Brilliant SiOxIn the atom with DB.The structure for wherein calculating H includes a H atom in the unit cell.Note that table 1 is shown The unit cell dimension of each structure.
[table 1]
Table 2 shows result of calculation.
[table 2]
From the foregoing, it can be understood that the amorphous SiO with DBx(2) there is highest combination energy, have from the amorphous without DB SiO2Si is eliminated, and each being bonded in the past in three O atoms of Si is made to be bonded to the structure of H；It is followed by SiOx(1), It has from the amorphous SiO without DB2An O atom is eliminated, and makes a Si atom for being bonded to an O atom in the past It is bonded to the structure of H；Amorphous IGZO and SiO without DB2With minimum combination energy.Therefore, hydrogen be bonded to by The amorphous SiO of DB caused by excessive oxygenxIn DB when become the most stable.
Thus, it can be assumed that following processes.In amorphous SiOxIn have a large amount of DB.In amorphous IGZO and amorphous SiOxIt Between interface near hydrogen atom because being bonded to amorphous SiOxIn DB and become stable.Thus, the hydrogen atom in amorphous IGZO Have been moved to amorphous SiOxIn DB.
In addition, by the amorphous SiO with DBx(2) knot possessed by (having to pass through and remove the structure that Si forms dangling bonds) The SiO with DB can be higher than by closingx(1) the fact that (have the structure that dangling bonds are formed by removing O), can be seen that SiOxIn Hydrogen atom is more stablized when being bonded to O.
If the defective insulating layer of tool is the insulating layer with many oxygen dangling bonds as defect, with The combination of hydrogen can be high；Therefore, it is possible to make more hydrogen atoms or more the impurity containing hydrogen from the oxide semiconductor Layer is diffused into the defective insulating layer of tool.Therefore, the Mixed Zone or oxide contacted with oxide semiconductor layer is exhausted Edge layer preferably includes excessive oxygen, preferably with SiO2+xIt indicates, wherein x is more than or equal to 0 and is less than 3.
By the above process, the oxide semiconductor layer of the concentration including wherein reducing hydrogen and hydride can be formed 112 thin film transistor (TFT) 110 (referring to Fig. 1 E).By reducing the concentration of the impurity of such as hydrogen or moisture, can inhibit to carry on the back raceway groove The generation of the parasitic channel of (that is, in superficial part of oxide semiconductor layer) on side.
In thin film transistor (TFT) 110, channel formation region can be formed in the oxide semiconductor layer, in the oxygen In compound semiconductor layer, hydrogen is set to be less than equal to 5 × 1019/cm3, preferably smaller than it is equal to 5 × 1018/cm3, more preferably less than Equal to 5 × 1017/cm3；Remove the hydrogen or O-H roots in oxide semiconductor；And carrier concentration is less than or equal to 5 × 1014cm3, Preferably smaller than it is equal to 5 × 1012/cm3。
The energy gap of oxide semiconductor is set as to be more than or equal to 2eV, preferably greater than or equal to 2.5eV is more preferably greater than equal to The carrier concentration of oxide semiconductor is set as being less than by 3eV to be reduced as far as impurity (hydrogen for such as, forming alms giver) Equal to 1 × 1014/cm3, preferably smaller than it is equal to 1 × 1012/cm3。
When the oxide semiconductor so purified to be used for the channel formation region of thin film transistor (TFT) 110, even In the case that channel width is 10mm, under the gate voltage in the drain voltage in 1V and 10V and the range in -5V to -20V, Also it will obtain and be less than or equal to 1 × 10-13The drain current of A.
As described above, remaining moisture, energy in reaction atmosphere used by formation by removing oxide semiconductor film Enough reduce the concentration of the hydrogen and hydride in oxide semiconductor film.In addition, by providing tool on oxide semiconductor layer Defective insulating layer, and setting oxygen excess Mixed Zone therebetween, make such as hydrogen or moisture in oxide semiconductor layer To having in defective insulating layer, thus, it is possible to reduce the concentration of hydrogen and hydride in oxide semiconductor layer for impurity diffusion. Correspondingly, the oxide semiconductor layer can be made to stablize.
Protection insulating layer can be provided on the defective insulating layer of tool.In this embodiment, with defect Insulating layer 116 on formed protection insulating layer 103.As the protection insulating layer 103, silicon nitride film, nitrogen oxygen may be used SiClx film or aluminium nitride film etc..
As protection insulating layer 103, silicon nitride film is formed by operations described below：It will form thereon until having defective Multiple layers of substrate 100 of insulating layer 116 is heated to 100 DEG C to 400 DEG C of temperature；It includes height to introduce eliminate hydrogen and moisture The sputter gas of purity nitrogen；And use silicon target.In this step, also excellent as the case where tool defective insulating layer 116 Protection insulating layer 103 is formed while the residual moisture being selected in removal process chamber.
In the case where forming protection insulating layer 103, if substrate 100 is heated to when forming protection insulating layer 103 100 DEG C to 400 DEG C of temperature has then the impurity of the such as hydrogen or moisture that include in oxide semiconductor layer can be diffused into In the insulating layer 116 of defect.In this case, it is not necessary to execute heat treatment after formation has defective insulating layer 116.
Silicon oxide layer is being formed as the defective insulating layer 116 of tool, and is being formed on silicon nitride layer as protection In the case of insulating layer 103, can the silicon oxide layer and silicon nitride layer be formed using public same silicon target in the same process chamber. First, it introduces containing aerobic sputter gas, and will be sputtered later using the indoor silicon target formation silicon oxide layer of processing is placed on Gas switches to the sputter gas containing nitrogen, and forms silicon nitride layer using same silicon target.Since air can be exposed to In the case of form the silicon oxide layer and silicon nitride layer in succession, it is thus possible to prevent from absorbing such as on the surface of silicon oxide layer The impurity of hydrogen or moisture.In this case, it is used as in formation silicon oxide layer and has defective insulating layer 116, and shape on it After being used as protection insulating layer 103 at silicon nitride layer, it preferably is carried out for making the hydrogen in oxide semiconductor layer or moisture diffusion To the heat treatment (temperature at 100 DEG C to 400 DEG C) in the defective insulating layer of tool.
After forming the protection insulating layer, can further 100 DEG C to 200 DEG C (containing end value) temperature in air Middle execution is heat-treated 1 hour to 30 hours (containing end value).The heat treatment can be executed in fixed heating temperature, or can be anti- Following heating temperature variations are repeatedly carried out again：Heating temperature is set to be increased to the temperature of 100 DEG C to 200 DEG C (containing end value) from room temperature Degree, is reduced to room temperature later.Furthermore, it is possible to before forming the protection insulating layer, execute under a reduced pressure at the heat Reason.Under a reduced pressure, heat treatment time can be shortened.By the heat treatment, nomal closed type thin film transistor (TFT) can be obtained.Cause This, can improve the reliability of semiconductor device.
Even if in impurity diffusion to after having in defective insulating layer 116, impurity is towards oxygen due to being heat-treated Compound semiconductor layer 112 moves back, and playing a part of the oxygen excess Mixed Zone 119 on barrier layer will also prevent impurity from entering oxide Semiconductor layer 112.Thus, it is possible to which oxide semiconductor layer 112 is made to keep low impurity concentration.
Above process manufacture may be used using the display device of electric ink, electroluminescence display panel, liquid crystal display Backboard (substrate for being formed on thin film transistor (TFT)) of device panel etc..Due to can be held in the temperature equal to or less than 400 DEG C The row above process, it is thus possible to preferably be applied to the process to be longer than 1m using side, thickness is less than or equal to the glass lined of 1mm The manufacturing process at bottom.
As described above, provide it is a kind of include there is the thin film transistor (TFT) of oxide semiconductor layer, with stable electricity Characteristic, highly reliable semiconductor device.
(embodiment 2)
In this embodiment, description can be applied to the another of the thin film transistor (TFT) of semiconductor device disclosed in this specification One example.It can be formed and identical part in above embodiment according to the similar mode described in above embodiment Or intimate part, and can also according to described in above embodiment similar mode execute with it is above Similar step in embodiment, thus repetitive description will be omitted.In addition, the detailed description to same section is also not repeated.
Fig. 2A to 2D shows a kind of example of the cross section structure of semiconductor device.Film crystal shown in Fig. 2A to 2D Pipe 130 has bottom gate configuration type, and be otherwise known as the staggered thin film transistor (TFT) of reversion.
Thin film transistor (TFT) 130 shown in Fig. 2A to 2D includes the grid electricity on the substrate 100 with insulating surface Pole layer 111, gate insulating layer 102, oxide semiconductor layer 132, source electrode layer 115a and drain electrode layer 115b.In addition, also carrying The oxygen excess oxide insulating layer 139 for having supplied covering thin film transistor (TFT) 130 and having been contacted with oxide semiconductor layer 132, and in institute It states to be formed on oxygen excess oxide insulating layer 139 and has defective insulating layer 116.In addition, having defective insulating layer 116 On formed protection insulating layer 103.
Due to oxygen excess oxide insulating layer 139 and the defective insulating layer 116 of tool have with hydrogen or moisture (hydrogen atom or Person contains compound (such as H of hydrogen atom2O high combination energy)), and these impurity are in oxygen excess oxide insulating layer 139 and has in defective insulating layer 116 and stablize, thus these impurity can be diffused into oxygen mistake from oxide semiconductor layer 132 It measures oxide insulating layer 139 and has in defective insulating layer 116, thus, it is possible to remove these from oxide semiconductor layer 132 Impurity.In addition, oxygen excess oxide insulating layer 139 plays the impurity for being directed to and having diffused into and having in defective insulating layer 116 Barrier layer effect, to prevent impurity to be again introduced into oxide semiconductor layer 132；Thus it can make oxide semiconductor layer 132 keep low impurity concentration.Therefore, including wherein reduce such as hydrogen, moisture, hydroxyl or the hydride for causing to change (again Be referred to as hydrogen compound) impurity oxide semiconductor layer 132 thin film transistor (TFT) 130 be it is a kind of it is highly reliable have it is steady The thin film transistor (TFT) of fixed electrical characteristics.
As oxygen excess oxide insulating layer 139, silicon oxide layer (SiO may be used2+x, wherein x be preferably greater than or equal to 0 and Less than 3).The oxygen excess oxide insulating layer 139 can be with the thickness of 0.1nm to 30nm (preferably 2nm to 10nm).
Although thin film transistor (TFT) 130 is described as single grid thin film transistor (TFT), can also be formed if necessary including The multi-grid electrode film transistor of multiple channel formation regions.
Hereinafter, the process of thin film transistor (TFT) 130 will be manufactured on substrate 100 with reference to figure 2A to 2D descriptions.
First, conductive film is formed on the substrate 100 with insulating surface, later, is formed by the first lithography step Gate electrode layer 111.
Later, gate insulating layer 102 is formed on gate electrode layer 111.Gate insulating layer 102 can have lamination knot Structure is stacked silicon nitride layer and silicon oxide layer in order in the laminated construction on gate electrode layer 111.
Later, form oxide semiconductor film on the gate insulating layer 102, and by the second lithography step by its It is processed into island oxide semiconductor layer 121.In this embodiment, passed through using the metal oxide target based on In-Ga-Zn-O Sputtering method forms oxide semiconductor film.
Later, conductive film is formed on gate insulating layer 102 and oxide semiconductor layer 121.It is walked by third photoetching Suddenly, Etching mask is formed on the conductive film, and has execution selective etch；So as to form source electrode layer 115a and Drain electrode layer 115b.Later, removal Etching mask (referring to Fig. 2A).
It is formed on gate insulating layer 102, oxide semiconductor layer 121, source electrode layer 115a and drain electrode layer 115b Oxygen excess oxide insulating layer 139 (referring to Fig. 2 B).In this embodiment, oxygen excess oxide insulating layer 139 is formed as Oxide semiconductor layer 121 not in the region Chong Die with source electrode layer 115a or drain electrode layer 115b with oxide semiconductor layer 121 contacts.
In this embodiment, in order to form the silicon oxide layer (SiO as oxygen excess oxide insulating layer 1392+x, wherein x Preferably greater than or equal to 0 and less than 3), multiple layers of the lining until source electrode layer 115a and drain electrode layer 115b will be formd thereon Bottom 100 is heated to room temperature or the temperature less than 100 DEG C, introduces the sputtering gas including high purity oxygen for eliminating hydrogen or moisture Body, and use silicon target.The thickness of the oxygen excess oxide insulating layer 139 can be that (preferably 2nm is arrived 0.1nm to 30nm 10nm)。
The sputter gas used in the forming process of oxygen excess oxide insulating layer 139 is preferably high-pure gas, In the gas, so that the impurity of such as hydrogen, water, hydroxyl or hydride is reduced to can indicate that its is dense as unit of ppm or ppb The degree of degree.
For example, forming silicon oxide layer by pulse DC sputtering methods according to following conditions：Using the boron-doping of the purity with 6N Silicon target (resistivity be 0.01 Ω cm)；The distance between substrate and target (S-T distances) are 89mm；Pressure is 0.4Pa, direct current (DC) power supply is 6kW, and atmosphere is oxygen (ratio of oxygen flow is 100%).Note that it is (preferably synthetic that quartz may be used Quartz) as target the silicon oxide layer is formed to substitute silicon target.The mixed gas conduct of oxygen or oxygen and argon may be used Sputter gas.
Note that the replacement as silicon oxide layer, may be used the works such as silicon oxynitride layer, alumina layer or oxynitriding aluminium layer For oxygen excess oxide insulating layer 139.
Later, it is defective that tool is formed on oxygen excess oxide insulating layer 139 in the case where being not exposed to air Insulating layer 116.
In this embodiment, it in order to form the defective insulating layer 116 of tool, will be formed on until island oxygen Multiple layers of lining of compound semiconductor layer 121, source electrode layer 115a, drain electrode layer 115b and oxygen excess oxide insulating layer 139 Bottom 100 is heated to room temperature or the temperature less than 100 DEG C, introduces the sputtering gas containing high purity oxygen for eliminating hydrogen and moisture Body, and use silicon target.Same target can be used to form oxygen excess oxide insulating layer 139 and with scarce in the same process chamber Sunken insulating layer 116.
The sputter gas used in the forming process for having defective insulating layer 116 is preferably high-pure gas, in institute It states in gas, its concentration can be indicated as unit of ppm or ppb by so that the impurity of such as hydrogen, water, hydroxyl or hydride is reduced to Degree.
Preferably, it wherein forms oxygen excess oxide insulating layer 139 in removal and has the processing of defective insulating layer 116 Oxygen excess oxide insulating layer 139 is formed in room while remaining moisture and has defective insulating layer 116, to make oxidation Object semiconductor layer 121, oxygen excess oxide insulating layer 139 have in defective insulating layer 116 not comprising hydrogen, hydroxyl or wet Gas.
It can be any insulating layer with many defects to have defective insulating layer 116, and oxynitriding may be used Silicon layer, alumina layer or oxynitriding aluminium layer etc. replace silicon oxide layer.Further, it is also possible to using silicon nitride layer, silicon oxynitride layer, Aln layer or nitrogen oxidation aluminium layer etc., which are used as, has defective insulating layer 116.
Later, it contacts with each other in the defective insulating layer 116 of tool and oxide semiconductor layer 121, and oxygen excess oxide In the state that insulating layer 139 is inserted into therebetween, heat treatment is executed in 100 DEG C to 400 DEG C of temperature.The heat treatment can make oxidation The hydrogen or moisture diffusion contained in object semiconductor layer 121 is to oxygen excess oxide insulating layer 139 and has defective insulating layer 116 In.Due to providing oxygen excess oxide insulating layer between the defective insulating layer 116 of tool and oxide semiconductor layer 121 139, thus such as impurity of hydrogen, hydroxyl or moisture for including in island oxide semiconductor layer 121 is from oxide semiconductor Layer 121 is diffused into oxygen excess oxide insulating layer 139 or is diffused into defect by oxygen excess oxide insulating layer 139 Insulating layer 116 in.
The oxide insulating layer 139 for being set to oxide semiconductor layer 121 and having between defective insulating layer 116 contains Excessive oxygen, thus with many oxygen dangling bonds as defect, and have and such as hydrogen, moisture, hydroxyl or hydride Impurity high combination energy.The offer of oxygen excess oxide insulating layer 139 promotes to be contained in oxide semiconductor layer 121 Such as the impurity diffusion of hydrogen, moisture, hydroxyl or hydride and it is moved in the defective insulating layer of tool 116.
In addition, in the impurity for having removed and being diffused into having defective insulating layer 116 from oxide semiconductor layer 121 When being moved back to oxide semiconductor layer, oxygen excess oxide insulating layer 139 plays a part of protective layer (barrier layer), with impurity In conjunction with and make its stabilization, to prevent impurity from entering oxide semiconductor layer.
As described above, such as hydrogen, moisture, hydroxyl or hydride by causing variation from oxide semiconductor layer removal Impurity, be capable of providing the oxide semiconductor layer 121 of the impurity with reduction.In addition, playing a part of the oxygen mistake on barrier layer Amount oxide insulating layer 139, which prevents from having diffused into the impurity having in defective insulating layer 116 and is again introduced into oxide, partly leads Body layer 121；Oxide semiconductor layer 121 can be thus set to keep low impurity concentration.
Later, having formation protection insulating layer 103 on defective insulating layer 116.It, can as protection insulating layer 103 With using silicon nitride layer, silicon oxynitride layer, aln layer or nitrogen oxidation aluminium layer etc..In this embodiment, as protection insulating layer 103, by forming silicon nitride layer as follows：It will form thereon until having multiple layers of substrate 100 of defective insulating layer 116 It is heated to 100 DEG C to 400 DEG C of temperature；Introduce the sputter gas for including high-purity nitrogen for eliminating hydrogen and moisture；And it uses Silicon target.
The impurity of such as hydrogen or moisture is eliminated in above process, and it is very low so that the concentration of these impurity is kept as, Thus, it is possible to inhibit the generation of the parasitic channel in the back channel side in the superficial part of oxide semiconductor layer.
Thus, it is possible to form the oxide semiconductor layer 132 of the concentration for the impurity that including reduced such as hydrogen and hydride Thin film transistor (TFT) 130 (referring to Fig. 2 D).
Even if in impurity diffusion to after having in defective insulating layer 116, since the heat treatment in step leads to impurity Towards oxide semiconductor layer move back, play a part of barrier layer oxygen excess oxide insulating layer 139 also still prevent impurity into Enter oxide semiconductor layer 132.Thus, it is possible to which oxide semiconductor layer 132 is made to keep low impurity concentration.
In thin film transistor (TFT) 130, channel formation region can be formed in the oxide semiconductor layer, in the oxygen In compound semiconductor layer, hydrogen is set to be less than equal to 5 × 1019/cm3, preferably smaller than it is equal to 5 × 1018/cm3, more preferably less than Equal to 5 × 1017/cm3；Remove the hydrogen or O-H roots in oxide semiconductor；And carrier concentration is less than or equal to 5 × 1014 cm3, preferably smaller than it is equal to 5 × 1012/cm3。
The energy gap of oxide semiconductor is set as to be more than or equal to 2eV, preferably greater than or equal to 2.5eV is more preferably greater than equal to The carrier concentration of oxide semiconductor to be reduced as far as impurity (for example, forming the hydrogen of alms giver), and is set as small by 3eV In equal to 1 × 1014/cm3, preferably smaller than it is equal to 1 × 1012/cm3。
When the oxide semiconductor so purified to be used for the channel formation region of thin film transistor (TFT) 130, even if in ditch In the case that road width is 10mm, under the gate voltage in the drain voltage in 1V and 10V and the range in -5V to -20V, It still obtains less than or equal to 1 × 10-13The drain current of A.
As described above, provide it is a kind of include there is the thin film transistor (TFT) of oxide semiconductor layer, with stable electricity Characteristic, highly reliable semiconductor device.
(embodiment 3)
Description can be applied to the another of the thin film transistor (TFT) of semiconductor device disclosed in this specification in this embodiment One example.
The semiconductor device in the embodiment and its manufacturing method will be described with reference to figure 3A to 3E.
Fig. 3 A to 3E show the example of the cross section structure of semiconductor device.Thin film transistor (TFT) 160 shown in Fig. 3 A to 3E It is referred to as the bottom gate configuration type of ditch pipe protection structure (also known as channel termination structure) with one kind, is otherwise known as anti- Deliver wrong thin film transistor (TFT).
Although thin film transistor (TFT) 160 is described as single grid thin film transistor (TFT), can also be formed if necessary including The multi-grid electrode film transistor of multiple channel formation regions.
Hereinafter, the process of thin film transistor (TFT) 160 will be manufactured on substrate 150 with reference to figure 3A to 3D descriptions.
First, conductive film is formed on the substrate 150 with insulating surface, later, is formed by the first lithography step Gate electrode layer 151.Note that Etching mask can be formed by ink-jet method.Forming Etching mask by ink-jet method will be not necessarily to Using photomask；Manufacturing cost thus can be reduced.
Gate electrode layer 151 can be formed to have single layer or laminated construction, use such as molybdenum, titanium, chromium, tantalum, tungsten, Aluminium, copper, the metal material of neodymium or scandium or alloy material including any materials in these materials are as its main component.
Later, gate insulating layer 152 is formed on gate electrode layer 151.
In this embodiment, the silicon oxynitride layer for the thickness with 100nm being formed by plasma CVD method is used as grid Insulating layer 152.
Later, form oxide semiconductor film on the gate insulating layer 152, and by the second lithography step by its It is processed into island oxide semiconductor layer 171.In this embodiment, passed through using the metal oxide target based on In-Ga-Zn-O Sputtering method forms oxide semiconductor film.
The substrate is placed into the process chamber under the pressure reduced, and is heated to the temperature less than 400 DEG C Degree.While removing moisture remaining in process chamber, the sputter gas for eliminating hydrogen and moisture is introduced, to use metal oxygen Compound forms oxide semiconductor film as target on substrate 150.In order to remove moisture remaining in process chamber, it is preferred to use Trapping-type vacuum pump.For example, it is preferable to using cryogenic pump, ionic pump or titanium sublimation pump.Evacuator can be provided with the whirlpool of cold-trap Wheel pump.In the film formation chamber using low temperature pump depletion, compound (such as, the H of hydrogen atom including hydrogen atom2O it) and wraps The compound etc. for including carbon atom is discharged.Contain therefore, it is possible to reduce in the oxide semiconductor film formed in the film formation chamber The concentration of some impurity.
As the example of film formation condition, using following conditions：The distance between substrate and target are 100mm, and pressure is 0.6Pa, direct current (DC) power supply are 0.5kW, and atmosphere is oxygen atmosphere (ratio of oxygen flow is 100%).It is preferred that using pulse Direct current (DC) power supply, because the powdered rubber (be otherwise known as particle or dust) generated in film forming process can be reduced, and And film thickness can be made uniform.Thickness of the oxide semiconductor film preferably with 5nm to 30nm (containing end value).Note that institute The suitable thickness for stating oxide semiconductor film changes according to material；Therefore, thickness can be suitably determined according to material.
Later, it is formed on gate insulating layer 152 and oxide semiconductor layer 171 and has defective insulating layer 173. In the forming process for having defective insulating layer 173, between oxide semiconductor layer 171 and the defective insulating layer of tool 173 It is formed oxygen excess Mixed Zone 179 (referring to Fig. 3 B).
The Mixed Zone 179 refers to that the material contained in oxide semiconductor layer 171 and tool above are defective The Mixed Zone of the material contained in insulating layer 173.By providing the Mixed Zone so that 171 He of oxide semiconductor layer Have the interface between defective insulating layer 173 not defined clearly；Thus be conducive to hydrogen from oxide semiconductor layer to expand It is scattered in the defective insulating layer of tool.For example, when using silicon oxide layer as having defective insulating layer 173, the mixing Region 179 includes at least one of metallic element included in oxygen, silicon and oxide semiconductor layer.
As in this embodiment, silica is being based on In-Ga- for having defective insulating layer 116 and using In the case that the film of Zn-O is as oxide semiconductor, Mixed Zone 179 include oxygen, silicon and in In, Ga and Zn extremely A kind of few metallic element.
It the Mixed Zone 179 can be with the thickness of 0.1nm to 30nm (preferably 2nm to 10nm).Have in formation The thickness of Mixed Zone 179 can be controlled when the insulating layer 173 of defect by the film formation condition of sputtering method.If in sputtering method It is middle that power supply is arranged higher, and the distance between substrate and target are arranged shorter, then can be by 179 shape of Mixed Zone It is thicker at obtaining.When implementing the sputtering method with higher power supply, it can remove and be absorbed on the surface of oxide semiconductor layer 171 Water etc..
Setting Mixed Zone 179 promotes oxidation between oxide semiconductor layer 171 and the defective insulating layer 173 of tool The hydrogen atom for including in object semiconductor layer 171, compound (such as H containing hydrogen atom2O), the compound etc. containing carbon atom It is diffused into and has in defective insulating layer 173, and promote its movement.
Mixed Zone 179 needs to include excessive oxygen, therefore the Mixed Zone is using the sputtering containing a large amount of oxygen What gas was formed, and after forming Mixed Zone 179, the amount of the oxygen in sputter gas can be adjusted, it is lacked with being formed to have Sunken insulating layer 173.
It can be any insulating layer with many defects to have defective insulating layer 173, and oxynitriding may be used Silicon layer, alumina layer or oxynitriding aluminium layer etc. replace silicon oxide layer.Furthermore, it is possible to using silicon nitride layer, silicon oxynitride layer, nitrogen Change aluminium layer or nitrogen oxidation aluminium layer etc. and has defective insulating layer 173 as described.
In this embodiment, in order to form the oxygen excess Mixed Zone and silicon oxide layer, will be formed on until Multiple layers of substrate 100 of island oxide semiconductor layer 171 is heated to room temperature or the temperature less than 100 DEG C, introduces removal The sputter gas containing high purity oxygen of hydrogen and moisture, and use silicon target.
The sputter gas used in the forming process for having defective insulating layer 173 is preferably high-pure gas, in institute It states in gas, its concentration can be indicated as unit of ppm or ppb by so that the impurity of such as hydrogen, water, hydroxyl or hydride is reduced to Degree.
For example, forming silicon oxide film by pulse DC sputtering methods according to following conditions：Using the boron-doping of the purity with 6N Silicon target (resistivity be 0.01 Ω cm)；The distance between substrate and target (T-S distances) are 89mm；Pressure is 0.4Pa, direct current (DC) power supply is 6kW, and atmosphere is oxygen (ratio of oxygen flow is 100%).Film thickness is 300nm.Note that stone may be used English (preferably synthetic quartz) replaces silicon target as the target for being used to form silicon oxide film.Using the mixed of oxygen or oxygen and argon gas Gas is closed as sputter gas.
It is preferred that forming Mixed Zone 179 while the residual moisture in removing process chamber and having defective insulating layer 173, to make oxide semiconductor layer 171, Mixed Zone 179 or have not including hydrogen, hydroxyl in defective insulating layer 173 Or moisture.
Note that silicon oxynitride, aluminium oxide or aluminum oxynitride etc., which may be used, substitutes silica to form Mixed Zone 179.
Later, having defective insulating layer 173 and oxide semiconductor layer 171 contacts with each other and oxygen excess mixed zone In the state that domain 179 is inserted into therebetween, heat treatment is executed in 100 DEG C to 400 DEG C of temperature.The heat treatment can make oxide half The hydrogen or moisture diffusion contained in conductor layer 171 is to oxygen excess Mixed Zone 179 and has in defective insulating layer 173.Due to Oxygen excess Mixed Zone 179 is provided between defective insulating layer 173 and oxide semiconductor layer 171 having, thus island Such as impurity of hydrogen, hydroxyl or moisture contained in oxide semiconductor layer 171 is diffused into oxygen from oxide semiconductor layer 171 It is diffused into excessive Mixed Zone 179 or by the oxygen excess Mixed Zone 179 and is had in defective insulating layer 173.
Contain excessively the Mixed Zone 179 for being set to oxide semiconductor layer 171 and having between defective insulating layer 173 Oxygen, thus with many oxygen dangling bonds as defect, and have miscellaneous with such as hydrogen, moisture, hydroxyl or hydride The high combination energy of matter.The offer of oxygen excess Mixed Zone 179 promote such as hydrogen contained in oxide semiconductor layer 171, The impurity of moisture, hydroxyl or hydride is mobile or is diffused into the defective insulating layer of tool 173.
In addition, from the impurity that oxide semiconductor layer 171 removes and is diffused into having defective insulating layer 173 to oxygen When compound semiconductor layer moves back, oxygen excess Mixed Zone 179 plays a part of protective layer (barrier layer), is combined and is made with impurity It is stablized, to prevent impurity from entering oxide semiconductor layer.
As described above, such as hydrogen, moisture, hydroxyl or hydride by causing variation from oxide semiconductor layer removal Impurity, be capable of providing the oxide semiconductor layer 162 of the impurity with reduction.In addition, playing a part of the oxygen mistake on barrier layer Amount Mixed Zone 179 prevents the impurity for having diffused into and having in defective insulating layer 173 to be again introduced into oxide semiconductor Layer 162；Oxide semiconductor layer 162 can be thus set to keep low impurity concentration.
By the above process, the oxide semiconductor layer 162 for the concentration for reducing hydrogen and hydride can be formed wherein.
The oxygen excess Mixed Zone is replaced with oxygen excess oxide insulating layer in example 2, can be provided.Oxygen Excess oxide insulating layer will generate the effect similar with the effect of oxygen excess Mixed Zone.
In the third photolithography step, Etching mask is formed on the defective insulating layer of the tool 173, and executes choosing Selecting property etches, and has defective insulating layer 166 to be formed.Later, removal Etching mask (referring to Fig. 3 C).
Later, the shape on the gate insulating layer 152, oxide semiconductor layer 162 and the defective insulating layer 166 of tool At conductive film.Hereafter, Etching mask is formed by the 4th lithography step, and executes selective etch, to form source electrode layer 165a and drain electrode layer 166b.Later, the Etching mask is removed.
As the material of the source electrode layer 165a and drain electrode layer 165b, can provide selected from Al, Cr, Cu, Ta, Ti, The element of Mo and W contains any element in these elements as the alloy of ingredient or containing any member in these elements The alloy etc. of the combination of element.In addition, the metal conductive film can be made of with single layer structure or two or more layers Laminated construction.
By the above process, the oxide semiconductor layer of the concentration including wherein reducing hydrogen and hydride can be formed 162 thin film transistor (TFT) 160 (referring to Fig. 3 D).
As described above, by removing remaining moisture in reaction atmosphere when forming oxide semiconductor film, can reduce The concentration of hydrogen and hydride in oxide semiconductor film.In addition, there is defect by being provided on oxide semiconductor layer Insulating layer, and setting oxygen excess Mixed Zone therebetween makes the impurity of such as hydrogen or moisture in oxide semiconductor layer expand It is scattered in the defective insulating layer of tool, thus, it is possible to reduce the concentration of hydrogen and hydride in oxide semiconductor layer.Therefore, energy Enough stablize the oxide semiconductor layer.
Even if in impurity diffusion to after having in defective insulating layer 173, since the heat treatment in step leads to impurity It is moved back towards oxide semiconductor layer 162, playing a part of the oxygen excess Mixed Zone 179 on barrier layer also still prevents impurity from entering Oxide semiconductor layer 162.Thus, it is possible to which oxide semiconductor layer 162 is made to keep low impurity concentration.
Protection insulating layer can be provided on the defective insulating layer of tool.In this embodiment, with defect Insulating layer 166, form protection insulating layer 153 on source electrode layer 165a and drain electrode layer 165b.As protection insulating layer 153, silicon nitride film, silicon oxynitride film or aluminium nitride film etc. may be used.In this embodiment, it is formed and is protected using silicon nitride film Protect insulating layer 153 (Fig. 3 E).
Note that in source electrode layer 165a, drain electrode layer 165b and can have further shape on defective insulating layer 166 At oxide insulating layer, and protection insulating layer 153 can be formed on the oxide insulating layer.Furthermore, it is possible to protecting Planarization insulating layer is formed on shield insulating layer 153.
It can implement the embodiment with another embodiment of appropriate combination.
As described above, provide it is a kind of include there is the thin film transistor (TFT) of oxide semiconductor layer, with stable electricity Characteristic, highly reliable semiconductor device.
(embodiment 4)
Description can be applied to the another of the thin film transistor (TFT) of semiconductor device disclosed in this specification in this embodiment One example.
The semiconductor device in the embodiment and its manufacturing method will be described with reference to figure 4A to 4C.
Although thin film transistor (TFT) 190 is described as single grid thin film transistor (TFT), can also be formed if necessary including The multi-grid electrode film transistor of multiple channel formation regions.
Hereinafter, the process of thin film transistor (TFT) 190 will be manufactured on substrate 140 with reference to figure 4A to 4C descriptions.
First, conductive film is formed on the substrate 140 with insulating surface, later, is formed by the first lithography step Gate electrode layer 181.In this embodiment, the tungsten film for the thickness with 150nm being formed by sputtering method is used as gate electrode layer 181.
Later, gate insulating layer 142 is formed on gate electrode layer 181.In this embodiment, pass through plasma CVD Method forms the silicon oxynitride layer of the thickness with 100nm as gate insulating layer 142.
Later, conductive film is formed on gate insulating layer 142.By the second lithography step, on the conductive film Etching mask is formed, and executes selective etch；To form source electrode layer 195a and drain electrode layer 195b.Later, it removes The Etching mask.
Later, oxide semiconductor film is formed, and island oxide semiconductor is processed by third lithography step 141 (referring to Fig. 4 A) of layer.In this embodiment, oxygen is formed by sputtering method using the metal oxide target based on In-Ga-Zn-O Compound semiconductor film.
The substrate is placed into the process chamber under the pressure reduced, and is heated to the temperature less than 400 DEG C Degree.While removing moisture remaining in process chamber, the sputter gas for eliminating hydrogen and moisture is introduced, to be aoxidized using metal Object forms oxide semiconductor film as target on substrate 140.In order to remove moisture remaining in process chamber, it is preferred to use prisoner Obtain type vacuum pump.For example, it is preferable to using cryogenic pump, ionic pump or titanium sublimation pump.Evacuator can be provided with the turbine of cold-trap Pump.In the film formation chamber using low temperature pump depletion, compound (such as H of hydrogen atom including hydrogen atom2O) and including carbon The compound etc. of atom is discharged.Contain in the oxide semiconductor film formed in the film formation chamber therefore, it is possible to reduce The concentration of impurity.
As the example of film formation condition, using following conditions：The distance between substrate and target are 100mm, and pressure is 0.6Pa, direct current (DC) power supply are 0.5kW, and atmosphere is oxygen atmosphere (ratio of oxygen flow is 100%).It is preferred that using pulse Direct current (DC) power supply, because the powdered rubber (be otherwise known as particle or dust) generated in film forming process can be reduced, and And film thickness can be made uniform.Thickness of the oxide semiconductor film preferably with 5nm to 30nm (containing end value).Note that institute The suitable thickness for stating oxide semiconductor film changes according to material；Therefore, thickness can be suitably determined according to material.
Later, on gate insulating layer 142, oxide semiconductor layer 141, source electrode layer 195a and drain electrode layer 195b It is formed and has defective insulating layer 196.In the forming process for having defective insulating layer 196, in oxide semiconductor layer 141 The formation oxygen excess Mixed Zone 199 between the defective insulating layer 196 of tool.
The Mixed Zone refers in the material contained in oxide semiconductor layer and the defective insulating layer of tool above The Mixed Zone of the material contained.By providing the Mixed Zone so that oxide semiconductor layer and the defective insulation of tool It is not defined clearly at interface between layer；Thus be conducive to hydrogen and be diffused into the defective insulation of tool from oxide semiconductor layer In layer.For example, when using silicon oxide layer as having defective insulating layer, the Mixed Zone includes oxygen, silicon and oxidation At least one of the metallic element for including in object semiconductor layer.
For in the embodiment, silica is being based on In-Ga-Zn- for having defective insulating layer 196 and using In the case that the oxide of O is as oxide semiconductor, Mixed Zone 199 include oxygen, silicon and selected from In, Ga and Zn at least A kind of metallic element.
It the Mixed Zone 199 can be with the thickness of 0.1nm to 30nm (preferably 2nm to 10nm).It can formed The thickness of Mixed Zone 199 is controlled when having defective insulating layer 196 by the film formation condition of sputtering method.If sputtering In method power supply is arranged higher, the distance between substrate and target are arranged shorter, then Mixed Zone 199 can be formed It obtains thicker.When carrying out the sputtering method with higher power supply, it can remove and absorb on the surface of oxide semiconductor layer 141 Water etc..
Offer Mixed Zone 199 promotes oxidation between oxide semiconductor layer 141 and the defective insulating layer 196 of tool The hydrogen atom for including in object semiconductor layer 141, compound (such as H containing hydrogen atom2O), the compound etc. containing carbon atom It is diffused into and has in defective insulating layer 196, and promote its movement.
Mixed Zone 199 needs to include excessive oxygen, therefore the Mixed Zone is using the sputtering containing a large amount of oxygen What gas was formed, and after forming Mixed Zone 199, the amount of the oxygen in sputter gas can be adjusted, it is lacked with being formed to have Sunken insulating layer 196.
It can be any insulating layer with many defects to have defective insulating layer 196, and oxynitriding may be used Silicon layer, alumina layer or oxynitriding aluminium layer etc. replace silicon oxide layer.Further, it is also possible to using silicon nitride layer, silicon oxynitride layer, Aln layer or nitrogen oxidation aluminium layer etc., which are used as, has defective insulating layer 196.
In this embodiment, it in order to form oxygen excess Mixed Zone and silicon oxide layer, will be formed on until island Multiple layers of substrate 140 of oxide semiconductor layer 141, source electrode layer 195a and drain electrode layer 195b is heated to room temperature or low In 100 DEG C of temperature, the sputter gas containing high purity oxygen for eliminating hydrogen and moisture is introduced, and use silicon target.
The sputter gas used in the forming process for having defective insulating layer 196 is preferably high-pure gas, in institute It states in gas, its concentration can be indicated as unit of ppm or ppb by so that the impurity of such as hydrogen, water, hydroxyl or hydride is reduced to Degree.
For example, forming silicon oxide film by pulse DC sputtering methods according to following conditions：Using the boron-doping with 6N purity Silicon target (resistivity is 0.01 Ω cm)；The distance between substrate and target (T-S distances) are 89mm；Pressure is 0.4Pa, direct current (DC) Power supply is 6kW, and atmosphere is oxygen (ratio of oxygen flow is 100%).Film thickness is 300nm.Note that quartz may be used (preferably synthetic quartz) replaces silicon target as the target for being used to form silicon oxide film.Oxygen or oxygen and argon gas may be used Mixed gas is as sputter gas.
It is preferred that forming Mixed Zone 199 while the residual moisture in removing process chamber and having defective insulating layer 196 so that do not include in oxide semiconductor layer 141, the defective insulating layer 173 of tool or Mixed Zone 179 hydrogen, hydroxyl or Moisture.
Mixed Zone 199 is formed note that silicon oxynitride, aluminium oxide, aluminium oxynitride etc. may be used and substitute silica.
Later, having formation protection insulating layer 183 on defective insulating layer 196.As protection insulating layer 183, adopt With silicon nitride film, silicon oxynitride film or aluminium nitride film etc..As protection insulating layer 183, silicon nitride is formed by operations described below Film：It will form thereon until multiple layers of substrate 140 for having defective insulating layer 196 is heated to 100 DEG C to 400 DEG C of temperature Degree；Introduce the sputter gas for including high-purity nitrogen for eliminating hydrogen and moisture；And use silicon target.
In this embodiment, in the forming process of protection insulating layer 183 in 100 DEG C to 400 DEG C of temperature to substrate 140 Execute heat treatment.
The heat treatment can make the hydrogen contained in oxide semiconductor layer 141 or moisture diffusion to oxygen excess Mixed Zone 199 and have in defective insulating layer 196.Due to being carried between island oxide semiconductor layer 141 and oxide insulating layer 196 Supply oxygen excess Mixed Zone 199, thus such as hydrogen, hydroxyl or moisture contained in island oxide semiconductor layer 141 Impurity is diffused into oxygen excess Mixed Zone 199 from oxide semiconductor layer 141 or is expanded by the oxygen excess Mixed Zone 199 It is scattered in oxide insulating layer 196.
Contain excessively the Mixed Zone 199 for being set to oxide semiconductor layer 141 and having between defective insulating layer 196 Oxygen, thus with many oxygen dangling bonds as defect, and have miscellaneous with such as hydrogen, moisture, hydroxyl or hydride The high combination energy of matter.The offer of oxygen excess Mixed Zone 199 promote such as hydrogen contained in oxide semiconductor layer 141, Moisture, hydroxyl or hydride impurity diffusion and be moved in the defective insulating layer of tool 196.
In addition, from the impurity that oxide semiconductor layer 141 removes and is diffused into having defective insulating layer 196 to oxygen When compound semiconductor layer moves back, oxygen excess Mixed Zone 199 plays a part of protective layer (barrier layer), is combined and is made with impurity It is stablized, to prevent impurity from entering oxide semiconductor layer.
As described above, such as hydrogen, moisture, hydroxyl or hydride by causing variation from oxide semiconductor layer removal Impurity, be capable of providing the oxide semiconductor layer 192 of the impurity with reduction.In addition, playing a part of the oxygen mistake on barrier layer Amount Mixed Zone 199 prevents the impurity for having diffused into and having in defective insulating layer 196 to be again introduced into oxide semiconductor Layer 192；Oxide semiconductor layer 192 can be thus set to keep low impurity concentration.
By the above process, the oxide semiconductor layer of the concentration including wherein reducing hydrogen and hydride can be formed 192 thin film transistor (TFT) 190 (referring to Fig. 4 C).
The oxygen excess Mixed Zone is replaced with oxygen excess oxide insulating layer in example 2, can be provided.Oxygen Excess oxide insulating layer will generate the effect similar with the effect of oxygen excess Mixed Zone.
As described above, by removing remaining moisture in reaction atmosphere when forming oxide semiconductor film, can reduce The concentration of hydrogen and hydride in oxide semiconductor film.In addition, there is defect by being provided on oxide semiconductor layer Insulating layer and oxygen excess Mixed Zone be disposed there between, so that the impurity of such as hydrogen or moisture in oxide semiconductor layer is expanded It is scattered in the defective insulating layer of tool, thus, it is possible to reduce the concentration of hydrogen and hydride in oxide semiconductor layer.Therefore, energy Enough stablize the oxide semiconductor layer.
Even if in impurity diffusion to after having in defective insulating layer 196, since the heat treatment in step leads to impurity It is moved back towards oxide semiconductor layer 192, playing a part of the oxygen excess Mixed Zone 199 on barrier layer will also prevent impurity from entering Oxide semiconductor layer 192.Thus, it is possible to which oxide semiconductor layer 192 is made to keep low impurity concentration.
The embodiment suitably can be combined implementation with another embodiment.
As described above, provide it is a kind of include there is the thin film transistor (TFT) of oxide semiconductor layer, with stable electricity Characteristic, highly reliable semiconductor device.
(embodiment 5)
Description can be applied to the another of the thin film transistor (TFT) of semiconductor device disclosed in this specification in this embodiment One example.It can be formed and identical part in above embodiment according to the similar mode described in above embodiment Or intimate part, it can also be executed and implementation above according to the similar mode described in above embodiment Similar step in example, thus repetitive description will be omitted.In addition, the detailed description to same section is also not repeated.
The semiconductor device in the embodiment and its manufacturing method will be described with reference to figure 5A to 5E.
Fig. 5 A to 5E show the example of the cross section structure of semiconductor device.Thin film transistor (TFT) 310 shown in Fig. 5 A to 5E With a kind of bottom gate configuration type, be otherwise known as reversion staggered thin film transistor.
Although thin film transistor (TFT) 310 is described as single grid thin film transistor (TFT), can also be formed if necessary including The multi-grid electrode film transistor of multiple channel formation regions.
Hereinafter, the process of thin film transistor (TFT) 310 will be manufactured on substrate 300 with reference to figure 5A to 5E descriptions.
First, conductive film is formed on the substrate 300 with insulating surface, later, is formed by the first lithography step Gate electrode layer 311.Note that Etching mask can be formed by ink-jet method.Forming Etching mask by ink-jet method will be not necessarily to Using photomask；Manufacturing cost thus can be reduced.
Although the substrate to the substrate 300 that may be used as having insulating surface does not limit specifically, the substrate There is still a need for the heat resistance for being at least sufficient to resist the heat treatment executed below.It may be used by barium borosilicate glass or aluminium The glass substrate of the formation such as borosilicate glass.
As glass substrate, if the temperature of the heat treatment executed below is high, preferably use strain point for 730 DEG C or Higher glass substrate.As glass substrate, for example, using such as alumina silicate glass, aluminium borosilicate glass or barium borosilicate The glass material of silicate glass.Note that by make containing barium monoxide (BaO) amount be higher than boron oxide amount, can obtain resistance to Heat and more actual glass substrate.It is therefore preferable that using contained BaO ratios B2O3More glass substrates.
Note that may be used the substrate of such as ceramic substrate, quartz substrate or Sapphire Substrate formed by insulator Lai Instead of above-mentioned glass substrate.Alternatively, crystallized glass etc. may be used.
The insulating film for playing a part of basilar memebrane can be provided between substrate 300 and gate electrode layer 311.The basilar memebrane Have the function of preventing impurity element from diffusing out from substrate 300, and can form it into single layer or lamination knot Structure, the structure include one or more of silicon nitride film, silicon oxide film, silicon oxynitride film and oxygen silicon nitride membrane.
Gate electrode layer 311 can be formed to have single layer or laminated construction, use such as molybdenum, titanium, chromium, tantalum, tungsten, Aluminium, copper, the metal material of neodymium or scandium or alloy material including any materials in these materials are as its main component.
For example, the double-layer structure as gate electrode layer 311, it is preferred to use form two layers of knot of molybdenum layer wherein on aluminium layer Structure, wherein forms the two of titanium nitride layer or tantalum nitride layer at the double-layer structure that molybdenum layer is wherein formed on layers of copper on layers of copper Layer structure wherein forms the double-layer structure of molybdenum layer on titanium nitride layer or forms tungsten layer wherein on tungsten nitride layer Double-layer structure.As three-decker, it is preferred to use be wherein stacked tungsten layer or tungsten nitride layer, the alloy of aluminium and silicon or aluminium and titanium Alloy layer and titanium nitride layer or titanium layer laminated construction.
Later, gate insulating layer 302 is formed on gate electrode layer 311.
Gate insulating layer 302 can be formed to have single layer or lamination knot by plasma CVD method or sputtering method etc. Structure comprising silicon oxide layer, silicon nitride layer, silicon oxynitride layer, silicon oxynitride layer, alumina layer or hafnium oxide layer.For example, can Contain SiH to be used by plasma CVD method4, oxygen and nitrogen deposited gas form silicon oxynitride layer.Gate insulating layer 302 Thickness with 100nm to 500nm (containing end value).In the case of laminated construction, be stacked has 50nm to 200nm in order The second grid of the first grid insulating layer of the thickness of (contain end value) and thickness with 5nm to 300nm (containing end value) insulate Layer.
In this embodiment, the silicon oxynitride layer for the thickness with 100nm being formed by plasma CVD method is used as grid Insulating layer 302.
Later, being formed on gate insulating layer 302, there is the oxide of the thickness of 2nm to 200nm (containing end value) partly to lead Body film 330.
Note that before forming oxide semiconductor film 330 by sputtering method, preferably by introducing into argon gas and generate The reverse sputtering removal of plasma is attached to the dust on the surface of gate insulating layer 302.Note that may be used nitrogen, helium or Oxygen etc. replaces argon atmospher.
As oxide semiconductor film 330, using the film based on In-Ga-Zn-O, the oxide based on In-Sn-Zn-O half Electrically conductive film, the oxide semiconductor film based on Sn-Ga-Zn-O, is based on Al- at the oxide semiconductor film based on In-Al-Zn-O The oxide semiconductor film of Ga-Zn-O, the oxide semiconductor film based on Sn-Al-Zn-O, the oxide based on In-Zn-O half Electrically conductive film, the oxide semiconductor film based on Sn-Zn-O, the oxide semiconductor film based on Al-Zn-O, the oxidation based on In-O Object semiconductor film, the oxide semiconductor film based on Sn-O or the oxide semiconductor film based on Zn-O.In the embodiment In, oxide semiconductor film 330 is formed by sputtering method using the metal oxide target based on In-Ga-Zn-O.Fig. 5 A are shown The sectional view in the stage.Furthermore, it is possible in rare gas (being usually argon gas), atmosphere, oxygen atmosphere or rare gas are (usually For argon gas) and the atmosphere of oxygen in pass through sputtering method formed oxide semiconductor film 330.The case where forming film using sputtering method Under, the SiO for including 2wt% to 10wt% (containing end value) may be used2Target.
As the target for forming oxide semiconductor film 330 by sputtering method, may be used including zinc oxide as it The metal oxide of main component.Another example for the metal oxide target that may be used is the metal containing In, Ga and Zn Oxide target (has In2O3:Ga2O3:ZnO=1:1:The ingredient ratio of 1 [molar ratio]).As the metal oxygen including In, Ga and Zn Compound target, may be used with In2O3:Ga2O3:ZnO=1:1:The ingredient of 2 [molar ratios] than target, or have In2O3: Ga2O3:ZnO=1:1:The ingredient of 4 [molar ratios] than target.The fill factor of the metal oxide target is 90% to 100% (containing end value), preferably 95% to 99.9% (containing end value).By using the metal oxide target with high fill-factor, institute's shape At oxide semiconductor film have high density.
The sputter gas used in the forming process of oxide semiconductor film 330 is preferably high-pure gas, described In gas, its concentration can be indicated as unit of ppm or ppb by so that the impurity of such as hydrogen, water, hydroxyl or hydride is reduced to Degree.
The substrate is placed into the process chamber under the pressure reduced, and substrate temperature is set as 100 DEG C To 600 DEG C (containing end value), it is preferably arranged to 200 DEG C to 400 DEG C (containing end value).By forming oxidation while to silicon Object semiconductor film can reduce the impurity concentration for being formed by oxide semiconductor film.Furthermore it is possible to be damaged caused by reducing sputtering Wound.While removing moisture remaining in process chamber, the sputter gas for eliminating hydrogen and moisture is introduced, to use metal to aoxidize Object forms oxide semiconductor film 330 as target on substrate 300.In order to remove moisture remaining in process chamber, preferably adopt With trapping-type vacuum pump.For example, it is preferable to using cryogenic pump, ionic pump or titanium sublimation pump.Evacuator can be provided with cold-trap Turbine pump.In the film formation chamber using low temperature pump depletion, for example, hydrogen atom, such as water (H2O the chemical combination for including hydrogen atom) Object (and preferred, to include the compound of carbon atom) is discharged.Therefore, it is possible to reduce the oxidation formed in the film formation chamber The concentration of the impurity contained in object semiconductor film.
As the example of film formation condition, using following conditions：The distance between substrate and target are 100mm, and pressure is 0.6Pa, direct current (DC) power supply are 0.5kW, and atmosphere is oxygen atmosphere (ratio of oxygen flow is 100%).It is preferred that using pulse Direct current (DC) power supply, because the powdered rubber (be otherwise known as particle or dust) generated in film forming process can be reduced, and And film thickness can be made uniform.Thickness of the oxide semiconductor film preferably with 5nm to 30nm (containing end value).Note that institute The thickness appropriate for stating oxide semiconductor film changes according to material；Therefore it can suitably be determined according to material thick Degree.
Later, the oxide semiconductor film 330 is processed by island oxide semiconductor layer by the second lithography step. Note that the Etching mask for being used to form the island oxide semiconductor layer can be formed by ink injection method.Pass through spray The method of the use of ink and water forms Etching mask will be without photomask；Manufacturing cost thus can be reduced.
Later, the first heat treatment is executed to oxide semiconductor layer.Oxide half can be executed by first heat treatment The dehydration or dehydrogenation of conductor layer.In the temperature of 400 DEG C to 750 DEG C (containing end value), preferably more than or equal to 400 DEG C and less than lining The temperature of the strain point at bottom executes first heat treatment.Here, it introduces the substrate into as a kind of electric furnace of Equipment for Heating Processing In, and in nitrogen atmosphere, heat treatment 1 hour is executed to oxide semiconductor layer with 450 DEG C of temperature.Hereafter, oxide is avoided Semiconductor layer is exposed to air, and avoids that it is made to contain water or hydrogen again；(the ginseng of oxide semiconductor layer 331 thereby is achieved See Fig. 5 B).
Note that Equipment for Heating Processing is not limited to electric furnace, can provide with by coming from heater (such as, resistance heater) Heat transfer or the heat radiation equipment of device that object is heated.For example, rapid thermal annealing (RTA) equipment may be used, such as, Gas rapid thermal annealing (GRTA) equipment or lamp rapid thermal annealing (LRTA) equipment.LRTA equipment is the light radiation emitted by lamp The equipment that (electromagnetic wave) heats object, the lamp such as halogen lamp, metal halide lamp, xenon arc lamp, carbon arc lamp, high-pressure sodium lamp Or high-pressure mercury-vapor lamp.GRTA equipment is the equipment being heat-treated using high-temperature gas.As the gas, using will not be because of heat The inert gas that processing reacts with the object, for example, the rare gas of nitrogen or such as argon gas.
For example, as first heat treatment, GRTA can be executed, wherein substrate is moved on to and is heated to temperature and is up to In 650 DEG C to 700 DEG C of inert gas, it is heated a few minutes, and it is removed from the inert gas for be heated to high temperature. The high-temperature heat treatment of short time period can be realized using GRTA.
Note that in the first heat treatment, preferably make not wrap in nitrogen or such as rare gas of helium, neon or argon gas Containing moisture, hydrogen etc..Alternatively, the rare gas of the nitrogen or such as helium, neon or argon gas that are introduced in Equipment for Heating Processing Body preferably has 6N (99.9999%) or higher purity, more preferably has 7N (99.99999%) or higher purity (also It is to say, impurity concentration is 1ppm or lower, preferably 0.1ppm or lower).
In addition, according to the condition of the first heat treatment or the material of oxide semiconductor layer, oxide semiconductor can be made Layer crystallization chemical conversion crystallite film or polycrystalline film.For example, can make the oxide semiconductor layer crystallization chemical conversion that there is 90% or higher Or 80% or higher crystallinity microcrystalline oxide semiconductor film.In addition, according to the condition of the first heat treatment or oxidation The material of object semiconductor layer, the oxide semiconductor layer can become the amorphous oxide semiconductor without containing crystalline component Layer.The oxide semiconductor layer can become that crystallite part is made (to have 1nm to 20nm (containing end value) (typically, 2nm to 4nm (contain end value)) grain size) be mixed into the oxide semiconductor film in amorphous oxide semiconductor.
Pair can be executed to it before oxide semiconductor film 330 is processed into island oxide semiconductor layer First heat treatment of oxide semiconductor layer.In this case, after first heat treatment, substrate is set from heat treatment Standby middle taking-up, and lithography step is carried out to it.
It can be executed on any following opportunitys described with to oxide semiconductor layer dehydration or the heat treatment of dehydrogenation： After forming oxide semiconductor layer；After source electrode layer or drain electrode layer being formed on oxide semiconductor layer；And It is formed on source electrode layer and drain electrode layer after protection insulating layer.
In addition, in the case of forming contact hole in gate insulating layer 302, it can be de- to oxide semiconductor film 330 The formation of the contact hole is executed before or after water or dehydrogenation.
Note that the etching to oxide semiconductor film is not limited to wet etching, can be dry etching.
Etching condition (for example, etchant, etching period and temperature) is suitably adjusted according to material, is enabled to institute It states film and is etched into anticipated shape.
Later, conductive film is formed on gate insulating layer 302 and oxide semiconductor layer 331.Sputtering method can be passed through Or vacuum vapour deposition forms the conductive film.As the material of second conductive film, can provide selected from aluminium (Al), chromium (Cr), the element of copper (Cu), tantalum (Ta), titanium (Ti), molybdenum (Mo) and tungsten (W), contain any element in these elements be used as at The alloy divided or the alloy etc. of the combination containing any element in these elements.Furthermore, it is possible to using selected from manganese (Mn), One or more materials in magnesium (Mg), zirconium (Zr), beryllium (Be) and thorium (Th).In addition, the conductive film can have single layer knot Structure or laminated construction by two or more layers.For example, can provide by the aluminium film containing silicon single layer structure, aluminium film it On be stacked the double-layer structure of titanium film, be stacked the three-decker of titanium film, aluminium film and titanium film in order.Alternatively, it may be used One kind containing aluminium (Al) and in titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd) and the scandium (Sc) or Film, alloy film or the nitride film of multiple element.
In the case where executing heat treatment after forming conducting film, the conductive film, which preferably has, is sufficient to resist heat treatment Heat resistance.
By third lithography step, Etching mask is formed on the conductive film, and execute selective etch；To Form source electrode layer 315a and drain electrode layer 315b.Later, removal Etching mask (referring to Fig. 5 C).
Using ultraviolet light, KrF laser or ArF laser come the exposure for forming Etching mask in the third photolithography step Light.The channel length L for being formed later thin film transistor (TFT) depends on source adjacent to each other on oxide semiconductor layer 331 Interval width between electrode layer bottom and drain electrode layer bottom.Note that executing exposure to the channel length L less than 25nm When, using the deep uv exposure of the extremely short wavelength with several nanometers to several tens of nanometers, for shape in the third photolithography step At Etching mask.High-resolution and big pentrution will be obtained using deep uv exposure.Therefore, it is possible to will want shape below At the channel length L of thin film transistor (TFT) be set as 10nm to 1000nm (contain end value).Thus, it is possible to improve the operation speed of circuit Degree, and since OFF-state current is minimum, it is thus possible to realize low-power consumption.
Note that each material and etching condition are suitably adjusted, so that oxide will not be removed because etching conductive film Semiconductor layer 331.
In this embodiment, using Ti films as conductive film, using the oxide semiconductor conduct based on In-Ga-Zn-O Oxide semiconductor layer 331 is used as etchant using the hydrogen peroxide ammonia mixture of water and hydrogen peroxide (ammonia).
Note that in the third photolithography step, in some cases, can etch, make to 331 part of oxide semiconductor layer It becomes the oxide semiconductor layer with groove (sunk part).It can be formed by ink-jet method and be used to form source electrode layer The Etching mask of 315a and drain electrode layer 315b.Forming Etching mask by ink-jet method will be without photomask；Thus Manufacturing cost can be reduced.
It is led furthermore, it is possible to form oxide between oxide semiconductor layer and source electrode layer 315a and drain electrode layer 315b Electric layer.The oxide conducting layer can be sequentially formed and be used to form the source electrode layer and the metal layer of drain electrode layer. The oxide conducting layer can play the role of source area and drain region.
When providing between oxide semiconductor layer 331 and source electrode layer 315a and drain electrode layer 315b as source area and When the oxide conducting layer of drain region, the source area and drain region can have lower resistance, thus transistor can be high Speed work.
In addition, in order to reduce the quantity of the photomask used in lithography step, and the quantity of lithography step is reduced, it can be with Etching step is executed using masstone mask, the masstone mask is the exposure for making to have multiple intensity by the light of its transmission Mask.There are multiple thickness using the Etching mask that masstone mask is formed, and its shape can also be changed by etching, Therefore it can use it in multiple etching steps, to provide different patterns.It is therefore possible to use a masstone mask Form the Etching mask corresponding at least two different patterns.Thus, it is possible to the quantity of exposed mask is reduced, but also can The quantity for reducing corresponding lithography step, thus, it is possible to realize the simplification of technical process.
Later, it executes and uses such as N2O、N2Or the corona treatment of the gas of Ar.By the corona treatment, go The water etc. absorbed in addition to the exposed surface of oxide semiconductor layer.The mixed gas that oxygen and argon gas may be used executes plasma Body processing.
Later, on gate insulating layer 302, oxide semiconductor layer 331, source electrode layer 315a and drain electrode layer 315b Form oxygen excess oxide insulating layer 319.In this embodiment, oxygen excess oxide insulating layer 319 is formed as in oxide Semiconductor layer 331 is not contacted with the region of source electrode layer 315a or drain electrode layer 315b overlappings with oxide semiconductor layer 331.
In this embodiment, in order to form the silicon oxide layer (SiO as oxygen excess oxide insulating layer 3192+x, wherein x Preferably greater than or equal to 0 and less than 3), multiple layers of the lining until source electrode layer 315a and drain electrode layer 315b will be formd thereon Bottom 300 is heated to room temperature or the temperature less than 100 DEG C, introduces the sputtering gas including high purity oxygen for eliminating hydrogen or moisture Body, and use silicon target.The thickness of the oxygen excess oxide insulating layer 319 can be that (preferably 2nm is arrived 0.1nm to 30nm 10nm)。
The sputter gas used in the forming process of oxygen excess oxide insulating layer 319 is preferably high-pure gas, In the gas, so that the impurity of such as hydrogen, water, hydroxyl or hydride is reduced to can indicate that its is dense as unit of ppm or ppb The degree of degree.
For example, forming silicon oxide layer by pulse DC sputtering methods according to following conditions：Using the boron-doping of the purity with 6N Silicon target (resistivity be 0.01 Ω cm)；The distance between substrate and target (T-S distances) are 89mm；Pressure is 0.4Pa, direct current (DC) power supply is 6kW, and atmosphere is oxygen (ratio of oxygen flow is 100%).Note that it is (preferably synthetic that quartz may be used Quartz) as target the silicon oxide layer is formed to substitute silicon target.The mixed gas of oxygen or oxygen and argon gas may be used As sputter gas.
Note that the replacement as silicon oxide layer, may be used the works such as silicon oxynitride layer, alumina layer or oxynitriding aluminium layer For oxygen excess oxide insulating layer 319.
Later, it is defective that tool is formed on oxygen excess oxide insulating layer 319 in the case where being not exposed to air Insulating layer 316.Same target can be used to form oxygen excess oxide insulating layer 319 and have defective exhausted in the same process chamber Edge layer 316.
In this embodiment, it is used as by the silicon oxide layer of sputtering method formation 200nm thickness and has defective insulating layer 316. Underlayer temperature in film forming process can be room temperature to 300 DEG C (containing end value).In this embodiment, substrate temperature 100 ℃.Furthermore, it is possible in rare gas (being usually argon gas) atmosphere, oxygen atmosphere or rare gas (being usually argon gas) and oxygen The formation of the silicon oxide film by sputtering method is executed in the atmosphere of gas.Silicon oxide target or silicon target may be used as target.For example, can To form silicon oxide layer by sputtering method in the atmosphere of oxygen and nitrogen using silicon target.
It can be any insulating layer with many defects to have defective insulating layer 316, but it is not contained preferably Such as moisture, hydrogen atom or OH-Impurity and the inorganic insulating membrane that prevents the impurity to be externally entering.Usually it may be used Silicon oxynitride layer, alumina layer or oxynitriding aluminium layer etc. substitute silicon oxide layer.Further, it is also possible to using silicon nitride layer, nitrogen oxidation Silicon layer, aln layer or nitrogen oxidation aluminium layer etc., which are used as, has defective insulating layer 316.
Has defective insulating layer 316 it is preferred that being formed while the residual moisture in removing process chamber, to make oxidation Object semiconductor layer 331 has in defective insulating layer 316 not comprising hydrogen, hydroxyl or moisture.
In order to remove moisture remaining in process chamber, it is preferred to use trapping-type vacuum pump.For example, it is preferable to using cryogenic pump, Ionic pump or titanium sublimation pump.Evacuator can be provided with the turbine pump of cold-trap.In the film formation chamber using low temperature pump depletion, For example, hydrogen atom and the compound (such as water (H including hydrogen atom2O it)) is discharged.Therefore, it is possible to reduce in the film formation chamber The concentration for having the impurity contained in defective insulating layer 316 of middle formation.
The sputter gas used in the forming process for having defective insulating layer 316 is preferably high-pure gas, in institute It states in gas, its concentration can be indicated as unit of ppm or ppb by so that the impurity of such as hydrogen, water, hydroxyl or hydride is reduced to Degree.
Later, the second heat treatment is executed in inert gas atmosphere or oxygen atmosphere (preferably (to contain at 200 DEG C to 400 DEG C End value) temperature, for example, in the temperature of 250 DEG C to 350 DEG C (contain end value)).For example, in 250 DEG C of temperature in nitrogen atmosphere Executed for second 1 hour of heat treatment.In the second heat treatment, in the part (channel formation region) for making oxide semiconductor layer The part of oxide semiconductor layer is heated while contact with oxide insulating layer 319.
The heat treatment can make the hydrogen for including in oxide semiconductor layer 331 or moisture diffusion to oxygen excess insulated by oxide Layer 319 and have in defective insulating layer 316.Due between oxide semiconductor layer 331 and the defective insulating layer of tool 316 Provide oxygen excess oxide insulating layer 319, thus the such as hydrogen, hydroxyl that include in island oxide semiconductor layer 331 or The impurity of moisture is diffused into oxygen excess oxide insulating layer 319 from oxide semiconductor layer 331 or is aoxidized by oxygen excess Object insulating layer 319, which is diffused into, to be had in defective insulating layer 316.
The oxide insulating layer 319 for being set to oxide semiconductor layer 331 and having between defective insulating layer 316 contains Excessive oxygen, thus with many oxygen dangling bonds as defect, and have and such as hydrogen, moisture, hydroxyl or hydride Impurity high combination energy.The offer of oxygen excess oxide insulating layer 319 promotes to be contained in oxide semiconductor layer 331 Such as the impurity diffusion of hydrogen, moisture, hydroxyl or hydride and it is moved in the defective insulating layer of tool 316.
In addition, in the impurity for having removed and being diffused into having defective insulating layer 316 from oxide semiconductor layer 331 When being moved back to oxide semiconductor layer, oxygen excess oxide insulating layer 319 plays a part of protective layer (barrier layer), with impurity In conjunction with and make its stabilization, to prevent impurity from entering oxide semiconductor layer.
As described above, such as hydrogen, moisture, hydroxyl or hydride by causing variation from oxide semiconductor layer removal Impurity, be capable of providing the oxide semiconductor layer 312 of the impurity with reduction.In addition, playing a part of the oxygen mistake on barrier layer Amount oxide insulating layer 319 prevents the impurity for having diffused into and having in defective insulating layer 316 to be again introduced into oxide half Conductor layer；Oxide semiconductor layer 312 can be thus set to keep low impurity concentration.
Note that for making the impurity of such as hydrogen from the heat that oxide semiconductor layer is diffused into the defective insulating layer of tool Reason does not need to combine with the second heat treatment, can be individually performed.
In above-mentioned steps, executed for being dehydrated or the heat treatment of dehydrogenation, thus to being formed by oxide semiconductor film So that the oxide semiconductor film is in oxygen lack state, and reduce its resistance, that is to say, that become n-layer, later, formed with The oxide insulating layer of the oxide semiconductor layer contact, this makes a part for the oxide semiconductor layer be in oxygen mistake Amount state.As a result, the channel formation region 313 Chong Die with gate electrode layer 311 becomes i types region.At this moment, in a self-aligned manner High resistance source area 314a and high resistance drain region 314b is formed, the high resistance source area 314a has at least above channel shape At the carrier concentration in region 313, and it is Chong Die with source electrode layer 315a, and the high resistance drain region 314b has at least above The carrier concentration of channel formation region 313, and it is Chong Die with drain electrode layer 315b.Film crystal is formd through the above steps Pipe 310 (referring to Fig. 5 D).
It, can also be as reality although describing the example for wherein forming oxygen excess oxide insulating layer in this embodiment It applies and provides oxygen excess Mixed Zone in example 1 like that instead of oxygen excess oxide insulating layer.Oxygen excess Mixed Zone will generate and oxygen Excess oxide insulating layer acts on similar effect.
Temperature that can be further in air 100 DEG C to 200 DEG C (containing end value) executes 1 hour to 30 hours (containing end Value) heat treatment.In this embodiment, the temperature at 150 DEG C executes heat treatment 10 hours.It can be executed in fixed heating temperature The heat treatment.Alternatively, the variation of following heating temperature can repeatedly be performed a plurality of times：Heating temperature is set to be increased to from room temperature The temperature of 100 DEG C to 200 DEG C (containing end value), is reduced to room temperature later.Furthermore, it is possible to forming the defective insulating layer of tool Before, the heat treatment is executed under a reduced pressure.Under a reduced pressure, heat treatment time can be shortened.At the heat Hydrogen is introduced into the defective insulating layer of tool by reason from oxide semiconductor layer；Nomal closed type thin film transistor (TFT) thus can be obtained.Cause This, can improve the reliability of semiconductor device.
Pass through the shape in the oxide semiconductor layer part Chong Die with drain electrode layer 315b (or source electrode layer 315a) At high resistance drain region 314b (or high resistance source area 314a), the reliability of thin film transistor (TFT) can be improved.Specifically, lead to It crosses to form high resistance drain region 314b, conductivity can be from drain electrode layer 315b to high resistance drain region 314b and channel formation region Domain 313 gradually changes.Therefore, when thin film transistor (TFT) is connected in drain electrode layer 315b for providing high power supply potential VDD Wiring in the case of when working, the high resistance drain region plays a part of buffer, and even if in 311 He of gate electrode layer It is applied with high electric field between drain electrode layer 315b, will not locally apply high electric field；The breakdown of transistor can thus be improved Voltage.
In addition, in the case where the thickness of oxide semiconductor layer is less than or equal to 15nm, in the oxide semiconductor layer It is middle to form high resistance source area or high resistance drain region along whole thickness direction.It is arrived for 30nm in the thickness of oxide semiconductor layer In the case that 50nm (containing end value) is thick, in a part for oxide semiconductor layer, that is, in oxide semiconductor layer and source In the region of electrode layer or drain electrode layer contact and its nearby, resistance reduces, and forms high resistance source area or high resistance and leak Polar region, while the region close to gate insulating film in oxide semiconductor layer being made to become i types region.
It can be additionally provided protection insulating layer on the defective insulating layer of the tool 316.For example, passing through RF sputtering methods Form silicon nitride film.Since RF sputtering methods have high productivity, thus it is preferably used to be formed as the film of protection insulating layer Method.Using not comprising such as moisture, hydrogen ion and OH-Impurity and prevent its inorganic insulating membrane being externally entering from being formed The protection insulating layer；For example, using silicon nitride film, aluminium nitride film, silicon oxynitride film or nitrogen oxidation aluminium film etc..In the implementation In example, protection insulating layer 303 is formed using silicon nitride film and is used as the protection insulating layer (referring to Fig. 5 E).
In this embodiment, as protection insulating layer 303, by forming silicon nitride film as follows：To form thereon until Multiple layers of substrate 300 for having defective insulating layer 316 is heated to 100 DEG C to 400 DEG C of temperature；Introducing eliminates hydrogen and wet The sputter gas for including high-purity nitrogen of gas；And use silicon target.In this step, with the feelings that have defective insulating layer 316 Condition is the same, it is also preferred that forming protection insulating layer 303 while the residual moisture in removing process chamber.
Planarization insulating layer for planarization can be provided on protection insulating layer 303.
As described above, by removing remaining moisture in reaction atmosphere when forming oxide semiconductor film, can reduce The concentration of hydrogen and hydride in oxide semiconductor film.In addition, there is defect by being provided on oxide semiconductor layer Insulating layer, and setting oxygen excess Mixed Zone therebetween makes the impurity of such as hydrogen or moisture in oxide semiconductor layer expand It is scattered in the defective insulating layer of tool, thus, it is possible to reduce the concentration of hydrogen and hydride in oxide semiconductor layer.Therefore, energy Enough stablize the oxide semiconductor layer.
Even if miscellaneous due to the heat treatment in step in impurity diffusion to after having in defective insulating layer 316 Matter towards oxide semiconductor layer 312 move back, play a part of barrier layer oxygen excess oxide insulating layer 319 will also prevent it is miscellaneous Matter enters oxide semiconductor layer 312.Thus, it is possible to which oxide semiconductor layer 312 is made to keep low impurity concentration.
The embodiment can be implemented with another embodiment of appropriate combination.
As described above, provide it is a kind of include there is the thin film transistor (TFT) of oxide semiconductor layer, with stable electricity Characteristic, highly reliable semiconductor device.
(embodiment 6)
Description can be applied to the another of the thin film transistor (TFT) of semiconductor device disclosed in this specification in this embodiment One example.It can be formed and identical part in above embodiment according to the similar mode described in above embodiment Or intimate part, it can also be executed and implementation above according to the similar mode described in above embodiment Similar step in example, thus repetitive description will be omitted.In addition, the detailed description to same section is also not repeated.
The semiconductor device in the embodiment and its manufacturing method will be described with reference to figure 6A to 6D.
Fig. 6 A to 6D show a kind of example of the cross section structure of semiconductor device.Thin film transistor (TFT) shown in Fig. 6 A to 6D 360 are referred to as the bottom gate configuration type of ditch pipe protection structure (also known as channel termination structure) with one kind, are claimed again To invert staggered thin film transistor.
Although thin film transistor (TFT) 360 is described as single grid thin film transistor (TFT), can also be formed if necessary including The multi-grid electrode film transistor of multiple channel formation regions.
Hereinafter, the process of thin film transistor (TFT) 360 will be manufactured on substrate 320 with reference to figure 6A to 6D descriptions.
First, conductive film is formed on the substrate 320 with insulating surface, later, is formed by the first lithography step Gate electrode layer 361.Note that Etching mask can be formed by ink-jet method.Forming Etching mask by ink-jet method will be not necessarily to Using photomask；Manufacturing cost thus can be reduced.
Gate electrode layer 361 can be formed to have single layer or laminated construction, use such as molybdenum, titanium, chromium, tantalum, tungsten, Aluminium, copper, the metal material of neodymium or scandium or alloy material including any materials in these materials are as its main component.
Later, gate insulating layer 322 is formed on gate electrode layer 361.
In this embodiment, the silicon oxynitride layer for the thickness with 100nm being formed by plasma CVD method is used as grid Insulating layer 322.
Later, being formed on gate insulating layer 322, there is the oxide of the thickness of 2nm to 200nm (containing end value) partly to lead Body film, and island oxide semiconductor layer is processed by the second lithography step.In this embodiment, using based on In- The metal oxide target of Ga-Zn-O forms oxide semiconductor film by sputtering method.
It is preferred that the oxide semiconductor film is formed while removing moisture remaining in process chamber, to make the oxygen Hydrogen, hydroxyl or moisture are not contained in compound semiconductor film.
In order to remove moisture remaining in process chamber, it is preferred to use trapping-type vacuum pump.For example, it is preferable to using cryogenic pump, Ionic pump or titanium sublimation pump.Evacuator can be provided with the turbine pump of cold-trap.In the film formation chamber using low temperature pump depletion, For example, hydrogen atom and compound (such as, the water (H including hydrogen atom2O it)) is discharged.Therefore, it is possible to reduce in the film formation chamber The concentration of the impurity contained in the oxide semiconductor film of middle formation.
The sputter gas used in the forming process of oxide semiconductor film is preferably high-pure gas, in the gas In, so that the impurity of such as hydrogen, water, hydroxyl or hydride is reduced to the journey that can indicate its concentration as unit of ppm or ppb Degree.
Later, the dehydration or dehydrogenation of the oxide semiconductor layer are executed.For be dehydrated or dehydrogenation first heat treatment Temperature is 400 DEG C to 750 DEG C (containing end value), is preferably greater than equal to 400 DEG C and less than the strain point of substrate.Here, by substrate It is introduced into as in a kind of electric furnace of Equipment for Heating Processing, and the temperature at 450 DEG C in nitrogen atmosphere holds oxide semiconductor layer Row heat treatment 1 hour.Hereafter, it avoids oxide semiconductor layer from being exposed to air, and avoids that it is made to contain water or hydrogen again；By This obtains oxide semiconductor layer 332 (referring to Fig. 6 A).
Later, it executes and uses such as N2O、N2Or the corona treatment of the gas of Ar.By the corona treatment, go The water etc. absorbed in addition to the exposed surface of oxide semiconductor layer.The mixed gas that oxygen and argon gas may be used executes plasma Body processing.
Later, oxygen excess oxide insulating layer is formed on gate insulating layer 322 and oxide semiconductor layer 332.
In this embodiment, oxidation is formed using the sputter gas containing high purity oxygen and silicon target that eliminate hydrogen and moisture Silicon layer (SiO2+x, wherein x is preferably greater than or equal to 0 and less than 3) as oxygen excess oxide insulating layer 369.The oxygen excess oxygen The thickness of compound insulating layer can be 0.1nm to 30nm (preferably 2nm to 10nm).
Note that the replacement as silicon oxide layer, may be used the works such as silicon oxynitride layer, alumina layer or oxynitriding aluminium layer For oxygen excess oxide insulating layer.
Later, it is formed on oxygen excess oxide insulating layer in the case where being not exposed to air and has defective insulation Layer.Same target can be used to form oxygen excess oxide insulating layer and have defective insulating layer in the same process chamber.
In this embodiment, the silicon oxide layer that 200nm thickness is formed by sputtering method is used as the defective insulating layer of tool.
It is preferred that forming oxygen excess oxide insulating layer while the residual moisture in removing process chamber and having defective Insulating layer, to make oxide semiconductor layer 332, oxygen excess oxide insulating layer or have in defective insulating layer 366 not wrap Hydrogeneous, hydroxyl or moisture.
In order to remove moisture remaining in process chamber, it is preferred to use trapping-type vacuum pump.For example, it is preferable to using cryogenic pump, Ionic pump or titanium sublimation pump.Evacuator can be provided with the turbine pump of cold-trap.In the film formation chamber using low temperature pump depletion, For example, hydrogen atom and compound (such as, the water (H including hydrogen atom2O it)) is discharged.Therefore, it is possible to reduce in the film formation chamber The concentration for having the impurity contained in defective insulating layer 366 of middle formation.
The sputter gas used in the forming process of oxygen excess oxide insulating layer and the defective insulating layer of tool is preferred High-pure gas, in the gas, make the impurity of such as hydrogen, water, hydroxyl or hydride be reduced to can with ppm or Ppb is the degree that unit indicates its concentration.
Later, it contacts with each other in the defective insulating layer of tool and oxide semiconductor layer, and oxygen excess insulated by oxide In the state that layer is inserted into therebetween, heat treatment is executed in 100 DEG C to 400 DEG C of temperature.The heat treatment can be such that oxide partly leads The hydrogen or moisture diffusion for including in body layer 332 are to oxygen excess oxide insulating layer and have in defective insulating layer.Due to having Oxygen excess oxide insulating layer is provided between defective insulating layer and oxide semiconductor layer, thus island oxide is partly led Such as impurity of hydrogen, hydroxyl or moisture for including in body layer is diffused into oxygen excess oxide insulating layer from oxide semiconductor layer In or be diffused into the defective insulating layer of tool by oxygen excess oxide insulating layer.
The oxide insulating layer being set between oxide semiconductor layer and the defective insulating layer of tool contains excessive oxygen, Thus with many oxygen dangling bonds as defect, and there is the high impurity with such as hydrogen, moisture, hydroxyl or hydride Combination energy.The offer of oxygen excess oxide insulating layer promotes such as hydrogen, moisture, the hydrogen-oxygen that contain in oxide semiconductor layer The impurity diffusion of root or hydride is simultaneously moved in the defective insulating layer of tool.
In addition, from the impurity that oxide semiconductor layer removes and is diffused into having defective insulating layer to oxidation When object semiconductor layer moves back, oxygen excess oxide insulating layer plays a part of protective layer (barrier layer), is combined and is made with impurity It is stablized, to prevent impurity from entering oxide semiconductor layer.
By third lithography step, resist is formed on oxygen excess oxide insulating layer and the defective insulating layer of tool Mask, and execute selective etch；So as to form oxygen excess oxide insulating layer 369 and has defective insulating layer 366.It Afterwards, the Etching mask is removed.
As described above, such as hydrogen, moisture, hydroxyl or hydride by causing variation from oxide semiconductor layer removal Impurity, be capable of providing the oxide semiconductor layer 362 of the impurity with reduction.In addition, playing a part of the oxygen mistake on barrier layer Amount oxide insulating layer 369 prevents the impurity for having diffused into and having in defective insulating layer 366 to be again introduced into oxide half Conductor layer；Oxide semiconductor layer 362 can be thus set to keep low impurity concentration.
It, can also be as embodiment although describing the example to form oxygen excess oxide insulating layer in this embodiment Oxygen excess Mixed Zone is equally provided in 1 or 3 and replaces oxygen excess oxide insulating layer.Oxygen excess Mixed Zone will generate and oxygen mistake Measure the similar effect of the effect of oxide insulating layer.
Later, the second heat treatment can be executed in inert gas atmosphere or oxygen atmosphere (preferably at 200 DEG C to 400 The temperature of DEG C (contain end value), for example, in the temperature of 250 DEG C to 350 DEG C (containing end value)).For example, at 250 DEG C in nitrogen atmosphere At a temperature of execute second heat treatment 1 hour.In the second heat treatment, in a part (raceway groove for making oxide semiconductor layer Forming region) part of oxide semiconductor layer is heated while contacted with oxide insulating layer 369.Note that being used for The impurity of such as hydrogen is set to be diffused into the heat treatment and described second having in defective insulating layer from oxide semiconductor layer Heat treatment combines.
In this embodiment, further make to form oxide insulating layer 369 thereon and have defective insulating layer 366 simultaneously And the oxide semiconductor layer of part exposure is in nitrogen either inert gas atmosphere or under a reduced pressure through heated place Reason.By the heat treatment under in nitrogen or inert gas atmosphere or reduction pressure, make not by oxide insulating layer 369 or The exposed region for having the oxide semiconductor layer of the covering of defective insulating layer 366 is in oxygen lack state, and resistance reduces, That is, the exposed region can be n-type region.For example, the temperature at 250 DEG C in nitrogen atmosphere executes 1 hour of heat treatment.
By to being formed on oxide insulating layer 369 in nitrogen atmosphere and having had defective insulating layer 366 Oxide semiconductor layer 332 is heat-treated, and the resistance of the exposed region of oxide semiconductor layer is reduced；So as to form packet Include the oxide semiconductor layer 362 in the region (being expressed as shadow region and white area in fig. 6b) with different resistance.
Later, defective absolutely in gate insulating layer 322, oxide semiconductor layer 362, oxide insulating layer 369 and tool Conductive film is formed on edge layer 366.Hereafter, Etching mask is formed by the 4th lithography step, and executes selective etch, with Form source electrode layer 365a and drain electrode layer 365b.Later, removal Etching mask (referring to Fig. 6 C).
As the material of the source electrode layer 365a and drain electrode layer 365b, can provide selected from Al, Cr, Cu, Ta, Ti, The element of Mo and W contains arbitrary element in these elements as the alloy of ingredient or containing the arbitrary member in these elements The alloy etc. of the combination of element.In addition, the metal conductive film can be made of with single layer structure or two or more layers Laminated construction.
In above-mentioned steps, executed for being dehydrated or the heat treatment of dehydrogenation, thus to being formed by oxide semiconductor film So that the oxide semiconductor film is in oxygen lack state, and reduce its resistance, is formed and the oxide semiconductor film later The oxide insulating layer of contact, this selectively makes a part for the oxide semiconductor film be in oxygen excess state.As a result, The channel formation region 363 Chong Die with gate electrode layer 361 is set to become i types region.At this moment, source area is formed in a self-aligned manner 364a and drain region 364b, the source area have the resistance lower than channel formation region 363, and heavy with source electrode layer 365a Folded, the drain region has the resistance lower than channel formation region 363, and Chong Die with drain electrode layer 365b.Through the above steps Form thin film transistor (TFT) 360.
Can heat treatment 1 hour to 30 hours be executed (containing end in the temperature of 100 DEG C to 200 DEG C (containing end value) in air Value).In this embodiment, heat treatment 10 hours is executed at a temperature of 150 DEG C.The heat can be executed in fixed heating temperature Processing.Alternatively, following heating temperature variation repeatedly can be carried out repeatedly：Make heating temperature from room temperature be increased to 100 DEG C to The temperature of 200 DEG C (containing end value), is reduced to room temperature later.Furthermore, it is possible to before forming the oxide insulating film, reducing Pressure under execute the heat treatment.Under a reduced pressure, heat treatment time can be shortened.By the heat treatment, by hydrogen from oxygen Compound semiconductor layer is introduced into the defective insulating layer of tool；So as to obtain nomal closed type thin film transistor (TFT).Therefore, it is possible to carry The reliability of high semiconductor device.
By forming the height electricity Chong Die with drain electrode layer 365b (or source electrode layer 365a) in oxide semiconductor layer Drain Resistance polar region 364b (or high resistance source area 364a), can improve the reliability of thin film transistor (TFT).Specifically, pass through to be formed High resistance drain region 364b, conductivity can be from drain electrode layers to high resistance drain region 364b and channel formation region 363 gradually It changes.Therefore, the feelings of the wiring for providing high power supply potential VDD are connected in drain electrode layer 365b when thin film transistor (TFT) When working under condition, the high resistance drain region plays a part of buffer, and even if in gate electrode layer 361 and drain electrode layer It is applied with high electric field between 365b, will not locally apply high electric field；The breakdown voltage of transistor can thus be improved.
In source electrode layer 365a, drain electrode layer 365b, oxide insulating layer 369 and have on defective insulating layer 366 Form protection insulating layer 323.In this embodiment, protection insulating layer 323 (referring to Fig. 6 D) is formed using silicon nitride layer.
Note that can be in source electrode layer 365a, drain electrode layer 365b, oxide insulating layer 369 and the defective insulation of tool It is further formed oxide insulating layer on layer 366, and protection insulating layer can be formed on the oxide insulating layer 323。
As described above, by removing remaining moisture in reaction atmosphere when forming oxide semiconductor film, can reduce The concentration of hydrogen and hydride in oxide semiconductor film.In addition, there is defect by being provided on oxide semiconductor layer Insulating layer and oxygen excess Mixed Zone be disposed there between, so that the impurity of such as hydrogen or moisture in oxide semiconductor layer is expanded It is scattered in the defective insulating layer of tool, thus, it is possible to reduce the concentration of hydrogen and hydride in oxide semiconductor layer.Therefore, energy Enough stablize the oxide semiconductor layer.
Even if miscellaneous due to the heat treatment in step in impurity diffusion to after having in defective insulating layer 366 Matter is moved back towards oxide semiconductor layer 362, and playing a part of the oxide insulating layer 369 on barrier layer will also prevent impurity from entering Oxide semiconductor layer 362.Thus, it is possible to which oxide semiconductor layer 362 is made to keep low impurity concentration.
The embodiment can be implemented with another embodiment of appropriate combination.
As described above, provide it is a kind of include there is the thin film transistor (TFT) of oxide semiconductor layer, with stable electricity Characteristic, highly reliable semiconductor device.
(embodiment 7)
Description can be applied to the another of the thin film transistor (TFT) of semiconductor device disclosed in this specification in this embodiment One example.Thin film transistor (TFT) 380 in the embodiment may be used as the thin film transistor (TFT) 110 in embodiment 1.
In this embodiment, Fig. 7 shows that the manufacturing process of manufacturing process and embodiment 5 has the film crystalline substance distinguished part The example of body pipe.Other than part steps, Fig. 7 is identical as Fig. 5 A to 5E.Thus, it uses the same reference numerals to represent and schemes Identical part in 5A to 5E, and the detailed description by omission to these parts.
According to embodiment 5, gate electrode layer 381 is formed on substrate 370, and stacked first grid insulating layer 372a and the Two gate insulating layer 372b.In this embodiment, the gate insulating layer has double-layer structure：Insulating nitride layer is used as first Gate insulating layer 372a, and oxide insulating layer is used as second grid insulating layer 372b.
As the oxide insulating layer, may be used silicon oxide layer, silicon oxynitride layer, alumina layer, oxynitriding aluminium layer, Or hafnium oxide layer etc..As the insulating nitride layer, silicon nitride layer, silicon oxynitride layer, aln layer or nitrogen oxygen may be used Change aluminium layer etc..
In this embodiment, silicon nitride layer and silicon oxide layer are stacked in order on gate electrode layer 381.Pass through such as lower section Formula forms the gate insulating layer of the thickness with 150nm：Being formed by sputtering method has 50nm (containing) to 200nm (containing) (at this In embodiment be 50nm) thickness silicon nitride layer (SiNy (y ＞ 0)) be used as first grid insulating layer 372a, later described The thickness with 5nm (containing) to 300nm (containing) (being in this embodiment 100nm) is formed on first grid insulating layer 372a Silicon oxide layer (SiOx(x ＞ 0)) it is used as second grid insulating layer 372b.
Later, oxide semiconductor film is formed, and island oxide semiconductor layer is processed by lithography step. In the embodiment, the oxide semiconductor film is formed by sputtering method using the metal oxide target based on In-Ga-Zn-O.
It is preferred that the oxide semiconductor film is formed while removing moisture remaining in process chamber, to make the oxygen Hydrogen, hydroxyl or moisture are not contained in compound semiconductor film.
In order to remove moisture remaining in process chamber, it is preferred to use trapping-type vacuum pump.For example, it is preferable to using cryogenic pump, Ionic pump or titanium sublimation pump.Evacuator can be provided with the turbine pump of cold-trap.In the film formation chamber using low temperature pump depletion, Hydrogen atom and compound (such as, water (H including hydrogen atom2)) etc. O it is discharged.Therefore, it can reduce in the film formation chamber The impurity concentration of the oxide semiconductor film of formation.
The sputter gas used in the forming process of oxide semiconductor film is preferably high-pure gas, in the gas In, so that the impurity of such as hydrogen, water, hydroxyl or hydride is reduced to the journey that can indicate its concentration as unit of ppm or ppb Degree.
Later, the dehydration or dehydrogenation of the oxide semiconductor layer are executed.It is described for be dehydrated or dehydrogenation first it is hot at The temperature of reason be 400 DEG C (containing) to 750 DEG C (containing), preferably greater than be equal to 425 DEG C and less than substrate strain point temperature.Note Meaning, in the case where temperature is more than or equal to 425 DEG C, heat treatment time can be 1 hour or shorter, and be less than 425 DEG C in temperature In the case of, heat treatment time is then longer than 1 hour.Here, it introduces the substrate into as in a kind of electric furnace of Equipment for Heating Processing, and Heat treatment is executed to oxide semiconductor layer in nitrogen atmosphere.Hereafter, it avoids oxide semiconductor layer from being exposed to air, and keeps away Exempt from that it is made to contain water or hydrogen again.Hereafter, by high-purity oxygen, high purity N2(dew point is equal to for O gases or ultra dry air Or it is less than -40 DEG C, preferably equal to or lower than -60 DEG C) be introduced into same electric furnace, and execute cooling.The oxygen or N2O gases It is preferred that without containing water or hydrogen etc..Alternatively, the oxygen or N that are introduced in Equipment for Heating Processing2O gases preferably have 6N (99.9999%) or higher purity, more preferably have 7N (99.99999%) or higher purity (that is, the oxygen Gas or N2The impurity concentration of O gases is 1ppm or lower, preferably 0.1ppm or lower).
Note that the Equipment for Heating Processing is not limited to electric furnace.For example, rapid thermal annealing (RTA) equipment may be used, such as, Gas rapid thermal annealing (GRTA) equipment or lamp rapid thermal annealing (LRTA) equipment.LRTA equipment is the light radiation emitted by lamp The equipment that (electromagnetic wave) heats object, the lamp such as halogen lamp, metal halide lamp, xenon arc lamp, carbon arc lamp, high-pressure sodium lamp Or high-pressure mercury-vapor lamp.In addition, the LRTA equipment can not only be equipped with lamp, but also it is also provided with and is added by coming from such as resistance The device that object is heated in the heat transfer of the heater of hot device or heat radiation.GRTA is the side being heat-treated using high-temperature gas Method.As the gas, using will not be because being heat-treated the inert gas to react with the object, for example, nitrogen or such as The rare gas of argon gas.Temperature by RTA methods at 600 DEG C to 750 DEG C executes heat treatment a few minutes.
In addition, for be dehydrated or dehydrogenation first heat treatment after, can be in oxygen or N2In the atmosphere of O gases, The temperature of 200 DEG C (containing) to 400 DEG C (containing) preferably executes heat treatment 200 DEG C (containing) to the temperature of 300 DEG C (containing).
It can be executed before oxide semiconductor film is processed into island oxide semiconductor layer described to oxygen First heat treatment of compound semiconductor layer.In this case, after first heat treatment, by substrate from Equipment for Heating Processing Middle taking-up, and lithography step is implemented to it.
By the above process, entire oxide semiconductor film is made to be in oxygen excess state, to make it have higher resistance, That is, becoming i type oxide semiconductor films.To which it is i-shaped oxide semiconductor layer 382 to form whole region.
Later, by lithography step, Etching mask is formed on oxide semiconductor layer 382, and execute selectivity Etching, to form source electrode layer 385a and drain electrode layer 385b.
In this embodiment, oxidation is formed using the sputter gas containing high purity oxygen and silicon target that eliminate hydrogen and moisture Silicon layer (SiO2+x, wherein x is preferably greater than or equal to 0 and less than 3) as oxygen excess oxide insulating layer 389.The oxygen excess oxygen The thickness of compound insulating layer 389 can be 0.1nm to 30nm (preferably 2nm to 10nm).
Note that the replacement as silicon oxide layer, may be used the works such as silicon oxynitride layer, alumina layer or oxynitriding aluminium layer For oxygen excess oxide insulating layer 389.
Later, it is defective that tool is formed on oxygen excess oxide insulating layer 389 in the case where being not exposed to air Insulating layer 386.Same target can be used to form oxygen excess oxide insulating layer 389 and have defective exhausted in the same process chamber Edge layer 386.
In this embodiment, it is used as by the silicon oxide layer of sputtering method formation 200nm thickness and has defective insulating layer 386.
It is preferred that forming oxygen excess oxide insulating layer 389 while the residual moisture in removing process chamber and there is defect Insulating layer 386, to make oxide semiconductor layer 382, oxygen excess oxide insulating layer 389 or the defective insulating layer of tool Hydrogen, hydroxyl or moisture are not included in 386.
In order to remove moisture remaining in process chamber, it is preferred to use trapping-type vacuum pump.For example, it is preferable to using cryogenic pump, Ionic pump or titanium sublimation pump.Evacuator can be provided with the turbine pump of cold-trap.In the film formation chamber using low temperature pump depletion, For example, hydrogen atom and compound (such as, the water (H including hydrogen atom2)) etc. O it is discharged.It is formed in the film therefore, it is possible to reduce What is formed in room has the concentration of the impurity contained in defective insulating layer 386.
In oxygen excess oxide insulating layer 389 and has the sputtering gas used in the forming process of defective insulating layer 386 Body is preferably high-pure gas, and in the gas, so that the impurity of such as hydrogen, water, hydroxyl or hydride is reduced to can be with Ppm or ppb is the degree that unit indicates its concentration.
Later, having defective insulating layer 386 and oxide semiconductor layer contacts with each other and oxygen excess oxide is exhausted In the state that edge layer 389 is inserted into therebetween, heat treatment is executed in 100 DEG C to 400 DEG C of temperature.The heat treatment can make oxide The hydrogen or moisture diffusion for including in semiconductor layer are to oxygen excess oxide insulating layer 389 and have in defective insulating layer 386.By In providing oxygen excess oxide insulating layer 389 between defective insulating layer 386 and oxide semiconductor layer 382 having, because And such as impurity of hydrogen, hydroxyl or moisture for including in island oxide semiconductor layer is diffused into oxygen from oxide semiconductor layer It is diffused into excess oxide insulating layer 389 or by oxygen excess oxide insulating layer 389 and has defective insulating layer 386 In.
The oxide insulating layer 389 for being set to oxide semiconductor layer and having between defective insulating layer 386 contained The oxygen of amount, thus with many oxygen dangling bonds as defect, and have and such as hydrogen, moisture, hydroxyl or hydride The high combination energy of impurity.The offer of oxygen excess oxide insulating layer 389, which promotes in oxide semiconductor layer, to be contained such as Hydrogen, moisture, the impurity of hydroxyl or hydride are mobile and be diffused into the defective insulating layer of tool 386.
In addition, from the impurity that oxide semiconductor layer removes and is diffused into having defective insulating layer 386 to When oxide semiconductor layer moves back, oxygen excess oxide insulating layer 389 plays a part of protective layer (barrier layer), with impurity knot Merging makes its stabilization, to prevent impurity from entering oxide semiconductor layer.
As described above, such as hydrogen, moisture, hydroxyl or hydride by causing variation from oxide semiconductor layer removal Impurity, be capable of providing the oxide semiconductor layer 382 of the impurity with reduction.In addition, playing a part of the oxygen mistake on barrier layer Amount oxide insulating layer 389 prevents the impurity for having diffused into and having in defective insulating layer 386 to be again introduced into oxide half Conductor layer；Oxide semiconductor layer 382 can be thus set to keep low impurity concentration.
Thin film transistor (TFT) 380 can be formed by above-mentioned technical process.
Later, in order to reduce thin film transistor (TFT) electrical characteristics variation, can be in inert gas atmosphere or nitrogen atmosphere Execute heat treatment (being equal to or higher than 150 DEG C, be less than 350 DEG C).For example, the temperature at 250 DEG C in nitrogen atmosphere executes at heat Manage 1 hour.Note that for making the impurity of such as hydrogen be diffused into the heat having in defective insulating layer from oxide semiconductor layer Processing can be combined with the heat treatment.
It can be executed in the temperature of 100 DEG C (containing) to 200 DEG C (containing) in air and be heat-treated 1 hour (containing) to 30 hours (containing).In this embodiment, the temperature at 150 DEG C executes heat treatment 10 hours.Can be executed under fixed heating temperature should Heat treatment.Alternatively, following heating temperature variation repeatedly can be carried out repeatedly：Heating temperature is set to be increased to 100 DEG C from room temperature (containing) to the temperature of 200 DEG C (containing), is reduced to room temperature later.Furthermore, it is possible to before forming the oxide insulating layer, dropping The heat treatment is executed under low pressure.Under a reduced pressure, heat treatment time can be shortened.By the heat treatment, by hydrogen from Oxide semiconductor layer is introduced into oxide insulating layer；Nomal closed type thin film transistor (TFT) thus can be obtained.Therefore, it is possible to improve The reliability of semiconductor device.
Protection insulating layer 373 is formed on defective insulating layer 386 having.In this embodiment, pass through sputtering method shape At the silicon nitride layer of 100nm thickness as protection insulating layer 373.
The protection insulating layer 373 and first grid insulating layer 372a formed using insulating nitride layer is without containing such as wet The impurity of gas, hydrogen, hydride or hydroxide, and the impurity is prevented to be externally entering.
Therefore, in the manufacturing process after protection insulating layer 373 is formed, the impurity of such as moisture can be prevented from outside Into.In addition, even if after completing as the device (such as, liquid crystal display device) of semiconductor device, it also can be long-term The impurity of such as moisture is prevented to be externally entering；Therefore, it is possible to improve the long-term reliability of device.
It is set to the protection insulating layer 373 formed using insulating nitride layer and first grid insulation furthermore, it is possible to remove Insulating layer between layer 372a, to make protection insulating layer 373 and first grid insulating layer 372a contact with each other.
Therefore, by the miscellaneous of such as moisture, hydrogen, hydride and the hydroxide that reduce as far as possible in oxide semiconductor layer Matter, and such impurity is prevented to be again introduced into, so as to make oxide semiconductor layer keep low impurity concentration.
Planarization insulating layer for realizing planarization can be provided on protection insulating layer 373.
As described above, by removing remaining moisture in reaction atmosphere when forming oxide semiconductor film, can reduce The concentration of hydrogen and hydride in oxide semiconductor film.In addition, there is defect by being provided on oxide semiconductor layer Insulating layer and setting oxygen excess Mixed Zone therebetween, so that the impurity of such as hydrogen or moisture in oxide semiconductor layer is expanded It is scattered in the defective insulating layer of tool, thus, it is possible to reduce the concentration of hydrogen and hydride in oxide semiconductor layer.Therefore, energy Enough stablize the oxide semiconductor layer.
Even if miscellaneous due to the heat treatment in step in impurity diffusion to after having in defective insulating layer 386 Matter towards oxide semiconductor layer 382 move back, play a part of barrier layer oxygen excess oxide insulating layer 389 will also prevent it is miscellaneous Matter enters oxide semiconductor layer 382.Thus, it is possible to which oxide semiconductor layer 382 is made to keep low impurity concentration.
The embodiment can be implemented with another embodiment of appropriate combination.
As described above, provide it is a kind of include there is the thin film transistor (TFT) of oxide semiconductor layer, with stable electricity Characteristic, highly reliable semiconductor device.
(embodiment 8)
In this embodiment, description can be applied to the example of the thin film transistor (TFT) of semiconductor device disclosed in this specification Son.
In this embodiment, the example by description by translucent conductive material for gate electrode layer, source electrode layer and drain electrode layer Son.In addition to this, thin film transistor (TFT) will be formed according to similar mode in above embodiment；Therefore, will omit pair with it is upper The repeated description of identical component or the component with similar functions and the weight to similar technique process in the embodiment in face Multiple description.In addition, also by omission to the detailed description of same section.
For example, material of the conductive material of transmission visible light as gate electrode layer, source electrode layer and drain electrode layer may be used Material.For example, the metal oxide based on In-Sn-O may be used, the metal oxide based on In-Sn-Zn-O, be based on In-Al- The metal oxide of Zn-O, the metal oxide based on Al-Ga-Zn-O, is based on the metal oxide based on Sn-Ga-Zn-O The metal oxide of Sn-Al-Zn-O, the metal oxide based on Sn-Zn-O, is based on the metal oxide based on In-Zn-O The metal oxide of Al-Zn-O, the metal oxide based on In-O, the metal oxide based on Sn-O or based on Zn-O's Metal oxide.Suitably its thickness can be set as in from the range of 50nm (containing) to 300nm (containing).As for grid The film forming method of the metal oxide of electrode layer, source electrode layer and drain electrode layer, using sputtering method, vacuum vapour deposition (electronics Beam evaporation method etc.), arc discharge ion plating or spray coating method etc..In the case where forming film using sputtering method, may be used Include the SiO of 2wt% (containing) to 10wt% (containing)2Target.
Note that the unit of the percentage composition of transparency conducting film is atomic percentage, and the percentage composition is logical It crosses the analysis using electron probe X-ray microanalysis instrument (EPMA) and estimates.
In the pixel equipped with thin film transistor (TFT), in the conductive film formation pixel electrode layer for using transmission visible light, such as When another wiring layer of another electrode layer of capacitor electrode layer or such as capacitor layer, realize with high opening The display device of rate.Needless to say, gate insulating layer, oxide insulating layer, protection insulating layer and planarization insulating layer are each excellent Choosing is formed using the film of transmission visible light.
In the present specification, the film for transmiting visible light refer to possessed by thickness make it have 75% to 100% it is visible The film of light transmission.In the case where the film is conductive, the film is known as transparent conductive film.Furthermore, it is possible to using The translucent conductive film of visible light is used as gate electrode layer, source electrode layer, drain electrode layer, pixel electrode layer, Ling Yi electricity The metal oxide of pole layer or another wiring layer.Described refers to having 50% to 75% to the translucent conductive film of visible light The film of transmission of visible light.
When thin film transistor (TFT) has light transmission features, aperture opening ratio can be improved.Especially for 10 inches or smaller small Type liquid crystal display panel, even if for example reducing Pixel Dimensions by improving the quantity of grid wiring to realize higher display When the resolution ratio of image, high aperture can be also realized.In addition, by that will have the film of light transmission features for thin film transistor (TFT) Component, even if can realize high aperture if when a pixel is divided into multiple sub-pixels to realize wide viewing angle.Namely It says, high aperture can be realized when densely arranging a cluster film transistor, thus display area can have foot Enough areas.For example, a pixel include two to four sub-pixels in the case of, since thin film transistor (TFT) has light transmission special Property, it is thus possible to improve aperture opening ratio.In addition, being deposited using the step identical as the thin film transistor (TFT) and the formation of identical material When storing up electricity container, the storage can also have light transmission features；Therefore, it is possible to further increase aperture opening ratio.
The embodiment can be implemented with another embodiment of appropriate combination.
(embodiment 9)
In this embodiment, description can be applied to the example of the thin film transistor (TFT) of semiconductor device disclosed in this specification Son.
In this embodiment, Figure 18 shows in cross section the example that oxide semiconductor layer is surrounded by nitride insulation film Son.Other than the position of the end of oxide insulating layer and top surface shape and the structure of gate insulating layer, Figure 18 and figure 1A to 1E is identical, therefore will use the same reference numerals to represent identical part, and will omit to the detailed of same section Description.
Thin film transistor (TFT) 180 in Figure 18 is bottom grid film transistor, and it is included in insulating surface Substrate 100 on gate electrode layer 111, the gate insulating layer 142a, exhausted using oxide that is formed using insulating nitride layer Edge layer formed gate insulating layer 142b, oxide semiconductor layer 112, oxygen excess Mixed Zone 119, source electrode layer 115a and Drain electrode layer 115b.Further it is provided that tool defective insulating layer 146, covers thin film transistor (TFT) 180, and and oxide Semiconductor layer 112 is overlapped and Mixed Zone 119 is planted therebetween.It is adopted having to be additionally provided on defective insulating layer 146 The protection insulating layer 143 formed with insulating nitride layer.Protecting insulating layer 143 and gate insulating layer 142a, (it is that nitride is exhausted Edge layer) contact.
Since oxygen excess Mixed Zone 119 has, (hydrogen atom or compound containing hydrogen atom are (such as with hydrogen or moisture H2O high combination energy)), and these impurity are stabilized in oxygen excess Mixed Zone 119 and have in defective insulating layer 146, These impurity can be thus made to be diffused into oxygen excess Mixed Zone from oxide semiconductor layer and have defective insulating layer 146 In, thus, it is possible to remove these impurity from oxide semiconductor layer.In addition, oxygen excess Mixed Zone 119 is as to having spread To the effect on the barrier layer for having the impurity in defective insulating layer 146, to prevent impurity to be again introduced into oxide semiconductor Layer 112；Oxide semiconductor layer 112 can be thus set to keep low impurity concentration.Therefore, including wherein reduce and cause variation The film of such as oxide semiconductor layer 112 of the impurity of hydrogen, moisture, hydroxyl or hydride (be otherwise known as hydrogen compound) is brilliant Body pipe 180 is a kind of highly reliable thin film transistor (TFT) with stable electrical characteristics.
In the thin film transistor (TFT) 180 of the embodiment, gate insulating layer has laminated construction, in the laminated construction, Stacked nitride insulating layer and oxide insulating layer on gate electrode layer.In addition, being formed being formed by insulating nitride layer Protection insulating layer 143 before, be optionally removed the defective insulating layer 146 of tool and gate insulating layer 142b, adopted with exposing The gate insulating layer 142a formed with insulating nitride layer.
The area at least having the area of the top surface of defective insulating layer 146 and the top surface of gate insulating layer 142b is big In the area of the top surface of oxide semiconductor layer 112, and has the preferred covering thin film transistor (TFT) of defective insulating layer 146 180。
In addition, forming protection insulating layer 143 using insulating nitride layer, its covering is made to have defective insulating layer 146 The side surface of top surface and tool defective insulating layer 146 and gate insulating layer 142b, and make protection insulating layer 143 and use The gate insulating layer 142a contacts that insulating nitride layer is formed.
For each protection insulating layer 143 and first grid insulating layer 142a for being all made of insulating nitride layer formation, make With without containing such as moisture, hydrogen ion and OH-Impurity and the inorganic insulating membrane that prevents the impurity to be externally entering：Example Such as, using silicon nitride film, oxygen silicon nitride membrane, aluminium nitride film or the aluminium oxynitride by sputtering method or plasma CVD method acquisition Film.
In this embodiment, it is taken as the protection insulating layer 143 of nitride insulation film formation, is formed by RF sputtering methods The silicon nitride layer of 100nm thickness, to cover top surface and the side surface of the oxide semiconductor layer 112.
Using structure shown in Figure 18, due to being provided about oxide semiconductor layer and the grid being in contact with it is exhausted Edge layer 142b and the defective insulating layer 146 of tool, reduce such as hydrogen, moisture, hydroxyl or the hydrogen in oxide semiconductor layer The impurity of compound, and since oxide semiconductor layer is also further exhausted by each grid for being all made of insulating nitride layer formation Edge layer 142a and protection insulating layer 143 surround, it is thus possible to be prevented in forming the manufacturing process after protecting insulating layer 143 wet Gas is externally entering.In addition, even if after completing as the device (for example, as display device) of semiconductor device Moisture can be avoided to be externally entering for a long time；Thus, it is possible to improve the long-term reliability of device.
In this embodiment, a thin film transistor (TFT) is surrounded by insulating nitride layer；However, the embodiment of the present invention is unlimited In the structure.
Multiple thin film transistor (TFT)s can be made to be surrounded by insulating nitride layer, or multiple films in pixel portion can be made Transistor is surrounded by insulating nitride layer.It can be formed and wherein insulating layer 143 and gate insulating layer 142a be protected to contact with each other Region, with around the pixel portion of active array substrate.
The embodiment can be implemented with another embodiment of appropriate combination.
(embodiment 10)
In this embodiment, description is utilized in the semiconductor device according to any embodiment in embodiment 1 to 9 thin Film transistor and the example that active matrix light emitting display device is manufactured using electroluminescent light-emitting component.
It is organic compound or inorganic compound come to utilizing electroluminescent light-emitting component to carry out according to luminescent material Classification.Generally, the former is known as organic EL element, and the latter is known as inorganic EL devices.
In organic EL element, by light-emitting component apply voltage, electrons and holes from a pair of electrodes be injected separately into In layer containing luminous organic compound, and electric current flows through.Later, these carriers (that is, electrons and holes) are compound, and Send out light.Due to such mechanism, this light-emitting component is known as current excitation type light-emitting component.
Inorganic EL devices are categorized into dispersal type inorganic EL devices and thin film phosphor el element according to component structure.Dispersal type Inorganic EL devices have such luminescent layer, and in the luminescent layer, the particle of luminescent material is dispersed in adhesive, shine Mechanism is compound luminous using the donor-acceptor of donor level and acceptor level.Thin film phosphor el element has such knot Structure, wherein luminescent layer are sandwiched between dielectric layer, they are further pressed from both sides between the electrodes again, and luminous mechanism is to utilize gold The local type for belonging to hypostracum (inner-shell) electron transition of ion shines.Note that herein using organic EL element as shine Element is described.
Fig. 9 shows the example of dot structure, which is used as and can be driven by digit time grayscale method Semiconductor device example.
The pixel that description can be driven to drive by application digit time grayscale is structurally and operationally.In the example In, a pixel includes two n-channel transistors, and each n-channel transistor includes oxide semiconductor layer as channel shape At region.
Pixel 6400 includes switching transistor 6401, driving transistor 6402, light-emitting component 6404 and capacitor 6403.It opens The grid for closing transistor 6401 is connected to scan line 6406, the first electrode of switching transistor 6401 (source electrode and drain electrode it One) it is connected to signal wire 6405, the second electrode of switching transistor 6401 (in source electrode and drain electrode another) is connected to The grid of driving transistor 6402.The grid of driving transistor 6402 is connected to power cord 6407 by capacitor 6403, driving The first electrode of transistor 6402 is connected to power cord 6407, and the second electrode of driving transistor 6402 is connected to light-emitting component 6404 first electrode (pixel electrode).The second electrode of light-emitting component 6404 corresponds to public electrode 6408.Public electrode 6408 are electrically connected to the public equipotential lines being arranged in same substrate.
Note that setting the second electrode (public electrode 6408) of light-emitting component 6404 to low power supply potential.Note that described Low power supply potential is the current potential than being supplied to the high power supply potential of power cord 6407 low.For example, can GND or 0V be set as low Power supply potential.Potential difference between high power supply potential and low power supply potential is applied on light-emitting component 6404, to electric current stream Light-emitting component 6404 is crossed, thus light-emitting component 6404 shines.Thus, each current potential is arranged so that high power supply potential and low electricity Difference between source electric potential is more than or equal to the forward threshold voltage of light-emitting component 6404.
When substituting capacitor 6403 using the gate capacitance of driving transistor 6402, it is convenient to omit capacitor 6403.Driving The gate capacitance of transistor 6402 can be formed between channel region and gate electrode.
Here, In the case of using control source voltage driving method, vision signal is input to driving transistor 6402 Grid, to keep driving transistor 6402 fully on or off.That is, the work in linear zone of driving transistor 6402 Make, thus, apply the voltage higher than the voltage of power cord 6407 to the grid of driving transistor 6402.Note that signal wire 6405 are applied more than the V equal to power line voltage and driving transistor 6402thThe sum of voltage.
It, can be by different ways in the case where using analogue gray-scale method rather than digit time grayscale method Input signal and utilize in Fig. 9 identical dot structure.
Using analogue gray-scale method, it is applied more than to the grid of driving transistor 6402 equal to as luminous The V of the forward voltage and driving transistor 6402 of element 6404thThe sum of voltage voltage.The forward voltage of light-emitting component 6404 Refer to the voltage for obtaining expected brightness, at least more than forward threshold voltage.Make driving crystal by incoming video signal Pipe 6402 can be in saturation region operation, and thus, it is possible to provide electric current to light-emitting component 6404.In order to make driving transistor 6402 can In saturation region operation, the current potential of power cord 6407 to be set higher than to the grid potential of driving transistor 6402.Using simulation When vision signal, electric current can be fed to light-emitting component 6404 according to the vision signal, and execute analogue gray-scale driving.
Note that dot structure is not limited to structure shown in Fig. 9.For example, the pixel in Fig. 9 may further include switch, Resistor, capacitor, transistor or logic circuit etc..
The structure of light-emitting component is described next with reference to Figure 10 A to 10C.Here, wherein driving TFT will be used for n ditches The example of road TFT describes the cross section structure of pixel.It can be according to brilliant with the film described in any embodiment in embodiment 1-8 Driving TFT 7011,7021 and 7001 of the body pipe similar mode manufacture for semiconductor device shown in Figure 10 A to 10C, institute It is each hair transmissive thin-film transistor for all including oxide semiconductor layer to state driving TFT 7011,7021 and 7001.
In order to extract the light emitted from the light-emitting component, at least one of anode and cathode should be transparent. As the light-emitting component formed in same substrate with thin film transistor (TFT), there are following structures：Wherein by opposite with substrate Surface extraction light top emission structure, wherein by the bottom-emission structure of the surface extraction light of substrate and wherein logical Cross the double emission structure of the surface extraction light of the surface opposite with substrate and substrate.The dot structure can be applied to have The light-emitting component of these arbitrary emitting structurals.
It will be with reference to light-emitting component of the figure 10A descriptions with bottom-emission structure.
It shows that in driving TFT 7011 be n-channel TFT, and is sent out from light-emitting component 7012 to 7013 side of first electrode Penetrate the sectional view of the pixel in the case of light.In Figure 10 A, led in the light transmission that drain electrode layer is electrically connected to driving TFT 7011 The first electrode 7013 of light-emitting component 7012 is formed on electrolemma 7017, and is stacked in order on the first electrode 7013 EL layers 7014 and second electrode 7015.
As transparency conducting film 7017, the transparency conducting film of materials described below may be used, such as：Oxidation containing tungsten oxide Indium, the indium zinc oxide containing tungsten oxide, the indium oxide containing titanium oxide, the tin indium oxide containing titanium oxide, tin indium oxide, oxidation Indium zinc or the tin indium oxide for being added to silica.
Any materials in multiple material can be used for the first electrode 7013 of light-emitting component.For example, electric by first In the case that pole 7013 is used as cathode, it is preferred to use such as material with low work function forms first electrode 7013, described Material with low work function is such as：Alkali metal, such as Li or Cs；Alkaline-earth metal, such as Mg, Ca or Sr；Contain these metals In arbitrary metal alloy (for example, Mg:Ag or Al:Li)；Alternatively, rare earth metal, such as Yb or Er.It, will in Figure 10 A The thickness of first electrode 7013 is set as that light transmission (preferably about 5nm to 30nm) can be made.For example, by the thickness with 20nm Aluminium film be used as first electrode 7013.
Note that transparency conducting film and the aluminium film can be stacked, selective etch is carried out to it later, is led with forming light transmission Electrolemma 7017 and first electrode 7013；In such a case, it is possible to using same mask etching transparency conducting film 7017 and first Electrode 7013, this is preferred.
Peripheral part of first electrode 7013 is covered using separator 7019.Using polyimides, acrylic resin, polyamides The organic resin film of amine or epoxy resin etc., inorganic insulating membrane or organopolysiloxane, to form separator 7019.Especially It is preferred that forming separator 7019 using photosensitive resin material, make it that there is opening on first electrode 7013, and will be described The side wall of opening is formed to have the inclined surface of continuous curvature.The case where photosensitive resin material is used for separator 7019 Under, it is convenient to omit the step of forming Etching mask.
Luminescent layer can be included at least by being formed in the EL layers 7014 on the first electrode 7013 and separator 7019, and And it can be formed single layer or multiple layers of lamination.When EL layers 7014 are formed as multiple layers of lamination, by Play a part of being stacked electron injecting layer, electron transfer layer, luminescent layer, hole biography on the first electrode 7013 of cathode in order Defeated layer and hole injection layer form the EL layers 7014.Note that not needing to provide all layers in these layers.
Stacking order is not limited to above-mentioned stacking order.First electrode 7013 may be used as anode, and can be described Hole injection layer, hole transmission layer, luminescent layer, electron transfer layer and electron injecting layer are stacked on one electrode 7013 in order. However, from the point of view of the position of power consumption, first electrode 7013 is preferably used as cathode, and on the first electrode 7013 in order Stacked electron injecting layer, electron transfer layer, luminescent layer, hole transmission layer and hole injection layer, because driving circuit can be inhibited Voltage in part increases, and can reduce power consumption.
As the second electrode 7015 being formed on the EL layers 7014, a variety of materials may be used.For example, by In the case that two electrodes 7015 are used as anode, for example, it is preferable to which there is high work function using such as ZrN, Ti, W, Ni, Pt or Cr Material or the translucent conductive material of such as ITO, IZO or ZnO form second electrode 7015.In addition, in second electricity Barrier film 7016 is provided on pole 7015, for example, the metal of blocking light or the metal of reflected light.In this embodiment, by ITO Film is used as second electrode 7015, and Ti films are used as barrier film 7016.
Light-emitting component 7012 is sandwiched in first electrode 7013 and the second electricity corresponding to the EL layers 7014 including luminescent layer Region between pole 7015.In the component structure shown in Figure 10 A, emit from light-emitting component 7012 to 7013 side of first electrode Light, as shown by arrows.
Note that in the example shown in Figure 10 A, using transparency conducting film as gate electrode layer, and by this of light transmission Film is used for source electrode layer and drain electrode layer；Thus, the light emitted from light-emitting component 7012 pass through color-filter layer 7033 and substrate to Outer transmitting.
Colour filter is formed by droplet discharge method (ink-jet method), print process or using etching method of photoetching technique etc. Layer 7033.
Color-filter layer 7033 is covered with coat 7034, and is further coated with protection insulating layer 7035.Note that although In Figure 10 A, coat 7034 has small thickness, but coat 7034 has and makes due to thick caused by color-filter layer 7033 The function of rough planarization.
It is formed in the position of the contact hole of the arrival drain electrode in protection insulating layer 7035, insulating layer 7032 and insulating layer 7031 Install be set to it is Chong Die with separator 7019.
Next, by with reference to light-emitting component of the figure 10B descriptions with double emission structure.
In fig. 1 ob, hair is formed on the transparency conducting film 7027 that drain electrode layer is electrically connected to driving TFT 7021 The first electrode 7023 of optical element 7022, and it is stacked EL layers 7024 and the second electricity in order on the first electrode 7023 Pole 7025.
As transparency conducting film 7027, the transparency conducting film of following material may be used, such as：Oxidation containing tungsten oxide Indium, the indium zinc oxide containing tungsten oxide, the indium oxide containing titanium oxide, the tin indium oxide containing titanium oxide, tin indium oxide, oxidation Indium zinc or the tin indium oxide for being added to silica.
Any materials in multiple material can be used for first electrode 7023.For example, being used as by first electrode 7023 In the case of cathode, it is preferred to use such as material with low work function forms first electrode 7023, described have low work content Several materials are such as：Alkali metal, such as Li or Cs；Alkaline-earth metal, such as Mg, Ca or Sr；Contain the arbitrary gold in these metals The alloy of category is (for example, Mg:Ag or Al:Li)；Or rare earth metal, such as Yb or Er.In this embodiment, by first electrode 7023 are used as cathode, and the thickness of first electrode 7023 is arranged so that and is transmissive to light (preferably about 5nm to 30nm).Example Such as, the aluminium film of the thickness with 20nm is used as first electrode.
Note that transparency conducting film and the aluminium film can be stacked, selective etch is carried out to it later, is led with forming light transmission Electrolemma 7027 and first electrode 7023；In such a case, it is possible to using same mask etching transparency conducting film 7027 and first Electrode 7023, this is preferred.
Peripheral part of first electrode 7023 is covered with separator 7029.Using polyimides, acrylic resin, polyamides The organic resin film of amine or epoxy resin etc., inorganic insulating membrane or organopolysiloxane, to form separator 7029.Especially It is preferred that forming separator 7029 using photosensitive resin material, make it that there is opening on first electrode 7023, and will be described The side wall of opening is formed to have the inclined surface of continuous curvature.The case where photosensitive resin material is used for separator 7029 Under, it is convenient to omit the step of forming Etching mask.
The EL layers 7024 being formed on the first electrode 7023 and separator 7029 may include luminescent layer, and can To form it into single layer or multiple layers of lamination.When EL layers 7024 are formed as multiple layers of lamination, by playing Electron injecting layer, electron transfer layer, luminescent layer, hole transmission layer are stacked on the first electrode 7023 of the effect of cathode in order The EL layers 7024 are formed with hole injection layer.Note that not needing to provide all layers in these layers.
Stacking order is not limited to above-mentioned stacking order.First electrode 7023 may be used and be used as anode, and can be in institute It states and is stacked hole injection layer, hole transmission layer, luminescent layer, electron transfer layer and electron injecting layer on anode in order.However, From the point of view of the position of power consumption, first electrode 7023 is preferably used as cathode, and be stacked electronics note in order on the cathode Enter layer, electron transfer layer, luminescent layer, hole transmission layer and hole injection layer, because power consumption can be reduced.
As the second electrode 7025 being formed on the EL layers 7024, a variety of materials may be used.For example, by In the case that two electrodes 7015 are used as anode, it is preferred to use the material with high work function, for example, such as ITO, IZO or ZnO Translucent conductive material, to form second electrode 7025.In this embodiment, second electrode 7026 is used as anode, and is formed and is contained The ito film of silica.
Light-emitting component 7022 is sandwiched in first electrode 7023 and the second electricity corresponding to the EL layers 7024 including luminescent layer Region between pole 7025.In the component structure shown in Figure 10 B, both sent out from light-emitting component 7022 to 7025 side of second electrode Light, and shine to 7023 side of first electrode, as shown by arrows.
Note that in the example shown in Figure 10 B, using transparency conducting film as gate electrode layer, and by this light transmission Film is used for source electrode layer and drain electrode layer；The light thus emitted from light-emitting component 7022 to 7023 side of first electrode passes through colour filter Device layer 7043 and substrate emit outward.
Colour filter is formed by droplet discharge method (ink-jet method), print process or using etching method of photoetching technique etc. Layer 7043.
Color-filter layer 7043 is covered with coat 7044, and is further coated with protection insulating layer 7045.
It will be formed in the contact hole of the arrival drain electrode in protection insulating layer 7045, insulating layer 7042 and insulating layer 7042 Position is set as Chong Die with separator 7029.
Note that using the light-emitting component with double emission structure, and when two display surfaces execute total colouring, from The obstructed color filter layer of light 7043 of 7025 side of second electrode transmitting；Therefore it preferably provides and is equipped on second electrode 7025 The seal substrate of another color-filter layer.
It will be with reference to light-emitting component of the figure 10C descriptions with top emission structure.
It is n-channel TFT and from light-emitting component 7002 to second electrode 7,005 1 that Figure 10 C, which are shown in driving TFT 7001, The sectional view of pixel in the case that side is luminous.In fig 1 oc, the drain electrode layer and 7003 phase of first electrode of TFT 7001 are driven Mutually contact, and TFT 7001 and the first electrode 7003 of light-emitting component 7002 is driven to be electrically connected to each other.In first electrode 7003 On be stacked EL layers 7004 and second electrode 7005 in order.
Any materials in multiple material can be used for the first electrode 7003 of light-emitting component.For example, in first electrode In the case that 7003 are used as cathode, it is preferred to use the material for example with low work function forms first electrode 7003, described to have The material of low work function is such as：Alkali metal, such as Li or Cs；Alkaline-earth metal, such as Mg, Ca or Sr；Containing in these metals The alloy of arbitrary metal is (for example, Mg:Ag or Al:Li)；Or rare earth metal, such as Yb or Er.
Peripheral part of first electrode 7003 is covered with separator 7009.Using polyimides, acrylic resin, polyamide Or the organic resin film of epoxy resin etc., inorganic insulating membrane or organopolysiloxane, to form separator 7009.It is especially excellent Choosing forms separator 7009 using photosensitive resin material, so that it is had opening on first electrode 7003, and opened described The side wall of mouth is formed with the inclined surface of continuous curvature.The case where photosensitive resin material is used for separator 7009 Under, it is convenient to omit the step of forming Etching mask.
Luminescent layer can be included at least by being formed in the EL layers 7004 on the first electrode 7003 and separator 7009, and And it can be formed single layer or multiple layers of lamination.When EL layers 7004 are formed as multiple layers of lamination, by As on the first electrode 7003 of cathode in order be stacked electron injecting layer, electron transfer layer, luminescent layer, hole transmission layer and Hole injection layer forms the EL layers 7004.Note that not needing to provide all layers in these layers.
Stacking order is not limited to above-mentioned stacking order.It is stacked hole in order on the first electrode 7003 as anode Implanted layer, hole transmission layer, luminescent layer, electron transfer layer and electron injecting layer.
In fig 1 oc, it is stacked on the stacked film of Ti films, aluminium film and Ti films in order wherein, is stacked hole in order Implanted layer, hole transmission layer, luminescent layer, electron transfer layer and electron injecting layer, and it is formed on Mg:Ag alloy firms and The overlapped layers of ITO.
In the case where it is n-channel TFT to drive TFT 7001, it is stacked electronics in order preferably on first electrode 7003 Implanted layer, electron transfer layer, luminescent layer, hole transmission layer and hole injection layer, because the voltage in driving circuit can be inhibited It increases, and power consumption can be reduced.
Second electrode 7005 is formed using the translucent conductive material of transmitted light, such as the light transmission of following material may be used and lead Electrolemma：Indium oxide containing tungsten oxide, the indium oxide containing titanium oxide, contains titanium oxide at the indium zinc oxide containing tungsten oxide Tin indium oxide, tin indium oxide, indium zinc oxide or the tin indium oxide etc. for being added to silica.
Light-emitting component 7002 is sandwiched in first electrode 7003 and the second electricity corresponding to the EL layers 7004 including luminescent layer Region between pole 7005.In the component structure shown in Figure 10 C, emit from light-emitting component 7002 to 7005 side of second electrode Light, as shown by arrows.
In fig 1 oc, by the drain electrode layer for driving TFT 7001 by being formed in the defective insulating layer 7051 of tool, protection Contact hole in insulating layer 7052, planarization insulating layer 7056, planarization insulating layer 7053 and insulating layer 7055 is electrically connected to One electrode 7003.For planarization insulating layer 7036,7046,7053 and 7056, resin material may be used, such as polyamides is sub- Amine, acrylic resin, benzocyclobutene, polyamide or epoxy resin.As the replacement to such resin material, may be used Advanced low-k materials (low-k materials), the resin based on siloxanes, phosphosilicate glass (PSG) or boron phosphorus silicate glass (BPSG) etc..Note that can by be stacked multiple insulating films formed by these materials come formed planarization insulating layer 7036, 7046,7053 and 7056.The method for forming planarization insulating layer 7036,7046,7053 and 7056 is not particularly limited.Root According to material, can by such as sputtering method, SOG methods, spin-coating method, dip coating, spray coating method or droplet discharge method (for example, ink-jet method, Silk screen print method or flexographic printing process) method, or by using such as scraper, roll coater, curtain formula coating machine or scrape The tool of knife coating machine etc., to form planarization insulating layer 7036,7046,7053 and 7056.
Separator 7009 can be provided, to make the first electrode of first electrode 7003 and adjacent pixel insulate.Using poly- The organic resin film of acid imide, acrylic resin, polyamide or epoxy resin etc., inorganic insulating membrane or organopolysiloxane, To form separator 7009.Particularly preferably using photosensitive resin material formed separator 7009, make its first electrode 7003 it Above there is opening, and the side wall of the opening is formed to have to the inclined surface of continuous curvature.By photosensitive resin material In the case of separator 7009, it is convenient to omit the step of forming Etching mask.
In the structure of Figure 10 C, when executing total colouring, for example, light-emitting component 7002 is used as transmitting green light element, One of adjacent light emitting element is used as to the element of transmitting feux rouges, another is used as to the element of transmitting blue light.Alternatively, may be used Four kinds of light-emitting component manufactures can carry out the luminous display unit of total colouring, and four kinds of light-emitting components include transmitting white light Element and three kinds of light-emitting components.
In the structure of Figure 10 C, the luminous display unit that can carry out total colouring can be manufactured by following mode, That is, all elements in a plurality of light-emitting elements arranged be emit white light element, and the light-emitting component 7002 it It is upper that the seal substrate with colour filter etc. is provided.It is foring the material that such as white solid color is presented and is being allowed to later When colour filter or color conversion layer are combined, it is able to carry out total colouring.
Any thin film transistor (TFT) in embodiment 1 to 9 can be suitably used as to the driving TFT for semiconductor device 7001,7011 and 7021, and the step similar with the thin film transistor (TFT) in embodiment 1 to 9 and material formation drive may be used Dynamic TFT 7001,7011 and 7021.It includes in oxide semiconductor layer and having defect to drive TFT 7001,7011 and 7021 Insulating layer 7051,7031 or 7041 between oxygen excess Mixed Zone.As in Example 2, oxygen excess oxygen can be provided Compound insulating layer replaces the oxygen excess Mixed Zone.Oxygen excess oxide insulating layer will generate and the work of oxygen excess Mixed Zone With similar effect.
Since the oxygen excess Mixed Zone and the defective insulating layer 7031,7041 and 7051 of tool have and hydrogen or wet Gas (hydrogen atom or compound (such as H containing hydrogen atom2O high combination energy)), and these impurity are stabilized in institute It states in oxygen excess Mixed Zone and the insulating layer with many defects, it is thus possible to make these impurity from oxide semiconductor Layer is diffused into the oxygen excess Mixed Zone and the defective insulating layer of the tool 7031,7041 and 7051, thus, it is possible to from Oxide semiconductor layer removes these impurity.It is had diffused into defect in addition, the oxygen excess Mixed Zone plays to be directed to Insulating layer 7031,7041 and 7051 in impurity barrier layer effect, to prevent the impurity to be again introduced into the oxidation Object semiconductor layer；Oxide semiconductor layer can be thus set to keep low impurity concentration.Therefore, it include reducing and cause all of variation As hydrogen, moisture, hydroxyl or hydride (also known as hydrogen compound) impurity oxide semiconductor layer driving TFT 7001, 7011 and 7021 be the highly reliable thin film transistor (TFT) with stable electrical characteristics.
Needless to say, the display to shine using solid color can also be executed.For example, white light emission can be utilized to form illumination System, or monochromatic luminous forming region colour light emitting device can be utilized.
If necessary, optical film, such as polarizing coating, including circular polarizing disk can be provided.
Although there has been described organic EL elements as light-emitting component, inorganic EL devices can also be provided as substituting As light-emitting component.
Although it have been described that the thin film transistor (TFT) for the driving for controlling light-emitting component (driving TFT) is wherein electrically connected to hair The example of optical element, wherein will be between the TFT connections between driving TFT and light-emitting component for controlling electric current but can also use Structure.
The embodiment can be implemented with another embodiment of appropriate combination.
(embodiment 11)
In this embodiment, by be described with reference to figure 11a and 11b light emitting display panel (also known as luminescent panel) appearance and Section.Figure 11 A are the plan views of panel, and in the panel, the film that the first substrate is will be formed in using sealant is brilliant Body pipe and encapsulating luminescent element are between first substrate and the second substrate.Figure 11 B are sections obtained along the H-I lines of Figure 11 A Face figure.
There is provided sealant 4505, with around be arranged on the first substrate 4501 pixel portion 4502, signal wire drive Circuit 4503a and 4503b and scan line drive circuit 4504a and 4504b.In addition, being driven in pixel portion 4502, signal wire The second substrate 4506 is provided on dynamic circuit 4503a and 4503b and scan line drive circuit 4504a and 4504b.Therefore, lead to The first substrate 4501, sealant 4505 and the second substrate 4506 are crossed by the pixel portion 4502, signal-line driving circuit 4503a It is sealed together with filler 4507 with 4503b and scan line drive circuit 4504a and 4504b.It is preferred that high airtight to have Either protective film (for example, junction film or ultraviolet curable resin film) seals panel to the covering material of property and low out gassing It fills (sealing), to make the pixel portion 4502, signal-line driving circuit 4503a and 4503b and scan line drive circuit 4504a and 4504b are not exposed to air.
It is formed in the pixel portion 4502 on the first substrate 4501, signal-line driving circuit 4503a and 4503b and sweeps It includes multiple thin film transistor (TFT)s that it is each, which to retouch line drive circuit 4504a and 4504b,.As an example, being shown in Figure 11 B described The film crystal that the thin film transistor (TFT) 4510 and the signal-line driving circuit 4503a that pixel portion 4502 includes include Pipe 4509.
Can any thin film transistor (TFT) in embodiment 1 to 9 be suitably used as thin film transistor (TFT) 4509 and 4510, and May be used the step similar with the thin film transistor (TFT) in embodiment 1 to 9 and material formed the thin film transistor (TFT) 4509 and 4510.Thin film transistor (TFT) 4509 and 4510 includes in oxide semiconductor layer and having the oxygen between defective insulating layer 4542 Excessive Mixed Zone (not shown).The oxygen mistake is replaced with oxygen excess oxide insulating layer in example 2, can be provided Measure Mixed Zone.Oxygen excess oxide insulating layer will generate the effect similar with the effect of oxygen excess Mixed Zone.
Due to the oxygen excess Mixed Zone and the insulating layer with many defects with hydrogen or moisture (hydrogen atom or Person contains compound (such as H of hydrogen atom2O high combination energy)), and these impurity are stabilized in the oxygen excess mixing Region and have in defective insulating layer 4542, it is thus possible to so that these impurity is spread from oxide semiconductor layer by heat treatment Into the oxygen excess Mixed Zone and the defective insulating layer of the tool 4542, thus, it is possible to be removed from oxide semiconductor layer These impurity.In addition, the oxygen excess Mixed Zone is played for the impurity having diffused into the defective insulating layer of tool The effect on barrier layer, to prevent the impurity to be again introduced into the oxide semiconductor layer；Thus it can make oxide semiconductor Layer keeps low impurity concentration.Therefore, it include reducing the impurity of such as hydrogen for causing variation, moisture, hydroxyl or hydride The thin film transistor (TFT) 4509 and 4510 of oxide semiconductor layer is the highly reliable thin film transistor (TFT) with stable electrical characteristics.
Note that there is the thin film transistor (TFT) 4509 for driving circuit conductive layer, the conductive layer to be in and the film The position of channel formation region overlapping in oxide semiconductor layer in transistor.In this embodiment, the film crystal Pipe 4509 and 4510 is n-channel thin film transistor.
Conductive layer 4540 is arranged on the part for having defective insulating layer 4542, and for the thin of driving circuit Channel formation region overlapping in oxide semiconductor layer in film transistor 4509.With the raceway groove in oxide semiconductor layer Conductive layer 4540 is provided on the position of forming region overlapping, thus, it is possible to reduce thin film transistor (TFT) 4509 before and after BT is tested Threshold voltage variable quantity.The current potential of conductive layer 4540 can it is identical as the current potential of the gate electrode layer of thin film transistor (TFT) 4509 or It is different.Conductive layer 4540 is also used as the second gate electrode layer.Alternatively, the current potential of conductive layer 4540 can be GND or 0V, or Person's conductive layer 4540 may be at floating state.
In addition, conductive layer 4540 also plays a part of stopping external electrical field, that is, playing prevents external electrical field (especially anti- Only electrostatic) influence the effect of internal (circuit part for including thin film transistor (TFT)).The barrier functionality of conductive layer 4540 can prevent The electrical characteristics of thin film transistor (TFT) are changed due to the influence of the external electrical field of such as electrostatic.
In addition, forming the defective insulating layer of tool 4542 of the oxide semiconductor layer of covering thin film transistor (TFT) 4510.It is thin The source electrode layer or drain electrode layer of film transistor 4510 are electrically connected to the wiring layer 4550 in opening, and the opening is formed in In the defective insulating layer 4542 of tool and insulating layer 4551 that are arranged on the thin film transistor (TFT).Wiring layer 4550 is formed To be contacted with first electrode 4517, and thin film transistor (TFT) 4510 is electrically connected to by first electrode 4517 by wiring layer 4550.
May be used the material and method similar with the defective insulating layer 116 of tool described in embodiment 1 formed it is described Has defective insulating layer 4542.
Color-filter layer 4545 is formed on insulating layer 4551, so that it is Chong Die with the light-emitting zone of light-emitting component 4511.
In addition, in order to reduce the surface roughness of color-filter layer 4545, to play a part of the coating of planarization insulating film Layer 4543 covers color-filter layer 4545.
In addition, forming insulating layer 4544 on coat 4543.Can with protection insulating layer described in embodiment 1 103 similar modes form insulating layer 4544, and can form silicon nitride film for example, by sputtering method.
In addition, reference numeral 4511 indicates light-emitting component.It will be used as by wiring layer 4550 and be included in light-emitting component The first electrode 4517 of pixel electrode in 4511 is electrically connected to the source electrode layer or drain electrode layer of thin film transistor (TFT) 4510.Note Meaning, although in this embodiment, it includes first electrode 4517, electroluminescence layer 4512 and second electrode that light-emitting component 4511, which has, 4513 laminated construction, but the structure of light-emitting component 4511 is without being limited thereto.It can be according to for example from the extraction of light-emitting component 4511 The direction of light suitably changes the structure of light-emitting component 4511.
Separator 4520 is formed using organic resin film, inorganic insulating membrane or organopolysiloxane.Particularly preferably use light Quick resin material forms the separator, so that it is had opening on first electrode 4517, and by the side wall of the opening It is formed to have the inclined surface of continuous curvature.
Electroluminescence layer 4512 can be formed as to single layer or multiple layers of lamination.
Oxygen, hydrogen, moisture, carbon dioxide etc. enter light-emitting component 4511 in order to prevent, in second electrode 4513 and can divide Protective film is formed on parting 4520.As the protective film, silicon nitride film, silicon oxynitride film or DLC film etc. can be formed.
In addition, from FPC 4518a and 4518b to signal-line driving circuit 4503a and 4503b, scan line drive circuit 4504a and 4504b or pixel portion 4502 provide various signals and current potential.
Connection terminal electrode is formed using the identical conductive film of the first electrode 4517 for including with light-emitting component 4511 4515.Terminal electrode is formed using the identical conductive film of the source electrode layer and drain electrode layer that include with thin film transistor (TFT) 4509 4516。
Connection terminal electrode 4515 is electrically connected to the terminal that FPC4518a includes by anisotropic conductive film 4519.
If first substrate or the second substrate are in from the direction that light-emitting component 4511 extracts light, need With light transmission features.In this case, using the light transmission material of such as glass plate, plastic plate, polyester film or acrylic resin film Material.
As filler 4507, the lazy of ultraviolet curable resin or thermosetting resin and such as nitrogen or argon gas may be used Property gas.For example, poly- (vinyl chloride) (PVC) may be used, acrylic resin, polyimides, epoxy resin, silicone resin, gather (butyral) (PVB) or ethylene (EVA) with vinylacetate.For example, nitrogen may be used as filler.
If it is necessary, optical film can suitably be provided on the light-emitting area of light-emitting component, such as, polarizing film, circle are inclined Shake piece (including ellipsoidal polarizing plate) or delay piece (quarter-wave plate or half wave plate).In addition, the polarizing film or circle Polarizing film can be equipped with antireflection film.For example, anti-glare treatment can be executed, the protrusion on surface can be passed through by the processing Make reflection light diffusion with recess, thus reduces dazzle.
The sealant can be formed by silk screen print method, ink-jet apparatus or dissemination apparatus.It, can as the sealant To use the material containing On Visible Light Cured Resin, ultraviolet-curing resin or thermosetting resin.Furthermore, it is possible to contain filler.
It may be mounted at the driving that the substrate being prepared separately is formed using single crystal semiconductor films or polycrystal semiconductor film Circuit, as signal-line driving circuit 4503a and 4503b and scan line drive circuit 4504a and 4504b.It alternatively, can be with Signal-line driving circuit or part thereof or scan line drive circuit or part thereof are only independently formed, is installed later.Structure It is not limited to structure shown in figure 11 A and 11B.
Highly reliable luminous display unit (the display surface as semiconductor device can be produced through the above steps Plate).
The embodiment can be implemented with another embodiment of appropriate combination.
(embodiment 12)
By with reference to figure 8A, 8B and 8C description as the appearance of the liquid crystal display panel of one embodiment of semiconductor device and Section.Fig. 8 A and 8C are that thin film transistor (TFT) 4010 and 4011 and liquid crystal cell 4013 are wherein sealed in sealant 4005 The plan view of panel between one substrate 4001 and the second substrate 4006.Fig. 8 B are sections obtained along the M-N lines of Fig. 8 A or Fig. 8 C Face figure.
Sealant 4005 is provided, is allowed to drive around the pixel portion 4002 and scan line that are arranged on the first substrate 4001 Dynamic circuit 4004.Second substrate 4006 is provided on the pixel portion 4002 and scan line drive circuit 4004.Therefore, lead to Cross the first substrate 4001, sealant 4005 and the second substrate 4006 by pixel portion 4002 and scan line drive circuit 4004 together with Liquid crystal layer 4008 seals together.By what is formed using single crystal semiconductor films or polycrystal semiconductor film in the substrate being prepared separately Signal-line driving circuit 4003 is installed to the region for being different from the region that sealant 4005 surrounds on the first substrate 4001 In.
Note that the connection method of the driving circuit to independently forming is not particularly limited, COG methods, conducting wire may be used Bonding method or TAB methods etc..Fig. 8 A show the example that signal-line driving circuit 4003 is installed by COG methods.Fig. 8 C show logical Cross the example of TAB methods installation signal-line driving circuit 4003.
It includes multiple films that the pixel portion 4002 on the first substrate 4001 and scan line drive circuit 4004, which is arranged, Transistor.As an example, Fig. 8 B show the thin film transistor (TFT) 4010 and scan line drive circuit that pixel portion 4002 includes 4004 thin film transistor (TFT)s 4011 for including.Oxygen excess oxide insulating layer is set on thin film transistor (TFT) 4010 and 4011 4043, have defective insulating layer 4041, protection insulating layer 4042 and insulating layer 4021.
Can any thin film transistor (TFT) in embodiment 1 to 9 be suitably used as thin film transistor (TFT) 4010 and 4011, and May be used the step similar with the thin film transistor (TFT) in embodiment 1 to 9 and material formed the thin film transistor (TFT) 4010 and 4011.Oxygen excess oxide insulating layer 4043 is provided between oxide semiconductor layer and the defective insulating layer of tool.With in reality It applies in example 1 equally, oxygen excess Mixed Zone can be provided and replace the oxygen excess oxide insulating layer.It oxygen excess Mixed Zone will Generate the effect similar with the effect of oxygen excess oxide insulating layer.
Since oxygen excess oxide insulating layer 4043 and the defective insulating layer 4041 of tool have and hydrogen or moisture (hydrogen atom Or compound (such as H containing hydrogen atom2O high combination energy)), and these impurity are stabilized in oxygen excess oxide Insulating layer 4043 and have in defective insulating layer 4041, it is thus possible to these impurity be made to be diffused into institute from oxide semiconductor layer It states oxygen excess oxide insulating layer 4043 and has in defective insulating layer 4041, thus, it is possible to be removed from oxide semiconductor layer These impurity.Have in defective insulating layer 4041 in addition, oxygen excess oxide insulating layer 4043 plays to be directed to have diffused into Impurity barrier layer effect, to prevent the impurity to be again introduced into the oxide semiconductor layer；Thus it can make institute It states oxide semiconductor layer and keeps low impurity concentration.Therefore, include reducing cause variation such as hydrogen, moisture, hydroxyl or The thin film transistor (TFT) 4010 and 4011 of the oxide semiconductor layer of the impurity of hydride is that the height with stable electrical characteristics can The thin film transistor (TFT) leaned on.In this embodiment, the thin film transistor (TFT) 4010 and 4011 is n-channel thin film transistor.
Conductive layer 4040 is arranged on a part for insulating layer 4021, with the thin film transistor (TFT) for driving circuit Channel formation region overlapping in oxide semiconductor layer in 4011.With the channel formation region in oxide semiconductor layer Conductive layer 4040 is provided on the position of overlapping, thus, it is possible to the threshold value of thin film transistor (TFT) 4011 before and after reducing BT tests is electric The variable quantity of pressure.The current potential of conductive layer 4040 can be identical or different with the current potential of the gate electrode layer of thin film transistor (TFT) 4011.It leads Electric layer 4040 is also used as the second gate electrode layer.Instead, the current potential of conductive layer 4040 can be GND or 0V, or conductive Layer 4044 may be at floating state.
In addition, conductive layer 4040 also plays a part of stopping external electrical field, that is, playing prevents external electrical field (especially anti- Only electrostatic) influence the effect of internal (circuit part for including thin film transistor (TFT)).The barrier functionality of conductive layer 4040 can prevent The electrical characteristics of thin film transistor (TFT) are changed due to the influence of the external electrical field of such as electrostatic.
The pixel electrode layer 4030 for including in liquid crystal cell 4013 be electrically connected to thin film transistor (TFT) 4010 source electrode layer or Drain electrode layer.The opposed electrode layer 4031 of liquid crystal cell 4013 is provided on the second substrate 4006.It is pixel electrode layer 4030, right It sets electrode layer 4031 and the overlapped part of liquid crystal layer 4008 corresponds to liquid crystal cell 4013.Note that pixel electrode layer 4030 The insulating layer 4032 and insulating layer 4033 for playing a part of alignment films, and liquid crystal layer are respectively equipped with opposed electrode layer 4031 4008 are sandwiched between pixel electrode layer 4030 and opposed electrode layer 4031 and insulating layer 4032 and 4033 is interposed therebetween.
Note that light-transmissive substrates may be used as the first substrate 4001 and the second substrate 4006；Glass, ceramics may be used Or plastics.The plastics can be fiberglass reinforced plastics (FRP) plate, polyvinyl fluoride (PVF) film, polyester film or acrylic acid Resin film.
Reference numeral 4035 indicates through the cylindricality interval body to the acquisition of the selective etch of insulating film, provides between the cylindricality Spacer is to control the distance between pixel electrode layer 4030 and opposed electrode layer 4031 (cell gap).Note that ball may be used Shape interval body.Opposed electrode layer 4031 is electrically connected to the common potential formed in the substrate for forming thin film transistor (TFT) 4010 Line.Commonly connected part may be used makes opposed electrode layer 4031 and public by the conductive particle between being arranged in a pair of of substrate Equipotential line is electrically connected to each other.Note that the conductive particle is included in sealant 4005.
Alternatively, the liquid crystal that blue phase is presented may be used, for the liquid crystal of blue phase is presented, do not need alignment films.It is blue It is mutually one of liquid crystalline phase, be created on just makes cholesteric phase become isotropic phase while improving the temperature of cholesteryl liquid crystal Before.Since blue phase only generates in narrow temperature range, thus by the liquid crystal composition of the chiral reagent containing 5wt% or more For liquid crystal layer 4008, to improve the temperature range.Liquid crystal composition including liquid crystal and chiral reagent that blue phase is presented has Less than or equal to the short response time of 1 millisecond (msec), and it is that light is isotropic；It therefore, there is no need to orientation process, and View angle dependency is low.Further, since alignment films need not be provided, accordingly it is possible to prevent friction (rubbing) handles friction treatment Caused electrostatic breakdown, and defect and the damage of liquid crystal display device can be reduced in the fabrication process.Thus, it is possible to improve The yield of liquid crystal display device.Thin film transistor (TFT) including oxide semiconductor layer especially has such possibility, that is, film Significant changes, and off-design range may occur because of the influence of electrostatic for the electrical characteristics of transistor.Therefore, by blue phase liquid crystal Material is for including that have the liquid crystal display device of the thin film transistor (TFT) of oxide semiconductor layer be relatively effective.
Note that in addition to transmissive liquid crystal display device, which can also show applied to transflective type of liquid crystal Device.
Although in the example of the liquid crystal display device, polarizing film is arranged (is in viewer in the outer surface of substrate Side) on, and dyed layer for display element and electrode layer are set gradually on the inner surface of substrate, but polarizing film It can be arranged on the inner surface of substrate.The overlapped layers structure of polarizer and dyed layer is not limited to the structure in the embodiment, can To be suitably set the structure according to the material of polarizer and dyed layer or the condition of process for making.Furthermore, it is possible to The light blocking film for playing a part of black matrix is provided in the part other than display portion.
On thin film transistor (TFT) 4011 and 4010 oxygen excess insulated by oxide is contiguously stacked with oxide semiconductor layer Layer 4043 and has defective insulating layer 4041.It may be used and 139 class of oxygen excess oxide insulating layer described in embodiment 2 As material and method form oxygen excess oxide insulating layer 4043.It may be used defective with tool described in embodiment 1 The similar material of insulating layer 116 and method, which are formed, has defective insulating layer 4041.
In addition, forming the protection insulating layer 4042 contacted on having defective insulating layer 4041.Can with reality It applies 103 similar mode of protection insulating layer described in example 1 and forms protection insulating layer 4042, and such as silicon nitride may be used Film.In addition, in order to reduce the surface roughness of thin film transistor (TFT), the insulating layer 4021 to play a part of planarization insulating film covers Lid protection insulating layer 4042.
It forms insulating layer 4021 and is used as planarization insulating film.It can will such as polyimides, acrylic resin, benzocyclobutane The heat-resisting organic material of alkene, polyamide or epoxy resin is used for insulating layer 4021.It, can as the replacement to such organic material With using advanced low-k materials (low-k materials), the resin based on siloxanes, phosphosilicate glass (PSG) or boron phosphoric silicate Glass (BPSG) etc..Note that insulating layer 4021 can be formed by the stacked multiple insulating films formed by these materials.
The forming method of insulating layer 4021 is not particularly limited.According to material, can by such as sputtering method, SOG methods, The method of spin-coating method, dip coating, spray coating method or droplet discharge method (for example, ink-jet method, silk screen print method or flexographic printing process), or Person by using scraper, roll coater, curtain formula coating machine or knife type coater etc. tool, to form insulating layer 4021.When the baking step of insulating layer 4021 and the annealing steps of semiconductor layer combine, semiconductor can be efficiently manufactured Device.
Translucent conductive material may be used to form pixel electrode layer 4030 and opposed electrode layer 4031, for example, containing aerobic Change indium oxide, the indium zinc oxide containing tungsten oxide, the indium oxide containing titanium oxide, the tin indium oxide containing titanium oxide, the oxygen of tungsten Change indium tin (hereinafter referred to as ITO), indium zinc oxide or the tin indium oxide for being added to silica.
The conductive compositions that can will contain conducting polymer (also known as conducting polymer) are used for 4030 He of pixel electrode layer Opposed electrode layer 4031.Preferably there is 10000 Ω/square or lower thin-layer electric using the pixel electrode that the conductive compositions are formed Resistance, and there is 70% or higher light transmittance at the wavelength of 550nm.In addition, the conductive polymer for including in the conductive compositions The resistivity of son is preferably 0.1 Ω cm or lower.
So-called π-electron conductive conjugated polymer may be used as the conducting polymer.Example include polyaniline and The copolymerization of two or more in its derivative, polypyrrole and its derivative, polythiophene and its derivative and these materials Object.
In addition, from FPC 4018 to the signal-line driving circuit 4003 independently formed, to scan line drive circuit 4004, or To pixel portion 4002, various signals and current potential are provided.
Connection terminal electrode is formed using conductive film identical with the pixel electrode layer 4030 for including in liquid crystal cell 4013 4015.Terminal is formed using conductive film identical with the source electrode layer and drain electrode layer that include in thin film transistor (TFT) 4010 and 4011 Electrode 4016.
Connection terminal electrode 4015 is electrically connected to the terminal that FPC 4018 includes by anisotropic conductive film 4019.
It independently forms signal-line driving circuit 4003 note that Fig. 8 A, 8B and 8C are shown and is installed in the first substrate Example on 4001；But it is not limited to this structure for the embodiment.Scan line drive circuit can be independently formed, later to its into Row installation, either can only independently form a part for signal-line driving circuit or a part for scan line drive circuit, it It is installed afterwards.
Suitably provide black matrix (shading layer), the optical component (optical substrate) of such as polarizing member, Delayed Components or Person's anti-reflection member etc..For example, circular polarization can be obtained by using polarization substrate and retardation substrate.Furthermore, it is possible to using the back of the body Light or sidelight etc. are used as light source.
In active matrix liquid crystal display apparatus, the pixel electrode according to matrix arrangements is driven, it is aobvious to be formed on the screen Diagram case.Specifically, apply voltage in selected pixel electrode and corresponding between the opposite electrode of the pixel electrode, to Optical modulation carried out to the liquid crystal layer that is set between the pixel electrode and the opposite electrode, viewer is by the optical modulation Recognize into display pattern.
When displaying moving images, liquid crystal display device has following problem：The long response time of liquid crystal molecule causes Image retention or moving image it is fuzzy.In order to improve the moving image characteristic of liquid crystal display device, it is inserted into using black is referred to as Driving method show black across the screen every a frame period in the method.
Furthermore, it is possible to using the driving method for being referred to as double frame rate drivings (double-frame rate driving), Wherein, vertical synchronizing frequency is set as 1.5 times of up to common vertical synchronizing frequency or higher or 2 times or higher, to carry High response speed.
Further alternatively, in order to improve the moving image characteristic of liquid crystal display device, such driving side may be used Method, that is, the area source as backlight is formed using multiple LED (light emitting diode) or multiple EL light sources, and a frame period In the independent each light source for driving the area source in a pulsed fashion.Three or more LED may be used or can adopt Use the LED of transmitting white light as the area source.Since multiple LED can be independently controlled, it is thus possible to the LED be made to shine Timing and to liquid crystal layer carry out optical modulation Timing Synchronization.In the driving method, the partly passes LED can be made It is disconnected；Therefore can obtain reduces the effect of power consumption, especially in the case where display has the image of big black portions.
Compared with custom liquid crystals display device, by combining these driving methods, the aobvious of liquid crystal display device can be improved Show characteristic, such as moving image characteristic.
Since thin film transistor (TFT) is easy to because of damages such as electrostatic, thus preferably with pixel portion and the same substrate of driving circuit On provide protection circuit.It is preferred that the non-linear element that use includes oxide semiconductor layer forms the protection circuit.For example, Protection circuit is provided between pixel portion and scan line input terminal and between pixel portion and signal wire input terminal.At this In embodiment, multiple protection circuits are provided, to prevent the damage of pixel transistor etc., the damage may be to be led by electrostatic etc. The surge voltage of cause is caused when being applied on scan line, signal wire and capacitor bus.Protection circuit is formed to work as surge When voltage is applied on the protection circuit charge is discharged to public wiring.In addition, the protection circuit includes the cloth that is mutually parallel The non-linear element set, scan line are therebetween.The non-linear element be such as diode two-terminal element either such as The three-terminal element of transistor.For example, can be formed with the step identical as the thin film transistor (TFT) in pixel portion described non-linear Element.For example, can be obtained and the class of diode by the way that the gate terminal of the non-linear element is connected to its drain terminal As characteristic.
For LCD MODULE, twisted nematic (TN) pattern may be used, in-plane switching (IPS) pattern, fringing field are cut Change (fringe field switching, FFS) pattern, axial symmetry is orientated micro unit (ASM) pattern, optical compensation birefringence (OCB) pattern, ferroelectric liquid crystals (FLC) pattern or anti ferroelectric liquid crystal (AFLC) pattern etc..
Semiconductor device disclosed in this specification is not particularly limited, may be used including TN liquid crystal, OCB liquid The liquid crystal display device of crystalline substance, stn liquid crystal, VA liquid crystal, ECB liquid crystal, GH liquid crystal, polymer dispersed liquid crystals or discotic mesogenic etc..Especially It is, it is preferred to use normally-black liquid crystal display panel, for example, using the transmissive liquid crystal display device of vertical orientation (VA) pattern.As The vertical alignment mode gives some examples.For example, it is vertical that multi-domain vertical alignment (MVA) pattern, patterning may be used (PVA) pattern of orientation and ASV patterns.
Further, it is also possible to which the embodiment is applied to VA liquid crystal display devices.The VA patterns of liquid crystal display device are a kind of Control the pattern of the orientation of the liquid crystal molecule of liquid crystal display panel.In VA liquid crystal display devices, when not applying voltage, liquid crystal Molecule is orientated along the vertical direction relative to panel surface.Furthermore, it is possible to using a kind of side being referred to as multidomain or multidomain design Pixel is divided into some regions (sub-pixel) by method by the method, and liquid crystal molecule is in its corresponding region along different Direction is orientated.
The embodiment can be implemented with another embodiment of appropriate combination.
(embodiment 13)
In this embodiment, it will be described as the example of the Electronic Paper of the semiconductor device of the embodiment of the present invention.
Figure 12 shows a kind of example of active matrix electronic paper as the semiconductor device for applying the embodiment of the present invention. Can any thin film transistor (TFT) in embodiment 1 to 9 be suitably used as thin film transistor (TFT) 581, and may be used and implement Thin film transistor (TFT) in example 1 to 9 similar step and material form the thin film transistor (TFT) 581.Thin film transistor (TFT) 581 includes place In oxide semiconductor layer and has the oxygen excess Mixed Zone between defective insulating layer 583.With in example 2, Oxygen excess oxide insulating layer can be provided and replace the oxygen excess Mixed Zone.Oxygen excess oxide insulating layer will generate and oxygen Excessive Mixed Zone acts on similar effect.
Due to the oxygen excess Mixed Zone and the defective insulating layer 583 of tool have with hydrogen or moisture (hydrogen atom or Compound (such as H containing hydrogen atom2O high combination energy)), and these impurity are in the oxygen excess Mixed Zone and tool Have in the insulating layer of many defects and stablize, it is thus possible to so that these impurity is diffused into the oxygen excess from oxide semiconductor layer and mix It closes in region and the defective insulating layer of the tool 583, thus, it is possible to remove these impurity from oxide semiconductor layer.In addition, The oxygen excess Mixed Zone is played for the work for having diffused into the barrier layer for having the impurity in defective insulating layer 583 With to prevent the impurity to be again introduced into the oxide semiconductor layer；Oxide semiconductor layer can be thus set to keep low miscellaneous Matter concentration.Therefore, such as hydrogen for causing variation, moisture, hydroxyl or hydride (also known as hydrogen compound) be include reducing The thin film transistor (TFT) 581 of the oxide semiconductor layer of impurity is the highly reliable thin film transistor (TFT) with stable electrical characteristics.
The Electronic Paper of Figure 12 is the example for the display device for using torsion ball display system.Reversing ball display system refers to Such a method, wherein make each there is the spherical particle of black and white to be arranged in as the electricity used in display element Between the first electrode layer and the second electrode lay of pole layer, and current potential is generated between the first electrode layer and the second electrode lay Thus difference executes display to control the orientation of spherical particle.
It is bottom grid film transistor to be set to the thin film transistor (TFT) 581 on substrate 580.Thin film transistor (TFT) 581 Source electrode layer or drain electrode layer in being formed in the defective insulating layer 583 of tool, protection insulating layer 584 and insulating layer 585 In opening in first electrode layer 587 contact and be connected electrically.
Spherical particle is provided between the first electrode layer 587 on being formed in substrate 596 and the second electrode lay 588, it is each Spherical particle all has black area 590a, white area 590b and the chamber 594 for being filled with liquid around the region.Using such as resin Filler 595 filling around the spherical particle space (referring to Figure 12).In this embodiment, first electrode layer 587 is right Should be in pixel electrode, the second electrode lay 588 in opposed substrate 596 corresponds to public electrode.
Furthermore, it is possible to replace twisting ball using electrophoresis element.Using the micro-capsule of the diameter with about 10 μm to 200 μm, Transparency liquid, positively charged white microparticle and electronegative black microparticle are sealed in the micro-capsule.It is being set to It is described when applying electric field by first electrode layer and the second electrode lay in micro-capsule between one electrode layer and the second electrode lay White microparticle and black microparticle are moved to reciprocal side, it is thus possible to be displayed in white or black.Using the principle Display element be electrophoretic display device, be commonly referred to as Electronic Paper.The electrophoretic display device has than liquid crystal display member The high reflectivity of part, it is low in energy consumption because without fill-in light, and can identify display portion under dim environment.In addition, Even if can keep having shown that primary image if when not providing power to display portion.Therefore, even if with aobvious Show function semiconductor device (can be referred to as display device or be known as equipped with display device semiconductor device) with There are when certain distance, can also store shown image for radio wave source.
The highly reliable Electronic Paper as semiconductor device can be produced through the above steps.
The embodiment can be implemented with another embodiment of appropriate combination.
(embodiment 14)
It can be by semiconductor device applications disclosed in this specification in various electronic devices (including game machine).It is such The example of electronic device is television equipment (be otherwise known as TV or television receiver), computer monitor etc., such as number photograph The camera of camera or digital video camcorder, digital frame, mobile phone hand-held set (also known as mobile phone or mobile phone dress Set), the large-scale console etc. of portable game console, portable data assistance, audio frequency replaying apparatus, pinball machine.
Figure 13 A show cellular phone 1600.Cellular phone 1600 include combine display portion 1602 shell 1601, Operation button 1603a and 1603b, external connection port 1604, loud speaker 1605 and microphone 1606.
It can be by touching display portion 1602 with finger etc., to 1600 input information of cellular phone shown in Figure 13 A.This Outside, the operation such as made a phone call with text maninulation can be executed by touching display portion 1602 with finger etc..
There are mainly three types of screen patterns for display portion 1602.The first pattern is primarily used for the display mould of display image Formula.Second of pattern is primarily used for the input pattern of the data of input such as text.The third pattern is combined with display mould The display of both patterns of formula and input pattern and input pattern.
For example, in the case where making a phone call or text maninulation, so that display portion 1602 is in and be mainly used for input text This text entry mode, and the character being shown on screen can be inputted.In such a situation it is preferred in display portion Keyboard or digital button are shown on the almost entire area of 1602 screen.
It is inclined for detecting including such as gyroscope or acceleration transducer when being provided inside cellular phone 1600 When the detection device of sensor, can by detect cellular phone 1600 direction (cellular phone 1600 be it is horizontal positioned or It is vertical to place for transverse mode or vertical pattern) and automatically switch the display on the screen of display portion 1602.
In addition, switching screen pattern by the operation button 1603 for touching display portion 1602 or operation housing 1601. Alternatively, screen pattern can be switched according to the type of the image shown in display portion 1602.For example, when in display portion When the signal of the image of display is motion image data, screen pattern is switched into display pattern.When signal is text data, Screen pattern is switched into input pattern.
In addition, in input pattern, signal, and if certain a period of time are detected by the optical sensor in display portion 1602 Between input by touching display portion 1602 is not carried out in section, then can control screen pattern switched to from input pattern it is aobvious Show pattern.
Display portion 1602 is also used as imaging sensor.For example, by touching display portion with palm or finger 1602 and the image that extracts palmmprint or fingerprint etc., thus, it is possible to execute personal verification.In addition, when providing transmitting in display portion When the backlight or sensing light source of near infrared light, the image of finger vena or palm vein etc. can be obtained.
It can be by any semiconductor device applications described in above-described embodiment in display portion 1602.For example, can incite somebody to action Multiple thin film transistor (TFT)s described in above example are arranged as the switch element in pixel.
Figure 13 B show another example of cellular phone.Portable data assistance can have shown in such as Figure 13 B Multiple functions.For example, other than telephony feature, portable data assistance can also have processing more by conjunction with computer The function of kind data.
Portable data assistance shown in Figure 13 B includes shell 1800 and shell 1801.Shell 1800 includes display panel 1802, loud speaker 1803, microphone 1804, indicator device 1806, camera lens 1807, external connection terminals 1808 etc..Shell 1801 include keyboard 1810, external storage slot 1811 etc..In addition, being combined with antenna in shell 1801.
In addition, display panel 1802 plays a part of touch screen.Indicate shown multiple behaviour by a dotted line in Figure 13 B Make key 1805.
In addition, than the above described structure, can be combined with non-contact ic chip or small-sized storage device etc..
Any semiconductor device described in above example can be used for display panel 1802, and according to application model Suitably change the orientation of display.In addition, camera lens 1807 are arranged in plane identical with display portion 1802；Therefore, The portable data assistance can be used for video telephony call.Loud speaker 1803 and microphone 1804 can be used for video electricity Words call, record and broadcasting sound etc., and it is not limited to voice communication.In addition, the shell 1800 and 1801 being unfolded in Figure 13 B can Sliding is generated, it is stacked one on another to make；Therefore, it is possible to reduce the size of the portable data assistance so that institute Portable data assistance is stated to be suitable for carrying.
External connection terminals 1808 can be connected to AC adapters and a plurality of types of cables of such as USB cable, It thus allows for charging and communicating with the data of personal computer.Furthermore, it is possible to be inserted using external storage is inserted into Storage medium in slot 1811 stores and moves a large amount of data.
Other than function described above, the portable data assistance can also have the function of infrared communication, TV Receiver function etc..
Figure 14 A show television equipment 9600.In television equipment 9600, display portion 9603 is attached to shell 9601 In.Display portion 9603 can show image.Here, pass through 9605 support housing 9601 of frame.
The Operation switch or individual remote controler 9610 that shell 9601 may be used operate television equipment 9600.It can adopt With 9609 switching channels of operation key of remote controler 9610, volume is controlled, thus, it is possible to control to show in display portion 9603 Image.In addition, remote controler 9610 can be equipped with display portion 9607, the data exported with display remote controller 9610.
Note that television equipment 9600 is equipped with receiver, modem etc..Using receiver, can receive general TV is broadcasted.In addition, when display device is connected to communication network in a wired or wireless manner by modem, it can Execute unidirectional (from transmitter to receiver) or two-way (for example, between transmitter and receiver or between receiver) letter Message communication.
It can be by any semiconductor device applications described in above example in display portion 9603.For example, can incite somebody to action Multiple thin film transistor (TFT)s described in above example are arranged as the switch element in pixel.
Figure 14 B show digital frame 9700.For example, in digital frame 9700, display is combined in shell 9701 Part 9703.Display portion 9703 can show various images.For example, display portion 9703 can be shown with digital camera etc. The image data of shooting, and play the function as common photo frame.
It can be by any semiconductor device applications described in above example in display portion 9703.For example, can incite somebody to action Multiple thin film transistor (TFT)s described in above example are arranged as the switch element in pixel.
Note that digital frame 9700 is equipped with, operation part, (USB terminals can be connected to such as USB line to external connection terminals The terminal of the various cables of cable), storage medium insertion section grades.Although this can be provided on surface identical with display portion A little components, but the considerations of for design esthetics, preferably they are arranged on side surface or rear surface.For example, storage is used The storage medium of the image data of digital camera shooting is inserted into the storage medium insertion portion of digital frame, and loads number According to thus, it is possible to show image in display portion 9703.
Digital frame 9700 can be configured to wirelessly send and receive data.Expectation can be loaded by radio communication Image data to be shown.
Figure 15 shows a kind of portable game console comprising two shells, shell 9881 and shell 9891 utilize They are joined together by bonding part 9893, so that the portable game console can open and close.Respectively in shell 9881 and shell 9891 in combine display portion 9882 and display portion 9883.
It can be by any semiconductor device applications described in above example in display portion 9883.For example, can incite somebody to action Multiple thin film transistor (TFT)s described in above example are arranged as the switch element in pixel.
In addition, portable game console shown in figure 15 is equipped with speaker portion 9884, storage medium insertion portion 9886, (operation key 9885, connection terminal 9887, sensor 9888 (have measuring force, position for LED light 9890 and input mechanism It is shifting, position, speed, acceleration, angular speed, rotation number, distance, light, liquid, magnetic, temperature, chemical substance, sound, the time, hard Degree, electric field, electric current, voltage, electrical power, radiation, flow velocity, humidity, gradient, vibration, taste or infrared ray function) and wheat Gram wind 9889) etc..Needless to say, the structure of the portable game console is not limited to above structure, and may be used at least Other structures equipped with thin film transistor (TFT) disclosed in this specification.The portable game console can uitably include volume Outer attachment.Portable game console shown in figure 15 has the program or data for reading and being stored in storage medium, by it The function being shown in display portion, and the function with another portable game console shared data by radio communication. Note that the function of portable game console shown in figure 15 is not limited to function described above, the portable game control Platform can have various functions.
Figure 17 shows the light-emitting devices of the example as the semiconductor device formed according to any of above embodiment to be used as The example of lighting device 3001 in room.Since light-emitting device described in this specification can have large area, it is thus possible to will The light-emitting device is used as the lighting device with big emission area.Further, it is also possible to by appointing described in above example What light-emitting device is used as desk lamp 3002.Note that the lighting apparatus includes ceiling light, wall lamp, vehicle interior in its scope Headlamp, emergency exit etc..
As set forth above, it is possible to by the semiconductor device applications described in any one of embodiment 1 to 9 in institute above The display panel for the various electronic devices stated, it is thus possible to which highly reliable electronic apparatus is provided.
(embodiment 15)
It can be by semiconductor device applications disclosed in this specification in Electronic Paper.Electronic Paper can be used for all spectra In for showing the electronic device of information.For example, can by Electronic Paper be applied to E-book reader (e-book readers), The display of the various cards of advertisement or such as credit card in the vehicles of poster, such as train.Figure 16 shows electronics The example of device.
Figure 16 shows E-book reader 2700.For example, E-book reader 2700 includes two shells, i.e. shell 2701 and shell 2703.Shell 2701 and shell 2703 are combined using articulation piece 2711, to make E-book reader 2700 can open and be closed along articulation piece 2711.It utilizes such structure, e-book reading can be operated as paper book Device 2700.
Display portion 2705 and display portion 2707 are bonded respectively in shell 2701 and shell 2703.Display portion 2705 An image or different images can be shown with display portion 2707.It is shown not in display portion 2705 and display portion 2707 In the case of with image, for example, the display portion (display portion 2705 in Figure 16) on right side can be shown with display text, left side Show that part (display portion 2707 in Figure 16) can show image.
Figure 16 shows that shell 2701 is equipped with the example that operation portion grades.For example, shell 2701 be equipped with power switch 2721, Operation key 2723, loud speaker 2725 etc..2723 page turning of operation key may be used.Note that can be in the display unit split-phase with shell Keyboard, indicator device etc. are provided on same surface.Furthermore, it is possible to which external connection is arranged in the rear surface of shell or side surface Terminal (earphone terminal, USB terminals, can be connected to such as AC adapters or USB cable various cables terminal), storage medium Insertion section grades.In addition, E-book reader 2700 can have the function of electronic dictionary.
E-book reader 2700 can be configured to wirelessly transceiving data.It can be taken by radio communication from e-book Business device is bought and downloads the data etc. of desired book.
The embodiment can be implemented with another embodiment of appropriate combination.
The application is with the Japanese patent application No.2009-249876 that on October 30th, 2009 submits in Japanese Patent Office Entire contents are incorporated to herein by basis by way of introducing.
Reference sign
100：Substrate, 102：Gate insulating layer, 103：Protection insulating layer, 105：Thin film transistor (TFT), 110：Thin film transistor (TFT), 111：Gate electrode layer, 112：Oxide semiconductor layer, 116：Insulating layer, 119：Mixed Zone, 120：Oxide semiconductor film, 121：Oxide semiconductor layer, 130：Thin film transistor (TFT), 132：Oxide semiconductor layer, 139：Oxide insulating layer, 140：Lining Bottom, 141：Oxide semiconductor layer, 142：Gate insulating layer, 143：Protection insulating layer, 146：Insulating layer, 150：Substrate, 151： Gate electrode layer, 152：Gate insulating layer, 153：Protection insulating layer, 160：Thin film transistor (TFT), 162：Oxide semiconductor layer, 166： Insulating layer, 171：Oxide semiconductor layer, 173：Insulating layer, 179：Mixed Zone, 180：Thin film transistor (TFT), 181：Gate electrode Layer, 183：Protection insulating layer, 190：Thin film transistor (TFT), 192：Oxide semiconductor layer, 196：Insulating layer, 196：Insulated by oxide Layer, 199：Mixed Zone, 300：Substrate, 302：Gate insulating layer, 303：Protection insulating layer, 310：Thin film transistor (TFT), 311：Grid Electrode layer, 312：Oxide semiconductor layer, 313：Channel formation region, 316：Insulating layer, 319：Oxide insulating layer, 320：Lining Bottom, 322：Gate insulating layer, 323：Protection insulating layer, 330：Oxide semiconductor film, 331：Oxide semiconductor layer, 332：Oxygen Compound semiconductor layer, 360：Thin film transistor (TFT), 361：Gate electrode layer, 362：Oxide semiconductor layer, 363：Channel formation region, 366：Insulating layer, 369：Oxide insulating layer, 370：Substrate, 373：Protection insulating layer, 380：Thin film transistor (TFT), 381：Gate electrode Layer, 382：Oxide semiconductor layer, 386：Insulating layer, 389：Oxide insulating layer, 399：Oxide semiconductor layer, 403：Protection Insulating layer, 430：Oxide semiconductor film, 431：Oxide semiconductor layer, 580：Substrate, 581：Thin film transistor (TFT), 583：Insulation Layer, 584：Protection insulating layer, 585：Insulating layer, 587：Electrode layer, 588：Electrode layer, 589：Spherical particle, 594：Chamber, 595：It fills out Fill object, 596：Opposed substrate, 1102：Display portion, 115a：Source electrode layer, 115b：Drain electrode layer, 142a：Gate insulating layer, 142b：Gate insulating layer, 1600：Cellular phone, 1601：Shell, 1602：Display portion, 1603：Operation button, 1604：Outer company Connect port, 1605：Loud speaker, 165a：Source electrode layer, 166b：Drain electrode layer, 1800：Shell, 1801：Shell, 1802：Display Panel, 1803：Loud speaker, 1804：Microphone, 1805：Operation key, 1806：Indicator device, 1807：Camera lens, 1808：Outside Portion's connection terminal, 1810：Keyboard, 1811：External storage slot, 195a：Source electrode layer, 195b：Drain electrode layer, 2700：Electricity Philosophical works reader, 2701：Shell, 2703：Shell, 2705：Display portion, 2707：Display portion, 2711：Hinge element, 2721： Power switch, 2723：Operation key, 2725：Loud speaker, 3001：Lighting device, 3002：Desk lamp, 314a：High resistance source area, 314b：High resistance drain region, 315a：Source electrode layer, 315b：Drain electrode layer, 364a：High resistance source area, 364b：High resistance leaks Polar region, 365a：Source electrode layer, 365b：Drain electrode layer, 372a：Gate insulating layer, 372b：Gate insulating layer, 385a：Source electrode Layer, 385b：Drain electrode layer, 4001：Substrate, 4002：Pixel portion, 4003：Signal-line driving circuit, 4004：Scanning line driving Circuit, 4005：Sealant, 4006：Substrate, 4008：Liquid crystal layer, 4010：Thin film transistor (TFT), 4011：Thin film transistor (TFT), 4013： Liquid crystal layer, 4015：Connection terminal electrode, 4016：Terminal electrode, 4018：FPC, 4019：Anisotropic conductive film, 4021：Insulation Layer, 4030：Pixel electrode layer, 4031：Opposed electrode layer, 4032：Insulating layer, 4040：Conductive layer, 4041：Insulating layer, 4042： Protection insulating layer, 4043：Oxide insulating layer, 4360：Thin film transistor (TFT), 4501：Substrate, 4502：Pixel portion, 4505：It is close Envelope agent, 4506：Substrate, 4507：Filler, 4509：Thin film transistor (TFT), 4510：Thin film transistor (TFT), 4511：Light-emitting component, 4512：Electroluminescence layer, 4513：Electrode, 4515：Connection terminal electrode, 4516：Terminal electrode, 4517：Electrode, 4519：Respectively to Anisotropic conductive film, 4520：Separator, 4540：Conductive layer, 4542：Insulating layer, 4543：Coat, 4544：Insulating layer, 4545： Color-filter layer, 4550：Wiring layer, 4551：Insulating layer, 590a：Black area, 590b：White area, 6106：Microphone, 6400：Pixel, 6401：Switching transistor, 6402：Driving transistor, 6403：Capacitor, 6404：Light-emitting component, 6405：Signal wire, 6406：It sweeps Retouch line, 6407：Power cord, 6408：Public electrode, 7001：Drive TFT, 7002：Light-emitting component, 7003：Electrode, 7004：EL Layer, 7005：Electrode, 7009：Separator, 7011：Drive TFT, 7012：Light-emitting component, 7013：Electrode, 7014：EL layers, 7015： Electrode, 7016：Barrier film, 7017：Conductive film, 7019：Separator, 7021：Drive TFT, 7022：Light-emitting component, 7023：Electricity Pole, 7024：EL layers, 7025：Electrode, 7026：Electrode, 7027：Conductive film, 7029：Separator, 7031：Insulating layer, 7032：Absolutely Edge layer, 7033：Color-filter layer, 7034：Coat, 7035：Protection insulating layer, 7036：Planarising insulating layer, 7042：Insulating layer, 7043：Color-filter layer, 7044：Coat, 7045：Protection insulating layer, 7051：Insulating layer, 7052：Protection insulating layer, 7053：It is flat Face insulating layer, 7055：Insulating layer, 7056：Planarising insulating layer, 9600：Television equipment, 9601：Shell, 9603：Display unit Point, 9605：Holder, 9607：Display portion, 9609：Operation key, 9610：Remote controler, 9700：Digital frame, 9701：Shell, 9703：Display portion, 9881：Shell, 9882：Display portion, 9883：Display portion, 9884：Speaker portion, 9885：Operation Key, 9886：Storage medium insertion portion, 9887：Connection terminal, 9888：Sensor, 9889：Microphone, 9890：LED light, 9891：Shell, 9893：Bonding part, 1603a：Operation button, 4503a：Signal-line driving circuit, 4504a：Scanning line driving Circuit, 4518a：FPC.

Claims (18)

1. a kind of semiconductor device, including：
The gate electrode layer of substrate；
Gate insulating layer on the gate electrode layer；
Oxide semiconductor layer on the gate insulating layer；
Source electrode layer and drain electrode layer, each in the source electrode layer and the drain electrode layer and the oxide semiconductor Layer contact；
The defective insulating layer of tool on the source electrode layer and the drain electrode layer, wherein the insulating layer with defect Including oxygen and silicon, and the defective insulating layer of tool has the oxygen dangling bonds as defect；And
First area between the oxide semiconductor layer and the defective insulating layer of tool,
Wherein, the first area comprising oxygen, silicon and is contained at least one of oxide semiconductor layer metallic element.
2. semiconductor device according to claim 1, wherein the oxide semiconductor layer includes indium, gallium and zinc.
3. semiconductor device according to claim 1, wherein the defective insulating layer of tool is configured as combining from institute It states the impurity of oxide semiconductor layer diffusion and makes its stabilization.
4. semiconductor device according to claim 1, wherein the thickness of the first area is 0.1nm to 30nm.
5. a kind of manufacturing method of semiconductor device, including：
It will be in substrate setting to the process chamber under the pressure in reduction；
The sputter gas for eliminating hydrogen and moisture is introduced while removing moisture remaining in the process chamber, in the lining Oxide semiconductor layer is formed on bottom；
Form the source electrode layer contacted with the oxide semiconductor layer and drain electrode layer；
Oxygen excess insulated by oxide is formed on the source electrode layer, the drain electrode layer and the oxide semiconductor layer Layer, the oxygen excess oxide insulating layer include silicon nitride；
It is formed on the oxygen excess oxide insulating layer and has defective insulating layer, wherein the insulating layer with defect With the oxygen dangling bonds as defect；And
The substrate is heated to reduce the concentration of the impurity in the oxide semiconductor layer.
6. according to the method described in claim 5, wherein, the oxide semiconductor layer includes indium, gallium and zinc.
7. according to the method described in claim 5, wherein, the defective insulating layer of tool is formed by sputtering method.
8. according to the method described in claim 5, wherein, the defective insulating layer of tool is configured as in conjunction with from the oxidation The impurity of object semiconductor layer diffusion simultaneously makes its stabilization.
9. according to the method described in claim 5, wherein, the thickness of the oxygen excess oxide insulating layer is 0.1nm to 30nm.
10. according to the method described in claim 5, wherein, the concentration for reducing the impurity in the oxide semiconductor layer be What the temperature greater than or equal to 100 DEG C and less than or equal to 400 DEG C executed.
11. according to the method described in claim 5, wherein, the impurity include in hydrogen, moisture, hydroxyl and hydride extremely Few one kind.
12. a kind of manufacturing method of semiconductor device, including：
It will be in substrate setting to the process chamber under the pressure in reduction；
The sputter gas for eliminating hydrogen and moisture is introduced while removing moisture remaining in the process chamber, in the lining Oxide semiconductor layer is formed on bottom；
Form the source electrode layer contacted with the oxide semiconductor layer and drain electrode layer；
Oxygen excess insulated by oxide is formed on the source electrode layer, the drain electrode layer and the oxide semiconductor layer Layer；
It is formed on the oxygen excess oxide insulating layer and has defective insulating layer, wherein the insulating layer with defect With the oxygen dangling bonds as defect；And
The substrate is heated to reduce the concentration of the impurity in the oxide semiconductor layer, the impurity includes hydrogen,
Wherein, the oxygen excess oxide insulating layer includes silicon nitride.
13. according to the method for claim 12, wherein the oxide semiconductor layer includes indium, gallium and zinc.
14. according to the method for claim 12, wherein the defective insulating layer of tool is formed by sputtering method 's.
15. according to the method for claim 12, wherein the defective insulating layer of the tool is configured as in conjunction with from the oxygen The impurity of compound semiconductor layer diffusion simultaneously makes its stabilization.
16. according to the method for claim 12, wherein the thickness of the oxygen excess oxide insulating layer be 0.1nm extremely 30nm。
17. according to the method for claim 12, wherein the concentration for reducing the impurity in the oxide semiconductor layer be What the temperature greater than or equal to 100 DEG C and less than or equal to 400 DEG C executed.
18. according to the method for claim 12, wherein the impurity include hydrogen, moisture, hydroxyl and hydride in extremely Few one kind.
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