CN104810440B - A kind of flip LED chips and preparation method thereof - Google Patents
A kind of flip LED chips and preparation method thereof Download PDFInfo
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- CN104810440B CN104810440B CN201510237919.7A CN201510237919A CN104810440B CN 104810440 B CN104810440 B CN 104810440B CN 201510237919 A CN201510237919 A CN 201510237919A CN 104810440 B CN104810440 B CN 104810440B
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- 238000002360 preparation method Methods 0.000 title abstract description 9
- 239000002184 metal Substances 0.000 claims abstract description 269
- 229910052751 metal Inorganic materials 0.000 claims abstract description 269
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 30
- 238000000407 epitaxy Methods 0.000 claims abstract description 23
- 239000010410 layer Substances 0.000 claims description 603
- 239000000758 substrate Substances 0.000 claims description 72
- 238000004519 manufacturing process Methods 0.000 claims description 36
- 239000000463 material Substances 0.000 claims description 32
- 230000004888 barrier function Effects 0.000 claims description 28
- 239000010931 gold Substances 0.000 claims description 23
- 229910052737 gold Inorganic materials 0.000 claims description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 20
- 229910052709 silver Inorganic materials 0.000 claims description 14
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 12
- 229910052759 nickel Inorganic materials 0.000 claims description 11
- 239000000377 silicon dioxide Substances 0.000 claims description 10
- 229910052718 tin Inorganic materials 0.000 claims description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 8
- 229910052804 chromium Inorganic materials 0.000 claims description 8
- 229910052802 copper Inorganic materials 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 229910052719 titanium Inorganic materials 0.000 claims description 8
- 239000012790 adhesive layer Substances 0.000 claims description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- 238000009826 distribution Methods 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- 239000004332 silver Substances 0.000 claims description 6
- 229910052789 astatine Inorganic materials 0.000 claims description 3
- 238000000034 method Methods 0.000 description 13
- 238000005516 engineering process Methods 0.000 description 11
- 238000001704 evaporation Methods 0.000 description 8
- 238000004544 sputter deposition Methods 0.000 description 7
- 230000008020 evaporation Effects 0.000 description 6
- 238000009413 insulation Methods 0.000 description 5
- 229910052594 sapphire Inorganic materials 0.000 description 5
- 239000010980 sapphire Substances 0.000 description 5
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 4
- 229910052681 coesite Inorganic materials 0.000 description 4
- 229910052906 cristobalite Inorganic materials 0.000 description 4
- 230000012010 growth Effects 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical group [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 4
- 238000005507 spraying Methods 0.000 description 4
- 229910052682 stishovite Inorganic materials 0.000 description 4
- 229910052905 tridymite Inorganic materials 0.000 description 4
- 238000011049 filling Methods 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 2
- 229910009815 Ti3O5 Inorganic materials 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000004744 fabric Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 206010037660 Pyrexia Diseases 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000005282 brightening Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000002860 competitive effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 229910052727 yttrium Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
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- Engineering & Computer Science (AREA)
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- Computer Hardware Design (AREA)
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Abstract
The present invention provides a kind of flip LED chips and preparation method thereof, several first cylindrical metal layers are formed on the contact layer, the second cylindrical metal layer is formed in each groove, re-form insulative reflective layer, and form several the first strip metal layers and the second strip metal layer being intervally arranged, then the insulating layer being open with the first insulating layer openings and second insulating layer is formed, first pad is electrically connected by the first strip metal layer and the first cylindrical metal layer with the formation of p-type epitaxial layer, second pad is electrically connected by the second strip metal layer and the second cylindrical metal layer with N-type epitaxy layer formation.The present invention uses the groove of array arrangement, and it is formed and is electrically connected by three-layer metal structure (the first and second pads, the first and second strip metal layers, the first and second cylindrical metal layers), the area that the occupied epitaxial layer luminous zone of groove can be reduced, improves the light emission luminance of flip LED chips.
Description
Technical field
The present invention relates to semiconductor optoelectronic chip manufacturing field, more particularly to a kind of flip LED chips and preparation method thereof.
Background technology
Since early 1990s are commercialized, by development in twenties years, GaN base LED was widely used
In fields such as indoor and outdoor display screen, Projection Display lighting source, backlight, landscape brightening illumination, advertisement, traffic instructions, and
It is known as 21st century most competitive solid light source of new generation.It, generation however for light emitting semiconductor device LED
For conventional light source, into high-end lighting area, it is necessary to while solving the problems, such as three:First, light emission luminance Upgrade Problem is solved,
Second is that heat dissipation problem is solved, third, to solve the problems, such as the reduction of production cost.
In recent years, the various technologies to improve LED light emission luminance are come into being, such as graphical substrate technology, high pressure core
Piece, vertical structure, DBR technology etc..
Wherein graphical substrate technology most effect, between 2010 to 2012, the cone structure of front and back appearance is done
The wet method pattern substrate of method patterned substrate and Pyramid becomes LED instead of the flat Sapphire Substrate in surface completely
The mainstream substrate of chip, makes the crystal structure and luminous brightness of LED be obtained for revolutionary raising.But patterned substrate
The mainstream substrate for becoming LED chip instead of the flat Sapphire Substrate in surface undoubtedly increases the production cost of LED, although being increased
The cost added can be reduced slowly with the raising of patterned substrate manufacturing technology level, but can not be completely eliminated.
With the high speed development of semiconductor integration technology, it is a kind of be known as high-voltage chip LED structure come into being, Ci Zhongjie
The LED of structure is usually to form isolation channel by lithographic etch process, then insulation material is filled in isolation channel after epitaxial layer is formed
Material finally makes electrode on the epitaxial layer being respectively dielectrically separated from and forms cascaded structure;Although this structure can improve LED's
Light emission luminance, but the technical process of formation isolation channel, fill insulant considerably increases the manufacturing cost of chip, not only such as
This, also reduces the reliability of LED chip, such as since existing etching homogeneity does not reach requirement and causes to a certain extent
Deep etching it is unclean, electric leakage can be eventually led to, reduce the breakdown characteristics etc. of LED chip.
Either graphical substrate technology or high-voltage chip all do not well solve the heat dissipation problem of LED chip, hang down
Formal dress flip-chip is connected on the good substrate of an electrical and thermal conductivity performance by straight structure and flip chip technology (fct) so that fever ratio
Compared with the light emitting epitaxial layer of concentration closer to the hot dirt that radiates, most of heat is made to be exported by substrate, rather than it is bad from radiating
Sapphire Substrate export, this alleviates the heat dissipation problem of LED chip to a certain extent.
The LED chip of vertical structure need not etch the areas N material, and the part that this reduces LED to a certain extent is raw
Cost is produced, and different from the electric current flowing mode of the LED chip of other structures, it is more suitable for the injection of high current, further carries
The light emission luminance of high LED chip.However, as high-voltage chip, the LED of vertical structure is also required to form isolation channel, this is again big
The big production cost for improving LED, moreover, the chip of vertical structure also needs to peel off substrate, so this is carried again
The high production cost of LED chip.Compared with the LED chip of vertical structure, the LED chip of inverted structure is in terms of production cost
It may be more dominant.
In order to keep LED technology fast-developing, it is set to play the part of as early as possible in lighting area prior compared with color, it is a kind of to solve simultaneously
Certainly the flip LED chips and preparation method thereof of above three problem are urgently researched and developed.
Invention content
The present invention provides a kind of flip LED chips and preparation method thereof, to solve the problems of the prior art.
In order to solve the above technical problems, the present invention provides a kind of flip LED chips, including:
Substrate and the epitaxial layer being formed on the substrate, the epitaxial layer include being sequentially formed on the substrate
N-type epitaxy layer, active layer and p-type epitaxial layer;
It is formed in the epitaxial layer and exposes the groove of the array arrangement of the N-type epitaxy layer;
The contact layer being formed on the p-type epitaxial layer, the contact layer, which corresponds to, is equipped with contact at the position of the groove
Layer opening;
Several first cylindrical metal layers being formed on the contact layer and the second column being formed in each groove
Metal layer;
It is formed in the p-type epitaxial layer, contact layer, the first cylindrical metal layer, on the second cylindrical metal layer and described recessed
Insulative reflective layer in slot, the insulative reflective layer are equipped with the first insulative reflective layer opening of exposure the first cylindrical metal layer
And the second insulative reflective layer opening of exposure the second cylindrical metal layer;
Several the first strip metal layers and the second strip metal layer being intervally arranged being formed on the insulative reflective layer;
The insulating layer being formed on the insulative reflective layer, the first strip metal layer and the second strip metal layer, it is described exhausted
Edge layer is equipped with first insulating layer openings and exposure the second strip gold in exposure the first strip metal layer segment region
Belong to the second insulating layer opening in layer segment region;And
The first pad and the second pad being formed on the insulating layer, first pad pass through first strip gold
Belong to layer and the first cylindrical metal layer to be electrically connected with p-type epitaxial layer formation, second pad passes through second strip gold
Belong to layer and the second cylindrical metal layer to be electrically connected with N-type epitaxy layer formation.
Further, further include a flip-chip substrate in the flip LED chips, the flip-chip substrate includes first
Electrically-conductive backing plate, the second electrically-conductive backing plate and to be dielectrically separated from being dielectrically separated from for first electrically-conductive backing plate and the second electrically-conductive backing plate
Fixed plate, first electrically-conductive backing plate are electrically connected with first pad formation, and second electrically-conductive backing plate is welded with described second
Disk forms electrical connection.
Further, in the flip LED chips, the first strip metal layer and the second strip metal layer are in
Rectangular strip.
Further, in the flip LED chips, the first strip metal layer with all first columns in a line
Shape metal layer is electrically connected, and the second strip metal layer is electrically connected with all second cylindrical metal layers in same a line;Alternatively, described
First strip metal layer is electrically connected with all first cylindrical metal layers in same row, in the second strip metal layer and same row
All second cylindrical metal layer electrical connections.
Further, in the flip LED chips, first insulating layer openings and second insulating layer opening are
Rectangular strip is open, and first insulating layer openings and second insulating layer opening are along the first strip metal layer and described second
The length direction of strip metal layer is in staggered distribution.
Further, in the flip LED chips, first pad and the rectangular sheet of the second pad, edge
The length direction of the first strip metal layer and the second strip metal layer arranges.
Further, further include array arrangement in the blocking on the p-type epitaxial layer in the flip LED chips
Layer, the first cylindrical metal layer are formed on the contact layer above the barrier layer, the barrier layer and the groove interval
Be staggered arrangement.
Further, further include being formed in the flip-chip substrate and first pad in the flip LED chips
With the adhesive layer on the contact surface of the second pad.
Further, in the flip LED chips, the insulative reflective layer is the reflecting layer DBR;Alternatively, described exhausted
Edge reflecting layer is composed of metallic reflector and insulating medium layer, and the material of the metallic reflector is silver, and the insulation is situated between
The material of matter layer is at least one of silica, silicon nitride or silicon oxynitride.
Further, in the flip LED chips, the first cylindrical metal layer, the second cylindrical metal layer, first
Strip metal layer, the second strip metal layer, the first pad and the second pad by Cr, Ti, Al, Ni, Au, Ag, Cu, Sn at least
Two kinds of combinations of materials form.
The present invention also provides a kind of production methods of flip LED chips, including:
One substrate is provided, epitaxial layer is formed on the substrate, the epitaxial layer includes being sequentially formed on the substrate
N-type epitaxy layer, active layer and p-type epitaxial layer;
The groove of several exposures N-type epitaxy layer is formed in the epitaxial layer;
Contact layer is formed on the p-type epitaxial layer, the contact layer, which corresponds to, is equipped with contact layer at the position of the groove
Opening;
Several first cylindrical metal layers are formed on the contact layer, and the second cylindrical metal is formed in each groove
Layer;
On the p-type epitaxial layer, contact layer, the first cylindrical metal layer, the second cylindrical metal layer and in the groove
Form insulative reflective layer, the insulative reflective layer be equipped with exposure the first cylindrical metal layer the first insulative reflective layer be open with
And the second insulative reflective layer opening of exposure the second cylindrical metal layer;
Several the first strip metal layers and the second strip metal layer being intervally arranged are formed on the insulative reflective layer;
Insulating layer, the insulation are formed on the insulative reflective layer, the first strip metal layer and the second strip metal layer
Layer is equipped with first insulating layer openings and exposure second strip metal in exposure the first strip metal layer segment region
The second insulating layer in layer segment region is open;And
The first pad and the second pad are formed on the insulating layer, first pad passes through first strip metal
Layer and the first cylindrical metal layer are electrically connected with p-type epitaxial layer formation, and second pad passes through second strip metal
Layer and the second cylindrical metal layer are electrically connected with N-type epitaxy layer formation.
Further, it in the production method of the flip LED chips, is formed after the first pad and the second pad,
Further include:One flip-chip substrate is provided, the flip-chip substrate include the first electrically-conductive backing plate, the second electrically-conductive backing plate and to insulate every
It is dielectrically separated from fixed plate from first electrically-conductive backing plate and the second electrically-conductive backing plate, makes first electrically-conductive backing plate and described first
Pad forms electrical connection, and so that second electrically-conductive backing plate is formed with second pad and be electrically connected.
Further, in the production method of the flip LED chips, the first strip metal layer and the second strip
The rectangular strip of metal layer.
Further, in the production method of the flip LED chips, the first strip metal layer with in a line
All first cylindrical metal layer electrical connections, the second strip metal layer are electrically connected with all second cylindrical metal layers in same a line
It connects;Alternatively, the first strip metal layer is electrically connected with all first cylindrical metal layers in same row, second strip metal
Layer is electrically connected with all second cylindrical metal layers in same row.
Further, in the production method of the flip LED chips, first insulating layer openings and the second insulation
Layer opening is rectangular strip opening, and first insulating layer openings and second insulating layer opening are along the first strip metal layer
It is in staggered distribution with the length direction of the second strip metal layer.
Further, in the production method of the flip LED chips, first pad and the second pad are in square
Shape sheet is arranged along the length direction of the first strip metal layer and the second strip metal layer.
Further, in the production method of the flip LED chips, contact layer is formed on the p-type epitaxial layer
Before, further include the barrier layer that array arrangement is formed on the p-type epitaxial layer, the first cylindrical metal layer is formed in described
On contact layer above barrier layer, the barrier layer and the groove interval are staggered arrangement.
Further, in the production method of the flip LED chips, formed on the insulating layer the first pad and
Further include being formed to bond on the contact surface of the flip-chip substrate and first pad and the second pad after second pad
Layer.
Further, in the production method of the flip LED chips, formed on the insulating layer the first pad and
Further include that the substrate is thinned after second pad.
Further, in the production method of the flip LED chips, the insulative reflective layer is the reflecting layer DBR;Or
Person, the insulative reflective layer are composed of metallic reflector and insulating medium layer, and the material of the metallic reflector is silver, institute
The material for stating insulating medium layer is at least one of silica, silicon nitride or silicon oxynitride.
Further, in the production method of the flip LED chips, the first cylindrical metal layer, the second column
Metal layer, the first strip metal layer, the second strip metal layer, the first pad and the second pad by Cr, Ti, Al, Ni, Au, Ag,
At least two combinations of materials form in Cu, Sn.
In flip LED chips provided by the invention and preparation method thereof, several first column gold are formed on the contact layer
Belong to layer, form the second cylindrical metal layer in each groove, re-form insulative reflective layer, and is formed on insulative reflective layer several
The the first strip metal layer and the second strip metal layer being intervally arranged, then in insulative reflective layer, the first strip metal layer and
The insulating layer being open with the first insulating layer openings and second insulating layer is formed on two strip metal layers, the first pad passes through first
Strip metal layer and the first cylindrical metal layer be electrically connecteds with the formation of p-type epitaxial layer, the second pad by the second strip metal layer with
Second cylindrical metal layer is electrically connected with N-type epitaxy layer formation.In this way, the present invention uses the groove of array arrangement, and pass through three layers
Metal structure (the first and second pads, the first and second strip metal layers, the first and second cylindrical metal layers) forms electrical connection,
Compared with prior art, the groove area of array arrangement is smaller, can reduce the area of its occupied epitaxial layer luminous zone, from
And the area of flip LED chips luminous zone is improved, and then improve light emission luminance.
Description of the drawings
With reference to attached drawing, the present invention can be more clearly understood according to following detailed description.For the sake of clarity, in figure
The relative thickness of each layer and the relative size of given zone are not drawn to draw.In the accompanying drawings:
Figure 1A is the schematic top plan view of epitaxial wafer in one embodiment of the invention;
Figure 1B is the diagrammatic cross-section along the directions AA ' of Figure 1A;
Fig. 2A is that the schematic top plan view behind barrier layer is formed in one embodiment of the invention;
Fig. 2 B are the diagrammatic cross-sections along the directions AA ' of Fig. 2A;
Fig. 3 A are that the schematic top plan view after groove is formed in one embodiment of the invention;
Fig. 3 B are the diagrammatic cross-sections along the directions AA ' of Fig. 3 A;
Fig. 4 A are that the schematic top plan view after contact layer is formed in one embodiment of the invention;
Fig. 4 B are the diagrammatic cross-sections along the directions AA ' of Fig. 4 A;
Fig. 5 A are the vertical view signals after forming the first cylindrical metal layer and the second cylindrical metal layer in one embodiment of the invention
Figure;
Fig. 5 B are the diagrammatic cross-sections along the directions AA ' of Fig. 5 A;
Fig. 6 A are that the schematic top plan view after insulative reflective layer is formed in one embodiment of the invention;
Fig. 6 B are the diagrammatic cross-sections along the directions AA ' of Fig. 6 A;
Fig. 7 A are the vertical view signals after forming the first strip metal layer and the second strip metal layer in one embodiment of the invention
Figure;
Fig. 7 B are the diagrammatic cross-sections along the directions AA ' of Fig. 7 A;
Fig. 8 A are that the schematic top plan view after insulating layer is formed in one embodiment of the invention;
Fig. 8 B are the diagrammatic cross-sections along the directions AA ' of Fig. 8 A;
Fig. 9 A are the schematic top plan views formed in one embodiment of the invention after the first pad and the second pad;
Fig. 9 B are the diagrammatic cross-sections along the directions AA ' of Fig. 9 A;
Fig. 9 C are the schematic top plan views of the first pad and the second pad in one embodiment of the invention;
Figure 10 A are the diagrammatic cross-sections of flip-chip substrate in one embodiment of the invention;
Figure 10 B are the diagrammatic cross-sections after flip LED chips complete in one embodiment of the invention;
Figure 11 is the flow diagram of flip LED chips production method in one embodiment of the invention.
Specific implementation mode
Flip LED chips proposed by the present invention and preparation method thereof are made below in conjunction with the drawings and specific embodiments further
It is described in detail.According to following explanation and claims, advantages and features of the invention will become apparent from.It should be noted that attached drawing
It is all made of very simplified form and uses non-accurate ratio, only to convenient, lucidly the aid illustration present invention is implemented
The purpose of example.
In conjunction with shown in Fig. 1 to Figure 10 B, a kind of flip LED chips of the present invention include:
Substrate 11;
The epitaxial layer 12 being formed on the substrate 11, the epitaxial layer 12 include being sequentially formed on the substrate 11
N-type epitaxy layer 121, active layer 122 and p-type epitaxial layer 123;
It is formed in the epitaxial layer 12 and exposes the groove 2 of the array arrangement of the N-type epitaxy layer 121;
The contact layer 4 being formed on the p-type epitaxial layer 123, the contact layer 4 corresponds to be set at the position of the groove 2
There is contact layer opening;
Several first cylindrical metals being formed on the contact layer 4 layer 51 and be formed in each groove 2 second
Cylindrical metal layer 52;
Be formed in the p-type epitaxial layer 123, contact layer 4, the first cylindrical metal layer 51, on the second cylindrical metal layer 52 with
And the insulative reflective layer 6 in the groove 2, the insulative reflective layer 6 are equipped with the first of exposure the first cylindrical metal layer 51
Insulative reflective layer opening and the second insulative reflective layer opening for exposing the second cylindrical metal layer 52;
Several the first strip metal layers 71 and the second strip metal being intervally arranged being formed on the insulative reflective layer 6
Layer 72;
The insulating layer 8 being formed on the insulative reflective layer 6, the first strip metal layer 71 and the second strip metal layer 72,
The insulating layer 8 is equipped with the first insulating layer openings and the exposure described the of exposure 71 subregion of the first strip metal layer
The second insulating layer of two strip metal layers, 72 subregion is open;
The first pad 91 and the second pad 92 being formed on the insulating layer 8, first pad 91 pass through described
One strip metal layer 71 and the first cylindrical metal layer 51 are electrically connected with the p-type epitaxial layer 123 formation, and second pad 92 is logical
The second strip metal layer 72 and the second cylindrical metal layer 52 is crossed to be electrically connected with the formation of the N-type epitaxy layer 121;And
Flip-chip substrate 20, the flip-chip substrate 20 include the first electrically-conductive backing plate 201, the second electrically-conductive backing plate 202 and to
Be dielectrically separated from first electrically-conductive backing plate, 201 and second electrically-conductive backing plate 202 is dielectrically separated from fixed plate 203, and described first is conductive
Substrate 201 is electrically connected with first pad 91 formation, and second electrically-conductive backing plate 202 is electrically connected with second pad 92 formation
It connects.
The substrate 11 can be Sapphire Substrate, silicon carbide substrates, silicon substrate, gallium nitride substrate and two or more materials
The compound substrate of composition.The material of contact layer 4 can be one or more combinations in ITO, Ni, Ni Ag, Ni Au.
The insulative reflective layer 6 is preferably the reflecting layer DBR, and the reflecting layer DBR can be SiO, SiO2, TiO2, Ti3O5
At least two in equal oxide materials, it is formed according to λ/4n thickness alternating growths, growth cycle is 3-50, using DBR
It does reflecting layer and eliminates the cumbersome processing step such as passivation layer, barrier layer, protective layer, solve the technical barrier at chip manufacturing end
While reduce the production cost of LED.Certainly, in other embodiments of the present invention, the insulative reflective layer can also be by gold
Belong to reflecting layer and insulating medium layer is composed, the material of the metallic reflector is silver, and the material of the insulating medium layer is
At least one of silica, silicon nitride or silicon oxynitride.
The first cylindrical metal layer 51, the second cylindrical metal layer 52, the first strip metal layer 71, the second strip metal layer
72, the first pad 91 and the second pad 92 can be formed by least two combinations of materials in Cr, Ti, Al, Ni, Au, Ag, Cu, Sn.
Wherein, the first strip metal layer 71 and the rectangular strip of the second strip metal layer 72, first insulation
Layer opening and second insulating layer opening are rectangular strip opening.All the in the first strip metal layer 71 and same row
One cylindrical metal layer 51 is electrically connected, and the second strip metal layer 72 is then electric with all second cylindrical metal layers 52 in same row
Connection;Or the first strip metal layer 71 is electrically connected with all first cylindrical metal layers 51 in same a line, described second
Strip metal layer 72 is then electrically connected with all second cylindrical metal layers 52 in same a line.First insulating layer openings and second
Insulating layer openings are in staggered distribution along the length direction of the first strip metal layer 71 and the second strip metal layer 72, that is, the two is i.e. not
On a same row also not in same row.The rectangular sheet of first pad, 91 and second pad 92, along described first
The length direction of shape metal layer 71 and the second strip metal layer 72 arranges.
In preferred embodiment, barrier layer 3, the formation of the first cylindrical metal layer 51 are formed on the p-type epitaxial layer 123
On contact layer 4 above the barrier layer 3, the material on the barrier layer 3 is, for example, SiO2, can by evaporation, sputtering,
PECVD or LPCVD techniques are formed, and 3 array arrangement of the barrier layer is on the p-type epitaxial layer 123.In the flip-chip substrate 20
It is formed with adhesive layer (not shown) on the contact surface of first pad, 91 and second pad 92, the material of the adhesive layer is
Au or Sn.
The present invention also provides a kind of production methods of above-mentioned flip LED chips to include the following steps as shown in figure 11:
S1:One substrate is provided, epitaxial layer is formed on the substrate, the epitaxial layer includes being sequentially formed in the substrate
On N-type epitaxy layer, active layer and p-type epitaxial layer;
S2:The groove of several exposures N-type epitaxy layer is formed in the epitaxial layer;
S3:Contact layer is formed on the p-type epitaxial layer, the contact layer, which corresponds to, is equipped with contact at the position of the groove
Layer opening;
S4:Several first cylindrical metal layers are formed on the contact layer, and the second column gold is formed in each groove
Belong to layer;
S5:On the p-type epitaxial layer, contact layer, the first cylindrical metal layer, the second cylindrical metal layer and the groove
Interior formation insulative reflective layer, the insulative reflective layer are equipped with the first insulative reflective layer opening of exposure the first cylindrical metal layer
And the second insulative reflective layer opening of exposure the second cylindrical metal layer;
S6:Several the first strip metal layers and the second strip metal being intervally arranged are formed on the insulative reflective layer
Layer;
S7:Insulating layer is formed on the insulative reflective layer, the first strip metal layer and the second strip metal layer, it is described exhausted
Edge layer is equipped with first insulating layer openings and exposure the second strip gold in exposure the first strip metal layer segment region
Belong to the second insulating layer opening in layer segment region;
S8:The first pad and the second pad are formed on the insulating layer, first pad passes through first strip
Metal layer and the first cylindrical metal layer are electrically connected with p-type epitaxial layer formation, and second pad passes through second strip
Metal layer and the second cylindrical metal layer are electrically connected with N-type epitaxy layer formation.
Flip LED chips production method provided by the present invention is described in more detail with reference to Figure 1A to Figure 10 B.It needs
Bright, attached drawing is all made of very simplified form and uses non-accurate ratio, only to it is convenient, lucidly aid in illustrating
The purpose of the embodiment of the present invention.
First, as shown in Figure 1, as shown in FIG. 1A and 1B, improve an epitaxial wafer 1, the epitaxial wafer 1 include substrate 11 and
The epitaxial layer 12 being formed on the substrate 11.The substrate 11 can be Sapphire Substrate, silicon carbide substrates, silicon substrate, nitrogen
Change the compound substrate of gallium substrate or two or more materials composition.The epitaxial layer 12 includes being sequentially formed on the substrate 11
N-type epitaxy layer 121, active layer 122 and p-type epitaxial layer 123.Forming the N-type epitaxy layer 121 before can also be in the lining
Other well known film layers are formed on bottom 11.Wherein, the presumptive area one on the epitaxial layer 12 including array arrangement and array row
The presumptive area two of cloth, the presumptive area one and the presumptive area two are spaced the arrangement that is staggered.
Then, as shown in Figure 2 A and 2 B, barrier layer 3, institute are formed in the presumptive area one of the p-type epitaxial layer 123
The material for stating barrier layer 3 is, for example, SiO2, can be formed by evaporation, sputtering, PECVD or LPCVD techniques, the barrier layer 3
Array arrangement is on p-type epitaxial layer 123.
Then, as shown in Figure 3A and Figure 3B, by lithographic etch process in the presumptive area two of the epitaxial layer 12 shape
At groove 2, the groove 2 exposes the N-type epitaxy layer 121, and in the present embodiment, the depth of the groove 2 is more than outside the p-type
Prolong the summation of 122 thickness of layer 123 and the active layer and less than the thickness of the epitaxial layer 12, that is, the p-type extension in groove 2
Layer 123 and active layer 122 are removed completely, and N-type epitaxy layer 121 is removed a part.Wherein, the barrier layer 3 with it is described
Groove 2 is spaced the arrangement that is staggered, that is, the barrier layer 3 and groove 2 be not in same a line same row, with the first party along Fig. 3 A
To X be row, Y is to enumerate example in a second direction, barrier layer 3 is that the five-element four arrange, and groove 2 is then four rows four row, two row barrier layers 3 it
Between setting a line groove 2, also, a row groove 2 is equally set between two row barrier layers 3.It is understood that the groove 2
It is not limited thereto with the quantity and arrangement mode on barrier layer 3, the arrangement as long as interval is staggered.
Then, as shown in Figure 4 A and 4 B shown in FIG., by techniques such as evaporation, sputtering or sprayings on the p-type epitaxial layer 123 shape
At contact layer 4, the contact layer 4 is equipped with contact layer at the position of the correspondence groove 2 and is open, and the contact layer opening is complete
The exposure groove 2, the material of the contact layer 4 be ITO, Ni, Ni Ag, Ni one or more combinations in Au.
Then, as fig. 5 a and fig. 5b, by techniques such as evaporation, sputtering or sprayings, in the presumptive area one (i.e.
The top of the barrier layer 3) contact layer 4 on form the first cylindrical metal layer 51, and the second column gold is formed in the groove 2
Belong to layer 52, the first cylindrical metal layer 51 and the second cylindrical metal layer 52 by Cr, Ti, Al, Ni, Au, Ag, Cu, Sn at least
Two kinds of combinations of materials form.
Then, as shown in Figure 6 A and 6 B, by techniques such as evaporation, sputtering or sprayings on the p-type epitaxial layer 123,
On contact layer 4, in groove 2, on the first cylindrical metal layer 51, form insulative reflective layer 6 on the second cylindrical metal layer 52, it is described absolutely
Edge reflecting layer 6 is preferably the reflecting layer DBR, and the reflecting layer DBR can be in the oxide materials such as SiO, SiO2, TiO2, Ti3O5
At least two, formed according to λ/4n thickness alternating growths, wherein growth cycle is 3-50.Alternatively, the dielectric reflective
Layer 6 can also be composed of metallic reflector and insulating medium layer, and the material of the metallic reflector is silver, and the insulation is situated between
The material of matter layer is at least one of silica, silicon nitride or silicon oxynitride.Exposure institute is equipped in the insulative reflective layer 6
It states the first insulative reflective layer opening of the first cylindrical metal layer 51 and exposes the subregion of the second cylindrical metal layer 52
Second insulative reflective layer is open, to be subsequently formed electrical connection.For the ease of observation, the first insulative reflective layer opening and second is absolutely
The filling pattern for the first cylindrical metal layer 51 and the second cylindrical metal layer 52 that edge reflecting layer opening is exposed has been removed, only
It is replaced with blank pattern.
Then, as shown in figures 7 a and 7b, the techniques such as sputter or spray by evaporating, if being formed on insulative reflective layer 6
It is dry to be alternatively arranged the first strip metal layer 71 and the second strip metal layer 72.The first strip metal layer 71 and the second strip gold
Belong to layer 72 to be formed by least two combinations of materials in Cr, Ti, Al, Ni, Au, Ag, Cu, Sn.
In the present embodiment, the first strip metal layer 71 and the second strip metal layer 72 are rectangular strip, described first
Shape metal layer 71 is electrically connected with all first cylindrical metal layers 51 in same row, the second strip metal layer 72 and same row
In all second cylindrical metal layers 52 electrical connection.It is understood that it is above-mentioned be with along Fig. 7 A first direction X be row, edge
Second direction Y is to enumerate example, and the length direction of the first strip metal layer 71 and the second strip metal layer 72 is along second party
Extend to Y, in other embodiments, the length direction of the first strip metal layer 71 and the second strip metal layer 72 can also
Be extend along first direction X, in this way, the first strip metal layer 71 with the electricity of all first cylindrical metal layers 51 in a line
Connection, the second strip metal layer 72 are then electrically connected with all second cylindrical metal layers 52 in same a line.For the ease of seeing
It examines, Fig. 7 A have only shown schematically the filling pattern of the first strip metal layer 71 and the second strip metal layer 72, and it is anti-to insulate
The filling pattern for penetrating layer 6 has been removed, and is only replaced with blank pattern.
Then, as shown in Figure 8 A and 8 B, by techniques such as evaporation, sputtering, PECVD or LPCVD, in the dielectric reflective
Insulating layer 8 is formed on layer 6 and the first strip metal layer 71 and the second strip metal layer 72, the insulating layer 8 is equipped with
It exposes the first insulating layer openings of 71 subregion of the first strip metal layer and exposes the second strip metal layer 72
The second insulating layer of subregion is open.First insulating layer openings and second insulating layer opening are along the first strip metal layer 71
It is in staggered distribution with the length direction of the second strip metal layer 72, that is, the two is not i.e. on a same row also in same row.
In the present embodiment, each first strip metal layer 71 and the second strip metal layer 72 include arranging successively along its length
First part, middle section and the second part of cloth, in the first strip metal layer 71 and the second strip metal layer 72
Between part covered completely by insulating layer 8, first insulating layer openings expose the first part of all first strip metal layers 71,
The second insulating layer opening exposes the second part of all second strip metal layers 72, to be subsequently formed electrical connection.
Then, as shown in fig. 9 a and fig. 9b, by evaporating sputtering or spraying process, first is formed on the insulating layer 8
Pad 91 and the second pad 92, first pad 91 pass through the first strip metal layer 71 and the first cylindrical metal layer
51 form electrical connection, and second pad is electrically connected by the second strip metal layer and the second cylindrical metal layer formation
It connects.First pad, 91 and second pad 92 is formed by least two combinations of materials in Cr, Ti, Al, Ni, Au, Ag, Cu, Sn.
First pad 91 is electrically connected with the first strip metal layer 71 formation, second pad 92 and second strip gold
Belong to layer 72 and form electrical connection, first pad, 91 and second pad exposes the first strip metal layer 71 and the second strip gold
Belong to the edge separation layer 8 above the middle section of layer 72.In the present embodiment, first pad, 91 and second pad 92 is rectangle
Sheet is arranged along the length direction of the first strip metal layer 71 and the second strip metal layer 72.Fig. 9 C illustrate only first
Thus pad 91 and the second pad 92 can facilitate observation the wherein the first pad 91 and the second pad 92 are replaced with blank pattern
The shape and arrangement mode of one pad 91 and the second pad 92, it is to be understood that above-mentioned is not to limit the present invention.
Then, as shown in figs. 10 a and 10b, as a whole by above structure, above-mentioned overall structure making is completed
Later, a flip-chip substrate 20 (as shown in Figure 10 A) is provided, and by the overall structure face-down bonding on flip-chip substrate 20, most
The making of the flip LED chips of the present invention is completed eventually.
As shown in Figure 10 A, the flip-chip substrate 20 includes the first electrically-conductive backing plate 201, the second electrically-conductive backing plate 202 and setting
Being dielectrically separated from the first electrically-conductive backing plate 201 and the second conductive base between the first electrically-conductive backing plate 201, the second electrically-conductive backing plate 202
Plate 202 is dielectrically separated from fixed plate 203.First electrically-conductive backing plate 201 formation electrical connection corresponding with first pad 91,
Second electrically-conductive backing plate 202 formation electrical connection corresponding with second pad 92.The fixed plate 203 that is dielectrically separated from is by
One pad 91 and the second pad 92 are dielectrically separated from and fix the first pad 91 and the second pad 92.
Further, further include that thinned processing step is carried out to the substrate 11 before face-down bonding.Further
, the structure after formation metal function layer as an organic whole face-down bonding or is being bonded to the flip-chip substrate
Further include that adhesive layer (being not shown in Figure 10 B) is formed on the contact surface of the two before on 20, the material of the adhesive layer is Au
Or Sn.
In conclusion the flip LED chips and preparation method thereof of the present invention have the advantages that:
1, the present invention uses the groove of array arrangement, and N-type epitaxy layer passes through the second strip metal layer and the second column in groove
The formation of shape metal layer and the second pad is electrically connected, compared with the prior art in do a whole groove for, further groove of the present invention
Area substantially reduces, and then reduces the area of the occupied epitaxial layer luminous zone of groove, substantially increases flip LED chips
Light emission luminance;
2, the present invention uses the first pad and the second pad of rectangular patch, and first pad and the second pad are along first
The length direction of strip metal layer and the second strip metal layer is arranged above and below, and almost all covers the area of chip, can incite somebody to action
The fraction light that insulative reflective layer transmits reflects back again, further improves the light emission luminance of flip LED chips;
3, the present invention can be used DBR and make insulative reflective layer, and performance is more stable, and it is cumbersome to also eliminate passivation layer, protective layer etc.
Processing step, and these processing steps are exactly the technical bottleneck at chip manufacturing end, difficult in the technology for solving chip manufacturing end
The production cost of LED is reduced while topic.
Foregoing description is only the description to present pre-ferred embodiments, not to any restriction of the scope of the invention, this hair
Any change, the modification that the those of ordinary skill in bright field does according to the disclosure above content, belong to the protection of claims
Range.
Claims (17)
1. a kind of flip LED chips, which is characterized in that including:
Substrate and the epitaxial layer being formed on the substrate, the epitaxial layer include the N-type being sequentially formed on the substrate
Epitaxial layer, active layer and p-type epitaxial layer;
It is formed in the epitaxial layer and exposes the groove of the array arrangement of the N-type epitaxy layer;
The contact layer being formed on the p-type epitaxial layer, the contact layer, which corresponds to, to be opened at the position of the groove equipped with contact layer
Mouthful;
Several first cylindrical metal layers being formed on the contact layer and the second cylindrical metal being formed in each groove
Layer;
Be formed in the p-type epitaxial layer, contact layer, the first cylindrical metal layer, on the second cylindrical metal layer and in the groove
Insulative reflective layer, the insulative reflective layer be equipped with exposure the first cylindrical metal layer the first insulative reflective layer opening and
The second insulative reflective layer opening of exposure the second cylindrical metal layer;
Several first strip metal layers and several second strip metal layers being formed on the insulative reflective layer, described first
Shape metal layer and the second strip metal interlevel are every arrangement;
The insulating layer being formed on the insulative reflective layer, the first strip metal layer and the second strip metal layer, the insulating layer
The first insulating layer openings equipped with exposure the first strip metal layer segment region and exposure the second strip metal layer
The second insulating layer of subregion is open, first insulating layer openings and the rectangular strip of second insulating layer opening, described
First insulating layer openings and second insulating layer are open along the length of the first strip metal layer and the second strip metal layer
Direction is in staggered distribution;And
The first pad and the second pad being formed on the insulating layer, first pad pass through the first strip metal layer
It is electrically connected with p-type epitaxial layer formation with the first cylindrical metal layer, second pad passes through the second strip metal layer
It is electrically connected with N-type epitaxy layer formation with the second cylindrical metal layer, first pad and the rectangular sheet of the second pad,
First pad and the second pad are arranged along the length direction of the first strip metal layer and the second strip metal layer.
2. flip LED chips as described in claim 1, which is characterized in that the first strip metal layer and the second strip gold
Belong to the rectangular strip of layer.
3. flip LED chips as claimed in claim 1 or 2, which is characterized in that the first strip metal layer with in a line
All first cylindrical metal layer electrical connections, the second strip metal layer are electrically connected with all second cylindrical metal layers in same a line
It connects;Alternatively, the first strip metal layer is electrically connected with all first cylindrical metal layers in same row, second strip metal
Layer is electrically connected with all second cylindrical metal layers in same row.
4. flip LED chips as claimed in claim 1 or 2, which is characterized in that further include array arrangement in the p-type extension
Barrier layer on layer, the first cylindrical metal layer are formed on the contact layer above the barrier layer, the barrier layer and institute
Groove interval is stated to be staggered arrangement.
5. flip LED chips as claimed in claim 1 or 2, which is characterized in that further include a flip-chip substrate, the upside-down mounting base
Plate is including the first electrically-conductive backing plate, the second electrically-conductive backing plate and to be dielectrically separated from first electrically-conductive backing plate and the second electrically-conductive backing plate
Be dielectrically separated from fixed plate, first electrically-conductive backing plate be electrically connected with first pad formation, second electrically-conductive backing plate and
Second pad forms electrical connection.
6. flip LED chips as claimed in claim 5, which is characterized in that further include be formed in the flip-chip substrate with it is described
Adhesive layer on the contact surface of first pad and the second pad.
7. flip LED chips as claimed in claim 1 or 2, which is characterized in that the insulative reflective layer is the reflecting layer DBR;Or
Person, the insulative reflective layer are composed of metallic reflector and insulating medium layer, and the material of the metallic reflector is silver, institute
The material for stating insulating medium layer is at least one of silica, silicon nitride or silicon oxynitride.
8. flip LED chips as claimed in claim 1 or 2, which is characterized in that the first cylindrical metal layer, the second column
Metal layer, the first strip metal layer, the second strip metal layer, the first pad and the second pad by Cr, Ti, Al, Ni, Au, Ag,
At least two combinations of materials form in Cu, Sn.
9. a kind of production method of flip LED chips, which is characterized in that including:
One substrate is provided, epitaxial layer is formed on the substrate, the epitaxial layer includes the N-type being sequentially formed on the substrate
Epitaxial layer, active layer and p-type epitaxial layer;
The groove of the array arrangement of several exposures N-type epitaxy layer is formed in the epitaxial layer;
Contact layer is formed on the p-type epitaxial layer, the contact layer, which corresponds to, is equipped with contact layer opening at the position of the groove;
Several first cylindrical metal layers are formed on the contact layer, and the second cylindrical metal layer is formed in each groove;
It is formed on the p-type epitaxial layer, contact layer, the first cylindrical metal layer, the second cylindrical metal layer and in the groove
Insulative reflective layer, the insulative reflective layer is equipped with the first insulative reflective layer opening for exposing the first cylindrical metal layer and cruelly
Reveal the second insulative reflective layer opening of the second cylindrical metal layer;
Several first strip metal layers and several second strip metal layers, first strip are formed on the insulative reflective layer
Metal layer and the second strip metal interlevel are every arrangement;
Insulating layer is formed on the insulative reflective layer, the first strip metal layer and the second strip metal layer, the insulating layer is set
There are the first insulating layer openings and exposure the second strip metal layer portion in exposure the first strip metal layer segment region
Subregional second insulating layer opening, first insulating layer openings and second insulating layer are open rectangular strip, and described the
One insulating layer openings and second insulating layer opening are along the length side of the first strip metal layer and the second strip metal layer
To being in staggered distribution;And
Form the first pad and the second pad on the insulating layer, first pad by the first strip metal layer and
The formation of first cylindrical metal layer and the p-type epitaxial layer be electrically connected, second pad by the second strip metal layer with
Second cylindrical metal layer is electrically connected with N-type epitaxy layer formation, first pad and the rectangular sheet of the second pad, institute
The first pad and the second pad is stated to arrange along the length direction of the first strip metal layer and the second strip metal layer.
10. the production method of flip LED chips as claimed in claim 9, which is characterized in that the first strip metal layer and
The rectangular strip of second strip metal layer.
11. the production method of the flip LED chips as described in claim 9 or 10, which is characterized in that first strip metal
Layer is electrically connected with all first cylindrical metal layers in same a line, the second strip metal layer and with all second columns in a line
Metal layer is electrically connected;Alternatively, the first strip metal layer is electrically connected with all first cylindrical metal layers in same row, described
Two strip metal layers are electrically connected with all second cylindrical metal layers in same row.
12. the production method of the flip LED chips as described in claim 9 or 10 forms contact layer on the p-type epitaxial layer
Before, further include the barrier layer that array arrangement is formed on the p-type epitaxial layer, the first cylindrical metal layer is formed in described
On contact layer above barrier layer, the barrier layer and the groove interval are staggered arrangement.
13. the production method of the flip LED chips as described in claim 9 or 10 forms the first pad on the insulating layer
After the second pad, further include:A flip-chip substrate is provided, the flip-chip substrate includes the first electrically-conductive backing plate, the second conductive base
Plate and it is dielectrically separated from fixed plate to be dielectrically separated from first electrically-conductive backing plate and the second electrically-conductive backing plate, makes described first to lead
Electric substrate is electrically connected with first pad formation, and so that second electrically-conductive backing plate is formed with second pad and be electrically connected.
14. the production method of flip LED chips as claimed in claim 13 forms the first pad and on the insulating layer
Further include forming adhesive layer on the contact surface of the flip-chip substrate and first pad and the second pad after two pads.
15. the production method of the flip LED chips as described in claim 9 or 10 forms the first pad on the insulating layer
Further include that the substrate is thinned after the second pad.
16. the production method of the flip LED chips as described in claim 9 or 10, the insulative reflective layer is the reflecting layer DBR;
Alternatively, the insulative reflective layer is composed of metallic reflector and insulating medium layer, the material of the metallic reflector is silver,
The material of the insulating medium layer is at least one of silica, silicon nitride or silicon oxynitride.
17. the production method of the flip LED chips as described in claim 9 or 10, the first cylindrical metal layer, the second column
Metal layer, the first strip metal layer, the second strip metal layer, the first pad and the second pad by Cr, Ti, Al, Ni, Au, Ag,
At least two combinations of materials form in Cu, Sn.
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CN101897046A (en) * | 2007-12-13 | 2010-11-24 | Lg伊诺特有限公司 | Semiconductor light emitting device and method of fabricating the same |
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