CN104733155A - Chip electronic component and manufacturing method thereof - Google Patents
Chip electronic component and manufacturing method thereof Download PDFInfo
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- CN104733155A CN104733155A CN201410186896.7A CN201410186896A CN104733155A CN 104733155 A CN104733155 A CN 104733155A CN 201410186896 A CN201410186896 A CN 201410186896A CN 104733155 A CN104733155 A CN 104733155A
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- coil pattern
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- interior loop
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 21
- 239000000758 substrate Substances 0.000 claims description 46
- 238000000034 method Methods 0.000 claims description 35
- 238000007747 plating Methods 0.000 claims description 32
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 28
- 230000015572 biosynthetic process Effects 0.000 claims description 28
- 239000003795 chemical substances by application Substances 0.000 claims description 27
- 229910052751 metal Inorganic materials 0.000 claims description 24
- 239000002184 metal Substances 0.000 claims description 24
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 22
- 239000010949 copper Substances 0.000 claims description 20
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 19
- 239000010931 gold Substances 0.000 claims description 14
- 239000010936 titanium Substances 0.000 claims description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 11
- 229910052802 copper Inorganic materials 0.000 claims description 11
- 229910052759 nickel Inorganic materials 0.000 claims description 10
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 9
- 229910052709 silver Inorganic materials 0.000 claims description 9
- 239000004332 silver Substances 0.000 claims description 9
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 8
- 239000004411 aluminium Substances 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 8
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 8
- 229910052737 gold Inorganic materials 0.000 claims description 8
- 229910052763 palladium Inorganic materials 0.000 claims description 8
- 229910052697 platinum Inorganic materials 0.000 claims description 8
- 229910052719 titanium Inorganic materials 0.000 claims description 8
- 229910000859 α-Fe Inorganic materials 0.000 description 11
- 238000005516 engineering process Methods 0.000 description 6
- 239000000696 magnetic material Substances 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 239000003112 inhibitor Substances 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 230000037361 pathway Effects 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 230000005389 magnetism Effects 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 230000007115 recruitment Effects 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- 229910018605 Ni—Zn Inorganic materials 0.000 description 1
- 229910007565 Zn—Cu Inorganic materials 0.000 description 1
- 239000011324 bead Substances 0.000 description 1
- 238000005422 blasting Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 238000001802 infusion Methods 0.000 description 1
- 238000000462 isostatic pressing Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000005300 metallic glass Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/006—Details of transformers or inductances, in general with special arrangement or spacing of turns of the winding(s), e.g. to produce desired self-resonance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/2804—Printed windings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/29—Terminals; Tapping arrangements for signal inductances
- H01F27/292—Surface mounted devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/33—Arrangements for noise damping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
- H01F41/06—Coil winding
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Coils Or Transformers For Communication (AREA)
- Manufacturing Cores, Coils, And Magnets (AREA)
Abstract
The present invention provides a chip electronic component and a manufacturing method thereof, more specifically a chip electronic component having an inner coil structure capable of preventing short circuit between the coil portions by increasing the thickness of the coil relative to the width of the coil and implementing a high aspect ratio (AR), and a manufacturing method thereof.
Description
This application claims the rights and interests of the 10-2013-0158080 korean patent application submitted in Korean Intellectual Property Office on December 18th, 2013, the open of this application is contained in this by reference.
Technical field
The disclosure relates to a kind of chip electronic assembly and manufacture method thereof.
Background technology
Inductor as one of chip electronic assembly forms electronic circuit with resistor to remove the representative passive component of noise together with capacitor.Such inductor uses electromagnetic property to be combined with capacitor with the resonant circuit forming the signal amplifying special frequency band, filter circuit etc.
Recently, because the miniaturization of information technology (IT) devices such as such as various communicator, display unit and slimming have been accelerated, the research for the technology by the various miniaturization of components such as such as inductor, capacitor, transistor and slimming that are applied to IT device is constantly carried out.Inductor also promptly had small size, high density and can the sheet installed of automatic surface substitute, the exploitation being administered to the thin inductance device that coil pattern (upper surface that coil pattern is formed in film-insulated substrate by plating and lower surface on) is formed by mictomagnetism powder and resin and by this mixture is carried out.
Direct current (DC) resistance Rdc as the main performance of inductor can reduce according to the increase of the cross-sectional area of coil.Therefore, in order to reduce D.C. resistance Rdc and increase inductance, the cross-sectional area of the interior loop increasing inductor is needed.
As the method for the cross-sectional area of increase coil, there are two kinds of methods, that is, the method for the method increasing the width of coil and the thickness increasing coil.
When increasing the width of coil, the possibility that can produce short circuit between coiler part can increase, and the number of turn that can realize in inductor sheet can be restricted, thus the region causing magnetic material to occupy reduces, make the reduction that can cause efficiency, and the realization of high inductor product can be restricted.
Therefore, the interior loop of thin inductance device has been needed to be had the structure of high depth-width ratio (AR) by the thickness of increase coil.The depth-width ratio (AR) of interior loop represents the value obtained divided by the width of coil by the thickness of coil.Therefore, when the recruitment of coil thickness is greater than the recruitment of coil width, depth-width ratio (AR) can increase.
In order to realize the high depth-width ratio (AR) of interior loop, need to suppress coil growth in the direction of the width, and need to accelerate coil growth in a thickness direction.
According to prior art, when using resistance plating agent to perform pattern coating method, in order to form the coil with large thickness, resistance plating agent needs to have large thickness.But in this case, due to the shape in order to maintain resistance plating agent, resistance plating agent needs to have predetermined width or larger width, and the spacing therefore between coiler part can increase.
In addition, when performing galvanoplastic according to prior art, due to coil in its width direction with the isotropic growth phenomenon that grows on its thickness direction, be therefore short-circuited between coiler part and realize high depth-width ratio (AR) and can restriction be there is.
[prior art document]
(patent documentation 1) Japanese Patent Publication publication No. 2006-278479
Summary of the invention
One side of the present disclosure can provide a kind of chip electronic assembly and manufacture method thereof, and this chip electronic assembly has by increasing the thickness of coil relative to the width of coil and can prevent the generation of short circuit between coiler part and realize the interior loop structure of high depth-width ratio (AR).
According to one side of the present disclosure, a kind of chip electronic assembly can comprise: magnetic body, comprises insulated substrate; Interior loop portion, be formed in insulated substrate at least one on the surface; And external electrode, be formed at least one end surfaces of magnetic body, and be connected to interior loop portion, wherein, interior loop portion comprises: the first coil pattern, is formed on insulated substrate; And second coil pattern, be formed in the first coil pattern, the second coil pattern has the width less than the width of the first coil pattern.
Interior loop portion also can comprise tertiary coil pattern, and tertiary coil pattern to be formed in the first coil pattern and the second coil pattern and to cover the second coil pattern.
The width of the second coil pattern can be 0.5 times of the first coil pattern width to 0.9 times.
The width of the first coil pattern can be 80 μm to 120 μm.
The width of the second coil pattern can be 40 μm to 60 μm.
Spacing between the coiler part in interior loop portion can be 5 μm to 20 μm.
Interior loop portion can by one or more ofly being formed of selecting from the group be made up of silver (Ag), palladium (Pd), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) and platinum (Pt).
First coil pattern can be formed by identical metal with the second coil pattern.
Interior loop portion can have the depth-width ratio of 1.1 or larger.
According to another aspect of the present disclosure, a kind of manufacture method of chip electronic assembly can comprise the steps: to form interior loop portion on the surface insulated substrate at least one; On the upper and lower of insulated substrate being formed with interior loop portion, stacking magnetosphere is to form magnetic body; And at least one end surfaces of magnetic body, form external electrode to be connected to interior loop portion, wherein, in the step forming interior loop portion, insulated substrate is formed the first coil pattern, and in the first coil pattern, forms second coil pattern with the width less than the width of the first coil pattern.
The step forming interior loop portion can comprise: on insulated substrate, form the first resistance plating agent with opening, the opening of the first resistance plating agent is for the formation of the first coil pattern; The first coil pattern is formed by the opening of filling for the formation of the first coil pattern; First resistance plating agent and the first coil pattern are formed the second resistance plating agent with opening, and to expose the first coil pattern, the opening of the second resistance plating agent is for the formation of the second coil pattern; The second coil pattern is formed by the opening of filling for the formation of the second coil pattern; And remove the first resistance plating agent and the second resistance plating agent, the opening for the formation of the second coil pattern has the width less than the width of the opening for the formation of the first coil pattern.
Width for the formation of the opening of the second coil pattern can be 0.5 times of the width of the opening for the formation of the first coil pattern to 0.9 times.
In the step forming interior loop portion, plating can be performed with the tertiary coil pattern forming covering second coil pattern in the first coil pattern.
The width of the first coil pattern can be 80 μm to 120 μm.
The width of the second coil pattern can be 40 μm to 60 μm.
Spacing between the coiler part in interior loop portion can be 5 μm to 20 μm.
The one or more of metal filled opening for the formation of the first coil pattern selected the available group from being made up of silver (Ag), palladium (Pd), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) and platinum (Pt) and the opening for the formation of the second coil pattern.
Accompanying drawing explanation
By the detailed description of carrying out below in conjunction with accompanying drawing, above and other aspect of the present disclosure, other advantages of characteristic sum will be more clearly understood from, in the accompanying drawings:
Fig. 1 is the perspective schematic view of the chip electronic assembly illustrated according to exemplary embodiment of the present disclosure, illustrated therein is interior loop portion;
Fig. 2 is the cutaway view intercepted along the line I-I ' of Fig. 1;
Fig. 3 is the schematic expanded view of the part A of Fig. 2;
Fig. 4 is the artwork of the manufacture method of the chip electronic assembly illustrated according to exemplary embodiment of the present disclosure; And
Fig. 5 to Figure 10 is the figure of the manufacture method of the chip electronic assembly sequentially illustrated according to exemplary embodiment of the present disclosure.
Embodiment
Exemplary embodiment of the present disclosure is described in detail now with reference to accompanying drawing.
But the disclosure can illustrate in many different forms, and should not be construed as limited to specific embodiment set forth herein.On the contrary, provide these embodiments to make the disclosure to be thoroughly with complete, and the scope of the present disclosure will be passed on fully to those skilled in the art.
In the accompanying drawings, for the sake of clarity, can exaggerate the shape and size of element, identical Reference numeral will be used to indicate same or analogous element all the time.
chip electronic assembly
Hereinafter, the chip electronic assembly according to exemplary embodiment of the present disclosure will be described.Particularly, thin inductance device will be described, but the disclosure is not limited thereto.
Fig. 1 is the perspective schematic view of the chip electronic assembly illustrated according to exemplary embodiment of the present disclosure, illustrated therein is interior loop portion.Fig. 2 is the cutaway view intercepted along the line I-I ' of Fig. 1.Fig. 3 is the schematic expanded view of the part A of Fig. 2.
Referring to figs. 1 through Fig. 3, as the example of chip electronic assembly, disclose the thin inductance device 100 be used in the power line of power circuit.As chip electronic assembly, except chip inductor, can suitably use chip magnetic bead, chip-type filter etc.
Thin inductance device 100 can comprise magnetic body 50, insulated substrate 20, interior loop portion 40 and external electrode 80.
Magnetic body 50 can form the outward appearance of thin inductance device 100, and can be formed by any material that can show magnetic.Such as, magnetic body 50 is formed by filling Ferrite Material or Metal Substrate soft magnetic material.Ferrite Material can be Mn-Zn based ferrite, Ni-Zn based ferrite, Ni-Zn-Cu based ferrite, Mn-Mg based ferrite, Ba based ferrite or Li based ferrite etc.Metal Substrate soft magnetic material can be Fe-Si-B-Cr base amorphous metal powder, but is not limited thereto.
Magnetic body 50 can have hexahedral shape.In order to clearly describe exemplary embodiment of the present disclosure, hexahedral direction will be defined.L, W and T shown in Fig. 1 refers to the length direction of magnetic body, Width and thickness direction respectively.Magnetic body 50 can have the rectangular shape that its length is greater than its width.
The insulated substrate 20 be formed in magnetic body 50 can be formed by film, such as, and printed circuit board (PCB) (PCB), ferrite substrate, Metal Substrate soft magnetism substrate etc.
Insulated substrate 20 can have the through hole running through its central part, and this through hole can by the same material of such as ferrite or Metal Substrate soft magnetic material etc., to form core.The core being filled with magnetic material can be formed, therefore increase inductance L.
The interior loop portion 40 with coil pattern can be formed on a surface of insulated substrate 20, and the interior loop portion 40 with coil pattern also can be formed in insulated substrate 20 another on the surface.
Interior loop portion 40 can comprise the coil pattern formed with spirality, and the interior loop portion 40 on the surface being formed in insulated substrate 20 and on another surface is electrically connected to each other by the pathway electrode 45 formed in insulated substrate 20.
Each interior loop portion 40 can comprise the first coil pattern 41 be formed on insulated substrate 20, be formed in the second coil pattern 42 in the first coil pattern 41 and be formed in the first coil pattern 41 and the second coil pattern 42 and tertiary coil pattern 43, second coil pattern 42 covering the second coil pattern 42 can have the width less than the width of the first coil pattern 41.Such as, the top surface of coated second coil pattern 42 of tertiary coil pattern 43 and side surface.
First coil pattern 41 by forming the resistance plating agent of patterning and being formed with conducting metal filling opening on insulated substrate 20.
After the first coil pattern 41 is formed, by forming the second resistance plating agent to expose the first coil pattern 41 in the first coil pattern 41, then form the second coil pattern 42 with the conducting metal opening be filled with in the first coil pattern be exposed.
In this case, second coil pattern 42 can be formed as there is the width w2 less than the width w1 of the first coil pattern 41, tertiary coil pattern 43 can be formed to cover the second coil pattern 42 in the first coil pattern 41 and the second coil pattern 42, make coil growth in its width direction can be suppressed, and coil growth in the thickness direction thereof can be accelerated, the interior loop portion 40 with high depth-width ratio (AR) can be realized with this.
Plating is performed to form tertiary coil pattern 43 as Seed Layer by using the first coil pattern 41 and the second coil pattern 42.
The width w2 of the second coil pattern 42 can be 0.5 to 0.9 times of the width w1 of the first coil pattern 41.When the width w2 of the second coil pattern 42 is less than 0.5 times of the width w1 of the first coil pattern 41, can restriction be there is in the coil realizing having high depth-width ratio (AR), and when 0.9 times of width w1 more than the first coil pattern 41 of the width w2 of the second coil pattern 42, tertiary coil pattern can cover the first coil pattern and the second coil pattern, thus cause isotropic growth, make be short-circuited between coiler part, and depth-width ratio (AR) can reduce.
The width w1 of the first coil pattern 41 can be 80 μm to 120 μm, and the width w2 of the second coil pattern 42 can be 40 μm to 60 μm.
In addition, the spacing d1 between the coiler part in interior loop portion 40 can be 5 μm to 20 μm.
The interior loop portion 40 comprising the first coil pattern 41, second coil pattern 42 and tertiary coil pattern 43 can be formed by the metal with excellent conductivity, such as, formed by silver (Ag), palladium (Pd), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) or platinum (Pt) or their alloy etc.
First coil pattern 41, second coil pattern 42 and tertiary coil pattern 43 can be formed by same metal, preferably, can be formed by copper (Cu).
As mentioned above, interior loop portion 40 can comprise the first coil pattern 41, has the second coil pattern 42 of the width less than the width of the first coil pattern 41 and be formed in the first coil pattern 41 and the second coil pattern 42 to cover the tertiary coil pattern 43 of the second coil pattern 42, thus realize high depth-width ratio (AR), such as, 1.1 or larger depth-width ratio (AR) (T/W).
Interior loop portion 40 can be coated by insulating barrier 30.
Insulating barrier 30 is formed by the exposure of methods known in the art such as silk screen print method, photoresist (PR) and developing method, spraying process etc.Interior loop portion 40 can be coated by insulating barrier 30, makes it directly not contact the magnetic material forming magnetic body 50.
The end being formed in the interior loop portion 40 on a surface of insulated substrate 20 can be exposed in the longitudinal direction end surfaces of magnetic body 50, and the end being formed in the interior loop portion 40 on another surface of insulated substrate 20 can be exposed to another end surfaces in the longitudinal direction of magnetic body 50.
External electrode 80 can be respectively formed in their length direction two end surfaces of magnetic body 50, to be connected to the interior loop portion 40 of in their length direction two end surfaces being exposed to magnetic body 50.External electrode 80 may extend in the thickness direction thereof two surfaces of magnetic body 50 and/or in its width direction two surfaces of magnetic body 50.
External electrode 80 can be formed by the metal with excellent conductivity, such as, by nickel (Ni), copper (Cu), tin (Sn), silver (Ag) etc. separately a kind of or their alloy etc. formed.
the manufacture method of chip electronic assembly
Fig. 4 is the artwork of the manufacture method of the chip electronic assembly illustrated according to exemplary embodiment of the present disclosure.Fig. 5 to Figure 10 is the figure of the manufacture method of the chip electronic assembly sequentially illustrated according to exemplary embodiment of the present disclosure.
With reference to Fig. 4, first, interior loop portion 40 can be formed on the surface at least one of insulated substrate 20.
Insulated substrate 20 is not particularly limited, but can be such as PCB, ferrite substrate, Metal Substrate soft magnetism substrate etc., and insulated substrate 20 can have the thickness of 40 μm to 100 μm.
Then, will the process forming interior loop portion 40 be described.With reference to Fig. 5, the first resistance plating agent 60 of the opening 61 had for the formation of the first coil pattern can be formed on insulated substrate 20.
First resistance plating agent 60 can be common photosensitive inhibitor film, dry film inhibitor etc., but is not confined to this particularly.
With reference to Fig. 6, by forming the first coil pattern 41 for the formation of the opening 61 of the first coil pattern performing electroplating technology etc. to fill opening with conducting metal.
First coil pattern 41 can be formed by the metal with excellent conductivity, such as, formed by silver (Ag), palladium (Pb), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) or platinum (Pt), their mixture etc.
First coil pattern 41 can have the width of 80 μm to 120 μm.
With reference to Fig. 7, the second resistance plating agent 70 of the opening 71 had for the formation of the second coil pattern can be formed in the first resistance plating agent 60 and the first coil pattern 41.
Second resistance plating agent 70 can be common photosensitive inhibitor film, dry film inhibitor etc., but is not limited thereto.
First coil pattern 41 is exposed by the opening 71 for the formation of the second coil pattern.Here, the little width of the width of the width than the first coil pattern 41 or the opening 61 for the formation of the first coil pattern can be had for the formation of the opening 71 of the second coil pattern.
With reference to Fig. 8, by forming the second coil pattern 42 for the formation of the opening 71 of the second coil pattern performing electroplating technology etc. to fill opening with conducting metal.
Second coil pattern 42 can be formed by the metal with excellent conductivity, such as, formed by silver (Ag), palladium (Pb), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) or platinum (Pt), their mixture etc.More preferably, the second coil pattern 42 can by with the Metal Phase of the first coil pattern 41 with metal formed, to improve connectivity between coil pattern and conductivity.
The width of the second coil pattern 42 can be less than the width of the first coil pattern 41.Such as, the width of the second coil pattern 42 can be 0.5 to 0.9 times of the width of the first coil pattern 41.When the width w2 of the second coil pattern 42 is less than 0.5 times of the width w1 of the first coil pattern 41, can restriction be there is in the coil realizing having high depth-width ratio (AR), and when 0.9 times of width w1 more than the first coil pattern 41 of the width w2 of the second coil pattern 42, tertiary coil pattern can cover the first coil pattern and the second coil pattern, thus cause isotropic growth, make be short-circuited between coiler part, and depth-width ratio (AR) can reduce.
Second coil pattern 42 can have the width of 40 μm to 60 μm.
With reference to Fig. 9, the first resistance plating agent 60 and the second resistance plating agent 70 can be removed.
With reference to Figure 10, by performing the tertiary coil pattern 43 that plating forms covering second coil pattern 42 in the first coil pattern 41.
The first coil pattern 41 and the second coil pattern 42 can be used to form tertiary coil pattern 43 as Seed Layer.
Second coil pattern 42 is formed as there is the width less than the width of the first coil pattern 41, first coil pattern 41 and the second coil pattern 42 form tertiary coil pattern 43 to cover the second coil pattern 42, make coil growth in its width direction can be suppressed, and coil growth in the thickness direction thereof can be accelerated, the interior loop portion 40 with high depth-width ratio (AR) can be realized with this.
Tertiary coil pattern 43 can be formed by the metal with excellent conductivity, such as, formed by silver (Ag), palladium (Pb), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) or platinum (Pt), their mixture etc.More preferably, tertiary coil pattern 43 can by with the Metal Phase of the first coil pattern 41 and the second coil pattern 42 with metal formed, to improve connectivity between coil pattern and conductivity.
The interior loop portion 40 comprising the first coil pattern 41, second coil pattern 42 and tertiary coil pattern 43 be formed as described above can have depth-width ratio (AR) (T/W) of 1.1 or larger, and the spacing between the coiler part in interior loop portion 40 can be 5 μm to 20 μm.
By forming this hole of Kong Bingyong filled with conductive material to form pathway electrode 45 in a part for insulated substrate 20, be electrically connected to each other by pathway electrode 45 on a surface of insulated substrate 20 and another interior loop portion 40 formed on the surface.
In the core of insulated substrate 20, the hole penetrating insulated substrate 20 is formed by performing bore process, laser processing, blasting craft or punching technology etc. on the core of insulated substrate 20.
After formation interior loop portion 40, the insulating barrier 30 in coated interior loop portion 40 can be formed.Form insulating barrier 30 by the exposure of such as silk screen print method, photoresist (PR) and the methods known in the art such as developing method, spraying process, but the disclosure is not limited to this.
Next, on the upper and lower that can be formed with the insulated substrate 20 in interior loop portion 40 thereon, stacking magnetosphere is to form magnetic body 50.
Suppress stacking magnetosphere by laminating or isostatic pressing method form magnetic body 50 by stacking magnetosphere on two surfaces of insulated substrate 20.In this case, core can be formed, that is, available same material hole by such as under type.
Then, external electrode 80 can be formed to be connected to the interior loop portion 40 of at least one end surfaces being exposed to magnetic body 50.
External electrode 80 can be formed by the cream comprising metal (have excellent conductance), such as, by comprise nickel (Ni), copper (Cu), tin (Sn) or silver-colored (Ag) or their alloy conductive paste formed.Except print process, external electrode 80 can be formed according to the shape of external electrode by infusion process etc.
Other features repeated with the feature of the above-mentioned chip electronic assembly according to foregoing example embodiment of the present disclosure will be omitted.
As mentioned above, according to exemplary embodiment of the present disclosure, provide a kind of chip electronic assembly and manufacture method thereof, the interior loop structure of this chip electronic assembly can prevent the generation of short circuit between coiler part by increasing the thickness of coil relative to the width of coil and realize high depth-width ratio (AR).
Therefore, the cross-sectional area of coil can be increased, direct current (DC) resistance (Rdc) can be reduced, and can inductance be improved.
Although illustrate and describe exemplary embodiment above, being apparent that for those skilled in the art, when not departing from the spirit and scope of the present disclosure be defined by the claims, can modifying and change.
Claims (17)
1. a chip electronic assembly, comprising:
Magnetic body, comprises insulated substrate;
Interior loop portion, be formed in insulated substrate at least one on the surface; And
External electrode, is formed at least one end surfaces of magnetic body, and is connected to interior loop portion,
Wherein, interior loop portion comprises:
First coil pattern, is formed on insulated substrate; And
Second coil pattern, is formed in the first coil pattern,
Second coil pattern has the width less than the width of the first coil pattern.
2. chip electronic assembly as claimed in claim 1, wherein, interior loop portion also comprises tertiary coil pattern, and tertiary coil pattern to be formed in the first coil pattern and the second coil pattern and to cover the second coil pattern.
3. chip electronic assembly as claimed in claim 1, wherein, the width of the second coil pattern is 0.5 times of the width of the first coil pattern to 0.9 times.
4. chip electronic assembly as claimed in claim 1, wherein, the width of the first coil pattern is 80 μm to 120 μm.
5. chip electronic assembly as claimed in claim 1, wherein, the width of the second coil pattern is 40 μm to 60 μm.
6. chip electronic assembly as claimed in claim 1, wherein, the spacing between the coiler part in interior loop portion is 5 μm to 20 μm.
7. chip electronic assembly as claimed in claim 1, wherein, interior loop portion is by one or more ofly being formed of selecting from the group be made up of silver, palladium, aluminium, nickel, titanium, gold, copper and platinum.
8. chip electronic assembly as claimed in claim 1, wherein, the first coil pattern is formed by identical metal with the second coil pattern.
9. chip electronic assembly as claimed in claim 2, wherein, interior loop portion has the depth-width ratio of 1.1 or larger.
10. a manufacture method for chip electronic assembly, comprises the steps:
Interior loop portion is formed on the surface at least one of insulated substrate;
On the upper and lower of insulated substrate being formed with interior loop portion, stacking magnetosphere is to form magnetic body; And
At least one end surfaces of magnetic body forms external electrode to be connected to interior loop portion,
Wherein, in the step forming interior loop portion, insulated substrate forms the first coil pattern, and in the first coil pattern, form second coil pattern with the width less than the width of the first coil pattern.
11. manufacture methods as claimed in claim 10, wherein, the step forming interior loop portion comprises:
Insulated substrate is formed the first resistance plating agent with opening, and the opening of the first resistance plating agent is for the formation of the first coil pattern;
The first coil pattern is formed by the opening of filling for the formation of the first coil pattern;
First resistance plating agent and the first coil pattern are formed the second resistance plating agent with opening, and to expose the first coil pattern, the opening of the second resistance plating agent is for the formation of the second coil pattern;
The second coil pattern is formed by the opening of filling for the formation of the second coil pattern; And
Remove the first resistance plating agent and the second resistance plating agent,
Opening for the formation of the second coil pattern has the width less than the width of the opening for the formation of the first coil pattern.
12. manufacture methods as claimed in claim 11, wherein, the width for the formation of the opening of the second coil pattern is 0.5 times to 0.9 times of the width of opening for the formation of the first coil pattern.
13. manufacture methods as claimed in claim 10, wherein, in the step forming interior loop portion, the first coil pattern perform plating with the tertiary coil pattern forming covering second coil pattern.
14. manufacture methods as claimed in claim 10, wherein, the width of the first coil pattern is 80 μm to 120 μm.
15. manufacture methods as claimed in claim 10, wherein, the width of the second coil pattern is 40 μm to 60 μm.
16. manufacture methods as claimed in claim 10, wherein, the spacing between the coiler part in interior loop portion is 5 μm to 20 μm.
17. manufacture methods as claimed in claim 11, wherein, with the one or more of metal filled opening for the formation of the first coil pattern selected from the group be made up of silver, palladium, aluminium, nickel, titanium, gold, copper and platinum and the opening for the formation of the second coil pattern.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2013-0158080 | 2013-12-18 | ||
| KR1020130158080A KR101994726B1 (en) | 2013-12-18 | 2013-12-18 | Chip electronic component and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104733155A true CN104733155A (en) | 2015-06-24 |
| CN104733155B CN104733155B (en) | 2018-02-02 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410186896.7A Expired - Fee Related CN104733155B (en) | 2013-12-18 | 2014-05-05 | Chip electronic component and its manufacture method |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP6213996B2 (en) |
| KR (1) | KR101994726B1 (en) |
| CN (1) | CN104733155B (en) |
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| CN109961938A (en) * | 2017-12-26 | 2019-07-02 | 三星电机株式会社 | Coil block and its manufacturing method |
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Also Published As
| Publication number | Publication date |
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| KR20150071266A (en) | 2015-06-26 |
| KR101994726B1 (en) | 2019-07-01 |
| JP2015119158A (en) | 2015-06-25 |
| JP6213996B2 (en) | 2017-10-18 |
| CN104733155B (en) | 2018-02-02 |
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