CN104618208A - Elastic data interaction comprehensive bus system - Google Patents
Elastic data interaction comprehensive bus system Download PDFInfo
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- CN104618208A CN104618208A CN201510039205.5A CN201510039205A CN104618208A CN 104618208 A CN104618208 A CN 104618208A CN 201510039205 A CN201510039205 A CN 201510039205A CN 104618208 A CN104618208 A CN 104618208A
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- G—PHYSICS
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
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Abstract
Disclosed is an elastic data interaction comprehensive bus system. The elastic data interaction comprehensive bus system integrates an Ethernet bus, a synchronous serial bus, a field bus CAN (controller area network) and achieves integration through the FPGA (field programmable gate array) technology. According to the elastic data interaction comprehensive bus system, the functional circuit modules of the three buses are designed by taking FPGA as the carrier and through internal ultralarge-scale programmable logic circuits, and the functional circuit modules works independently in parallel on the basis of a stream line working mode to achieve the communication function of the Ethernet bus, the synchronous serial bus and the field bus CAN.
Description
Technical field
The present invention relates to the communication technology of secondary equipment in power system inside, technical field belongs to industrial measurement and control field.
Background technology
The design of function combination is carried out in the many employings of secondary equipment in power system based on card module, card module is independently functional unit, and each card module carries out physical connection construction system by common backplane.Take core bus as common data channel between card module, realize information transmission by the communication technology, complete data interaction and share, for information processing lays the foundation.
The transfer of data of electric power types of applications has different requirement to time delay index, transmits general time delay in hundred us levels for analog quantity sampled data; For conventional I/O data, propagation delay time is ms level.Some application has requirement to data bandwidth, and as protecting single equipment receives data from outside multiple stage process layer devices, so device interior data transfer bandwidth must higher than external interface total bandwidth.
Therefore, need a kind of new technical scheme to solve the problem.
Summary of the invention
The object of this invention is to provide a kind of comprehensive bus system comprising industry ethernet module, CAN module, synchronous serial bus module, bus can be selected according to the requirement of different communication bandwidth and time delay, realize the bus communication function of combination in any.
For achieving the above object, data elasticity of the present invention mutual comprehensive bus system adopts following technical scheme:
The mutual comprehensive bus system of a kind of data elasticity, comprises backboard, industry ethernet module, CAN module, synchronous serial bus module; Industry ethernet module comprises user interface, receives control, sends control, MDIO configuration interface, first in first out memory block; User interface is used for configuration and state information is mutual, message is read and write; Receive control section to be used for from external reception Ethernet message, realize message checking and filtering function; Send and control for sending Ethernet message; MDIO configuration interface completes the configuration to outside physical channel; First in first out memory block is for storing Ethernet message; Synchronous serial bus module comprises user interface, serioparallel exchange, parallel-serial conversion, memory block; User interface is used for configuration and state information is mutual, message is read and write; Serioparallel exchange is used for serial data to be converted to parallel data; Parallel-serial conversion is used for parallel data to be converted to serial data; Memory block is used for the buffer memory of message; CAN module comprises user interface, bit timing, transmission controls, reception controls, first in first out memory block; User interface is used for configuration and state information is mutual, message is read and write; Bit timing is used for synchronisation of nodes; Send and control for sending CAN Frame; Receive and control for receiving CAN Frame; First in first out memory block is used for the buffer memory of Frame.
The integrated industry ethernet of the present invention, synchronous serial bus, CAN Bus, and support flexible configuration, the technology realizing the communication function of combination in any mode is the mutual comprehensive bus technology of data elasticity; The device of different application type can select this three classes bus to combinationally use neatly; the needs of several data process business can be completed; as conventional protection supervisory equipment can adopt synchronous serial bus and fieldbus, intelligent station apparatus and the sampling of equipment for monitoring power quality high-speed ADC need compatible industry ethernet etc.
The present invention has the following advantages:
(1) functional integration of the present invention is high, and reduce printed circuit board area, cost is low.
(2) multiple choices of secondary equipment in power system intercommunication mode are supported, easy to use, flexible.
Accompanying drawing explanation
Fig. 1 is the structural representation of the mutual comprehensive bus system of data elasticity of the present invention;
Fig. 2 is a typical apply figure of the mutual comprehensive bus system of data elasticity of the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, illustrate the present invention further, these embodiments should be understood only be not used in for illustration of the present invention and limit the scope of the invention, after having read the present invention, the amendment of those skilled in the art to the various equivalent form of value of the present invention has all fallen within the application's claims limited range.
As shown in Figure 1, the present invention discloses the mutual comprehensive bus system of a kind of data elasticity, comprises backboard, industry ethernet module, CAN module, synchronous serial bus module.
Industry ethernet inside modules is controlled by user interface, reception, send the parts such as control, MDIO configuration interface, first in first out (FIFO) memory block forms.User interface is used for configuration and state information is mutual, message is read and write; Receive control section to be used for from external reception Ethernet message, realize the function such as message checking and filtration; Send and control for sending Ethernet message; MDIO configuration interface completes the configuration to outside physical channel; FIFO is for storing Ethernet message.
The part such as synchronous serial bus inside modules user interface, serioparallel exchange, parallel-serial conversion, memory block composition.User interface is used for configuration and state information is mutual, message is read and write; Serioparallel exchange is used for serial data to be converted to parallel data; Parallel-serial conversion is used for parallel data to be converted to serial data; Memory block is used for the buffer memory of message.
CAN inside modules is controlled by user interface, bit timing, transmission, receive the part such as control, first in first out (FIFO) memory block forms.User interface is used for configuration and state information is mutual, message is read and write; Bit timing is used for synchronisation of nodes; Send and control for sending CAN Frame; Receive and control for receiving CAN Frame; FIFO is used for the buffer memory of Frame.
Industry ethernet module in Fig. 1, synchronous serial bus module, CAN module all use hardware description language Verilog HDL to carry out design in FPGA inside and realize, circuit has very strong portability and reusability, namely the design slightly make an amendment just can be transplanted to different FPGA manufacturer product on, realize the same mutual comprehensive bus of data elasticity.
Industry ethernet module adopts state machine design message to receive and transmission flow, receive and send state machine independently circular flow under high frequency clock beat, when sending message, application layer message is taken out from transmission FIFO, package according to Ethernet message frame form, complete CRC check simultaneously and calculate; When receiving message, Ethernet message is resolved, filter and judge check value, by effective message stored in reception FIFO.
Synchronous serial bus module completes reception and the transmission of serial message under the control of high frequency clock, and the data link layer frame format of serial message comprises start-of-frame, frame number, length, application layer data, frame check, frame end symbol.Physical layer adopts low-voltage differential LVDS signal to realize.
CAN Bus module realizes synchronisation of nodes function based on bit timing module, takes out data calculate according to frame format framing, coding, CRC check under transmission state from transmission FIFO; Under accepting state, CAN message is resolved, filter and judge check value, by effective message stored in reception FIFO.
Operation principle of the present invention is as follows:
First bus communication mode is selected according to configuration, the bus selected can be the combination in any of three kinds of buses, then carry out the initialization of messaging parameter for specific bus, chip initiation terminates to communicate with other nodes as the node of on core bus afterwards.Industry ethernet carries out packet sending and receiving according to standard frame format, traffic rate 10Mbps, 100Mbps or 1Gbps.CAN Bus is according to standard agreement work, and traffic rate is up to 1Mbps.Synchronous serial bus adopts proprietary protocol working method, and traffic rate reaches hundreds of Mbps.Types of applications, according to the different requirements of its transfer of data to time delay index, can select the bus be suitable for flexibly, and such as select real-time synchronization universal serial bus, general time delay, within the single control cycle determined, reaches hundred Microsecond grades; The propagation delay time of conventional I/O data is ms level, selects fieldbus as CAN.Some application have requirement to data bandwidth, such as higher to transmission data bandwidth requirement, can select Industrial Ethernet bus; General CAN bandwidth is up to 1Mbps; The most high bandwidth of native system real-time synchronization universal serial bus is at 400Mbps.The device of different application type can select this three classes bus to combinationally use neatly; the needs of several data process business can be completed; as conventional protection supervisory equipment can adopt synchronous serial bus and fieldbus, intelligent station apparatus and the sampling of equipment for monitoring power quality high-speed ADC need compatible industry ethernet etc.
This based on the integrated industry ethernet of FPGA, synchronous serial bus, CAN, and support flexible configuration, the technology realizing the communication function of combination in any mode is the mutual comprehensive bus technology of data elasticity.
Fig. 2 is the typical apply figure of the mutual comprehensive bus IP of data elasticity.In figure, each plug-in unit is a communication node, and communication mode can be configured to one or more in industry ethernet, synchronous serial bus, CAN, can form the communication structures such as many master, one master and multiple slaves between different plug-in unit by flexible combination.The each board of internal system is based on unification, the timing synchronization work determined, all modules are all connected by backboard low-voltage differential LVDS synchronous serial bus, wherein time service plate is as synchronisation source, in Fixed Time Interval, on core bus, the hard real-time packet with reference time scale is broadcasted by time service plate, each board receives sync message at synchronization from synchronous serial bus, therefrom obtain reference time scale, and compared with local markers, compensate difference between the two.Even gradual markers Tuning Principle is taked in compensation method, namely according to the difference size between reference time scale and local zone time and direction, dynamically increase or reduce markers follow-up step-length, local markers being restrained gradually, within several synchronizing cycles, is transitioned into synchronous regime.
Backboard needs Switch plug-in unit in return node under industry ethernet communication mode, all plug-in units all carry out physical connection by Switch, and Ethernet message all realizes storage and the forwarding to arbitrary node at Switch, realizes the data sharing between many plug-in units.
The topological structure of synchronous serial bus is that bus is shared, and mode of operation is half-duplex mode.All plug-in units share data and control bus, all there is the authority initiating transfer of data, bus uses the transmission of token to realize the usufructuary president of time division multiplex bus, and synchronization only has one block of main management plug-in unit initiate request of data and send data, and other plug-in units are in receiving mode.When main plug-in unit completes transfer of data, can will send token message according to configuration information, bus rights of using are transferred to next end points of setting.Bus uses specific protocol address to identify the final purpose end points of message.When carrying out exchanges data based on real-time synchronization universal serial bus, in order to reach the object improving data transfer bandwidth, make full use of FPGA two along register technique, the rising and falling edges of clock is all as the moment that data send and sample, two data transfer are achieved within a clock cycle, reach the function of single clock Double Data, under system clock is 100MHz situation, single-channel data throughput is increased to 200Mbps by 100Mbps; Bus makes data throughout double by channel expansion.
Under CAN Bus communication mode, all nodes follow CAN2.0A or CAN2.0B bus standard, communicate with frame format according to unified speed.
Claims (8)
1. the mutual comprehensive bus system of data elasticity, is characterized in that: comprise backboard, industry ethernet module, CAN module, synchronous serial bus module;
Industry ethernet module comprises user interface, receives control, sends control, MDIO configuration interface, first in first out memory block; User interface is used for configuration and state information is mutual, message is read and write; Receive control section to be used for from external reception Ethernet message, realize message checking and filtering function; Send and control for sending Ethernet message; MDIO configuration interface completes the configuration to outside physical channel; First in first out memory block is for storing Ethernet message;
Synchronous serial bus module comprises user interface, serioparallel exchange, parallel-serial conversion, memory block; User interface is used for configuration and state information is mutual, message is read and write; Serioparallel exchange is used for serial data to be converted to parallel data; Parallel-serial conversion is used for parallel data to be converted to serial data; Memory block is used for the buffer memory of message;
CAN module comprises user interface, bit timing, transmission controls, reception controls, first in first out memory block; User interface is used for configuration and state information is mutual, message is read and write; Bit timing is used for synchronisation of nodes; Send and control for sending CAN Frame; Receive and control for receiving CAN Frame; First in first out memory block is used for the buffer memory of Frame.
2. the mutual comprehensive bus system of data elasticity according to claim 1, it is characterized in that: industry ethernet module adopts state machine design message to receive and transmission flow, receive and send state machine independently circular flow under high frequency clock beat, when sending message, application layer message is taken out from first in first out memory block, package according to Ethernet message frame form, complete CRC check simultaneously and calculate; When receiving message, Ethernet message is resolved, filter and judge check value, by effective message stored in first in first out memory block.
3. the mutual comprehensive bus system of data elasticity according to claim 1, it is characterized in that: synchronous serial bus module completes reception and the transmission of serial message under the control of high frequency clock, the data link layer frame format of serial message comprises start-of-frame, frame number, length, application layer data, frame check, frame end symbol; Physical layer adopts low-voltage differential LVDS signal to realize.
4. the mutual comprehensive bus system of data elasticity according to claim 1, it is characterized in that: CAN module realizes synchronisation of nodes function based on bit timing module, take out data under transmission state from first in first out memory block and calculate according to frame format framing, coding, CRC check; Under accepting state, CAN message is resolved, filter and judge check value, by effective message stored in first in first out memory block.
5. the mutual comprehensive bus system of data elasticity according to claim 1, it is characterized in that: time service plate is set as synchronisation source, in Fixed Time Interval, on core bus, the hard real-time packet with reference time scale is broadcasted by time service plate, synchronous serial bus module receives sync message from core bus, therefrom obtain reference time scale, and compared with local markers, compensate difference between the two.
6. the mutual comprehensive bus system of data elasticity according to claim 2, it is characterized in that: under industry ethernet communication mode, backboard needs Switch plug-in unit in return node, all plug-in units all carry out physical connection by Switch, Ethernet message all realizes storage and the forwarding to arbitrary node at Switch, realizes the data sharing between many plug-in units.
7. the mutual comprehensive bus system of data elasticity according to claim 3, is characterized in that: the topological structure of synchronous serial bus is that bus is shared, and mode of operation is half-duplex mode.
8. the mutual comprehensive bus system of data elasticity according to claim 4, is characterized in that: under CAN Bus communication mode, all nodes follow CAN2.0A or CAN2.0B bus standard, communicates according to unified speed with frame format.
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| CN201510039205.5A CN104618208A (en) | 2015-01-26 | 2015-01-26 | Elastic data interaction comprehensive bus system |
| PCT/CN2015/096748 WO2016119525A1 (en) | 2015-01-26 | 2015-12-09 | Elastic data interaction integrated bus system |
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Application publication date: 20150513 |