CN104465876B - The manufacture method of polycrystalline silicon battery plate - Google Patents
The manufacture method of polycrystalline silicon battery plate Download PDFInfo
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- CN104465876B CN104465876B CN201410758121.2A CN201410758121A CN104465876B CN 104465876 B CN104465876 B CN 104465876B CN 201410758121 A CN201410758121 A CN 201410758121A CN 104465876 B CN104465876 B CN 104465876B
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 36
- 238000000034 method Methods 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 239000013078 crystal Substances 0.000 claims abstract description 211
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 51
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 51
- 239000010703 silicon Substances 0.000 claims abstract description 51
- 229920005591 polysilicon Polymers 0.000 claims abstract description 19
- 229910052709 silver Inorganic materials 0.000 claims abstract description 16
- 239000004332 silver Substances 0.000 claims abstract description 16
- 238000007711 solidification Methods 0.000 claims abstract description 4
- 230000008023 solidification Effects 0.000 claims abstract description 4
- 108010085990 projectin Proteins 0.000 claims description 33
- 238000002789 length control Methods 0.000 claims description 16
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 15
- 230000009466 transformation Effects 0.000 abstract description 3
- 150000001875 compounds Chemical class 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 4
- 238000005215 recombination Methods 0.000 description 4
- 230000006798 recombination Effects 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 210000000085 cashmere Anatomy 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
- H01L31/0368—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors
- H01L31/03682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic Table
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1876—Particular processes or apparatus for batch treatment of the devices
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/546—Polycrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention discloses the manufacture method of a kind of polycrystalline silicon battery plate, including: 1) use seed crystal to lay inculating crystal layer, inculating crystal layer induced growth directional solidification prepares polycrystal silicon ingot；Crystal grain in described polycrystal silicon ingot is formed by the seed crystal induced growth in inculating crystal layer；2) by above-mentioned polycrystal silicon ingot first perpendicular cut after the most crosscutting, make polysilicon chip；Described polysilicon chip surface includes the crystal grain cross-section that polycrystal silicon ingot crystal grain is formed when crosscutting；3) some thin grid of the silver being parallel to each other are printed on above-mentioned polysilicon chip surface by battery grid line printing process；When inculating crystal layer is laid, all or part of use cross section is the seed crystal of thin-and-long, is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section.The present invention is to crystal grain cross-section, and the arranged relative position of crystal grain cross-section and grid line is optimized selection, produce appropriateness and introduce the polycrystalline silicon battery plate of crystal boundary, make the leap crystal boundary that electronics is the fewest, grain boundary density is also made to control in OK range, absorb dislocation by crystal boundary, improve minority carrier life time, improve the photoelectric transformation efficiency of battery.
Description
Technical field
The present invention relates to technical field of solar batteries, be specifically related to the manufacture method of a kind of polycrystalline silicon battery plate.
Background technology
At present in solar cell market, crystal silicon cell occupies the market share of absolute majority always.And the polycrystalline battery in crystal silicon battery, due to comprehensive low cost of manufacture, its share surmounts single crystal battery the most significantly.But, owing to crystal grain orientation is mixed and disorderly on silicon chip, processed with acid technology for cashmere can only be used, cause polycrystalline silicon texturing back reflection rate higher；Meanwhile, forming crystal boundary between neighboring die, due to the internal more crystal boundary of silicon chip, crystal boundary has the highest recombination rate to photo-generated carrier, and these two aspects reason causes the efficiency of polycrystalline battery to be substantially less than single crystal battery.The particularly reason of crystal boundary high recombination rate, causes the battery technology of more existing advanced persons to be difficult to apply on polycrystalline battery.Therefore, improve crystal boundary and battery photo-generated carrier is combined, become one of core topic of lifting polycrystalline battery efficiency.
On the one hand improve crystal boundary battery photo-generated carrier is combined, crystal boundary can be reduced, for example with class single crystal technology, but after being the reduction of crystal boundary, the defects such as the dislocation in wafer bulk cannot be absorbed and eliminated, and causes being combined carrier the biggest, unfavorable to improved efficiency；On the other hand, it may be considered that change the relative position that crystal boundary is distributed in silicon chip, to change crystal boundary influence degree in Carrier recombination.
The p-type solar cell of general structure is after by illumination, at battery surface with internal all can produce substantial amounts of light induced electron and hole, both carriers are under p-n junction effect, can be transmitted in the opposite direction, i.e. electronics is to battery front side (heavily doped phosphorous layer) this side shifting, hole, to cell backside (aluminum back surface field) side shifting, is finally respectively transmitted on upper/lower electrode, forms open-circuit voltage.In order to be able to allow more light shine generating on battery, front silver grating line can only be distributed in surface with certain spacing (1.5-2 mm).Therefore in electronic transmission process, first along silicon wafer thickness direction from the inwardly facing surface movement of wafer bulk, carry out silicon chip surface transverse shifting then along heavily doped phosphorous layer, transmit to the thin grid of silver of collected current effect.In traditional silicon chip, crystal boundary is through upper and lower two surfaces of silicon chip (grain-boundary shape seen from silicon chip two sides is close).This structure can ensure that photo-generated carrier, when moving along silicon wafer thickness direction, as far as possible crosses over crystal boundary less, crystal boundary compound less.But, electronics, when heavily doped phosphorous layer lateral transport, can encounter a lot of crystal boundary, produces the most serious being combined.
Chinese patent application 201310032658.6, disclose a kind of polysilicon solar cell dicing method, the most crosscutting for silicon chip erecting again is cut, the direction that silicon chip crystal grain is extended is parallel with silicon chip surface direction, after such polysilicon chip makes battery, as long as thin grid line direction is vertical with crystal grain bearing of trend, electronics is when the heavily doped layer lateral transport along surface, crossing over crystal boundary hardly, crystal boundary is compound the lowest；But the method will necessarily encounter a lot of crystal boundary along silicon wafer thickness direction when electronics transmits, producing the most compound, battery efficiency does not have and is obviously improved.
Summary of the invention
It is an object of the invention to provide the manufacture method of a kind of polycrystalline silicon battery plate, it is to surface sections, and the arranged relative position of surface sections and thin grid line is optimized selection, coordinate existing silicon ingot cutting mode, produce appropriateness and introduce the polycrystalline silicon battery plate of crystal boundary, make electronics no matter in layer lateral transport direction heavily doped along surface, or along silicon wafer thickness direction, the fewest leap crystal boundary, it is compound that minimizing electronics causes because of crystal boundary；Meanwhile, introducing suitable crystal boundary on silicon chip, be used for absorbing the dislocation in wafer bulk and impurity so that intra-die is the cleanest, improve the minority carrier life time of silicon chip, it is compound that minimizing causes because of dislocation, finally significantly improves the transformation efficiency of battery.
For achieving the above object, the technical scheme is that the manufacture method designing a kind of polycrystalline silicon battery plate, comprise the steps:
1) using seed crystal to lay inculating crystal layer, inculating crystal layer induced growth directional solidification prepares polycrystal silicon ingot；Crystal grain in described polycrystal silicon ingot is formed by the seed crystal induced growth in inculating crystal layer；
2) by above-mentioned polycrystal silicon ingot first perpendicular cut after the most crosscutting, make polysilicon chip；Described polysilicon chip surface includes the crystal grain cross-section that polycrystal silicon ingot crystal grain is formed when crosscutting；
3) some thin grid of the silver being parallel to each other are printed on above-mentioned polysilicon chip surface by battery grid line printing process；
When inculating crystal layer is laid, all or part of use cross section is the seed crystal of thin-and-long, is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section；
Grating projectin's length of above-mentioned thin-and-long crystal grain cross-section being controlled 2～20mm, vertical gate line projection length controls 4～156mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/2；The gross area of thin-and-long crystal grain cross-section is accounted for the Ratio control of silicon chip surface area more than 40%；
Above-mentioned grating projectin a length of thin-and-long crystal grain cross-section projected length on the thin grid of silver, vertical gate line projection a length of thin-and-long crystal grain cross-section projected length in silver thin grid vertical direction.
Preferably, when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 2～20mm, and long edge lengths is 4～156mm, and the ratio of bond length and long edge lengths is less than or equal to 1/2;It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and grating projectin's length of thin-and-long crystal grain cross-section is controlled 2～20mm, vertical gate line projection length controls 4～156mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/2；The gross area of thin-and-long crystal grain cross-section is accounted for the Ratio control of silicon chip surface area more than 40%.
Preferably, when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 4～20mm, and long edge lengths is 12～100mm, and the ratio of bond length and long edge lengths is less than or equal to 1/3；It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and grating projectin's length of thin-and-long crystal grain cross-section is controlled 4～20mm, vertical gate line projection length controls 12～100mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/3；The gross area of thin-and-long crystal grain cross-section is accounted for the Ratio control of silicon chip surface area more than 40%.
Preferably, when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 5～20mm, and long edge lengths is 20～90mm, and the ratio of bond length and long edge lengths is less than or equal to 1/4；It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and grating projectin's length of thin-and-long crystal grain cross-section is controlled 5～20mm, vertical gate line projection length controls 20～90mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/4；The gross area of thin-and-long crystal grain cross-section is accounted for the Ratio control of silicon chip surface area more than 40%.
Preferably, when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 5～15mm, and long edge lengths is 25～80mm, and the ratio of bond length and long edge lengths is less than or equal to 1/5；It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and grating projectin's length of thin-and-long crystal grain cross-section is controlled 5～15mm, vertical gate line projection length controls 25～80mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/5；The gross area of thin-and-long crystal grain cross-section is accounted for the Ratio control of silicon chip surface area more than 40%.
Preferably, using cross section is that rectangular seed crystal mutually splices laying inculating crystal layer, during splicing, makes the long limit conllinear of each rectangle seed crystal cross section or is parallel to each other, and above-mentioned each rectangle seed crystal cross section is positioned in same inculating crystal layer cross section.
In the manufacture method of polycrystalline silicon battery plate of the present invention, polysilicon chip is first erected crosscutting after cutting making by polycrystal silicon ingot, make the crystal grain in polysilicon chip and crystal boundary through silicon chip upper and lower surface, ensure that photo-generated carrier is when moving along silicon wafer thickness direction, the fewest leap crystal boundary, it is compound that minimizing electronics causes because of crystal boundary；In order to make the leap crystal boundary that electronics is the fewest in layer lateral transport direction heavily doped along surface, the present invention passes through a large amount of creative experiments, and to surface sections, and the arranged relative position of surface sections and grid line (the thin grid of silver) is optimized selection；Surface sections of the present invention is thin-and-long, its projected length on the thin grid of silver is 2～20mm, this projected length is less than or equal to 1/2 with the ratio of vertical gate line projection length, and print grid line (the thin grid of silver) general only about the 2mm in interval, this makes on polysilicon chip surface, electronics, when the direction (i.e. vertical grid line direction) of heavily doped phosphorous layer lateral transport is mobile, runs into may as far as possible being reduced of crystal boundary, and generation electronics is substantially reduced with the chance of hole-recombination；Additionally, surface sections projected length on the thin grid of silver is 2～20mm, also make on parallel grid line direction, polysilicon chip remains a number of crystal boundary not hindering electronics to move towards, and grain boundary density is unlikely to excessive, the dislocation in wafer bulk and impurity can be absorbed so that intra-die is the cleanest, improve the minority carrier life time of silicon chip；Two above aspect cooperates, it is possible to increase the short circuit current of battery and fill factor, curve factor, thus significantly improves the transformation efficiency of battery.
Detailed description of the invention
Below in conjunction with embodiment, the detailed description of the invention of the present invention is further described.Following example are only used for clearly illustrating technical scheme, and can not limit the scope of the invention with this.
The technical scheme that the present invention is embodied as is:
Embodiment 1
The manufacture method of a kind of polycrystalline silicon battery plate, comprises the steps:
1) using seed crystal to lay inculating crystal layer, inculating crystal layer induced growth directional solidification prepares polycrystal silicon ingot；Crystal grain in described polycrystal silicon ingot is formed by the seed crystal induced growth in inculating crystal layer；
2) by above-mentioned polycrystal silicon ingot first perpendicular cut after the most crosscutting, make polysilicon chip；Described polysilicon chip surface includes the crystal grain cross-section that polycrystal silicon ingot crystal grain is formed when crosscutting；
3) some thin grid of the silver being parallel to each other are printed on above-mentioned polysilicon chip surface by battery grid line printing process；
When inculating crystal layer is laid, all or part of use cross section is the seed crystal of thin-and-long, is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section；
Grating projectin's length of above-mentioned thin-and-long crystal grain cross-section being controlled 2～20mm, vertical gate line projection length controls 4～156mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/2；The gross area of thin-and-long crystal grain cross-section is accounted for the Ratio control of silicon chip surface area more than 40%；
Above-mentioned grating projectin a length of thin-and-long crystal grain cross-section projected length on the thin grid of silver, vertical gate line projection a length of thin-and-long crystal grain cross-section projected length in silver thin grid vertical direction.
Embodiment 2
On the basis of embodiment 1, being distinguished as: when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 2～20mm, and long edge lengths is 4～156mm, and the ratio of bond length and long edge lengths is less than or equal to 1/2;It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and grating projectin's length of thin-and-long crystal grain cross-section is controlled 2～20mm, vertical gate line projection length controls 4～156mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/2；The gross area of thin-and-long crystal grain cross-section is accounted for the Ratio control of silicon chip surface area more than 40%.
Embodiment 3
On the basis of embodiment 2, it is distinguished as: all using cross section is that rectangular seed crystal mutually splices laying inculating crystal layer, during splicing, making the long limit conllinear of each rectangle seed crystal cross section or be parallel to each other, above-mentioned each rectangle seed crystal cross section is positioned in same inculating crystal layer cross section.
Embodiment 4
On the basis of embodiment 1, being distinguished as: when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 4～20mm, and long edge lengths is 12～100mm, and the ratio of bond length and long edge lengths is less than or equal to 1/3；It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and grating projectin's length of thin-and-long crystal grain cross-section is controlled 4～20mm, vertical gate line projection length controls 12～100mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/3；The gross area of thin-and-long crystal grain cross-section is accounted for the Ratio control of silicon chip surface area more than 40%.
Embodiment 5
On the basis of embodiment 4, it is distinguished as: all using cross section is that rectangular seed crystal mutually splices laying inculating crystal layer, during splicing, making the long limit conllinear of each rectangle seed crystal cross section or be parallel to each other, above-mentioned each rectangle seed crystal cross section is positioned in same inculating crystal layer cross section.
Embodiment 6
On the basis of embodiment 1, being distinguished as: when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 5～20mm, and long edge lengths is 20～90mm, and the ratio of bond length and long edge lengths is less than or equal to 1/4；It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and grating projectin's length of thin-and-long crystal grain cross-section is controlled 5～20mm, vertical gate line projection length controls 20～90mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/4；The gross area of thin-and-long crystal grain cross-section is accounted for the Ratio control of silicon chip surface area more than 40%.
Embodiment 7
On the basis of embodiment 6, it is distinguished as: all using cross section is that rectangular seed crystal mutually splices laying inculating crystal layer, during splicing, making the long limit conllinear of each rectangle seed crystal cross section or be parallel to each other, above-mentioned each rectangle seed crystal cross section is positioned in same inculating crystal layer cross section.
Embodiment 8
On the basis of embodiment 1, being distinguished as: when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 5～15mm, and long edge lengths is 25～80mm, and the ratio of bond length and long edge lengths is less than or equal to 1/5；It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and grating projectin's length of thin-and-long crystal grain cross-section is controlled 5～15mm, vertical gate line projection length controls 25～80mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/5；The gross area of thin-and-long crystal grain cross-section is accounted for the Ratio control of silicon chip surface area more than 40%.
Embodiment 9
On the basis of embodiment 8, it is distinguished as: all using cross section is that rectangular seed crystal mutually splices laying inculating crystal layer, during splicing, making the long limit conllinear of each rectangle seed crystal cross section or be parallel to each other, above-mentioned each rectangle seed crystal cross section is positioned in same inculating crystal layer cross section.
Claims (6)
1. the manufacture method of polycrystalline silicon battery plate, comprises the steps:
1) using seed crystal to lay inculating crystal layer, inculating crystal layer induced growth directional solidification prepares polycrystal silicon ingot；Crystal grain in described polycrystal silicon ingot is formed by the seed crystal induced growth in inculating crystal layer；
2) by above-mentioned polycrystal silicon ingot first perpendicular cut after the most crosscutting, make polysilicon chip；Described polysilicon chip surface includes the crystal grain cross-section that polycrystal silicon ingot crystal grain is formed when crosscutting；
3) some thin grid of the silver being parallel to each other are printed on above-mentioned polysilicon chip surface by battery grid line printing process；
Above-mentioned polysilicon chip surface is the surface that polycrystal silicon ingot is formed when crosscutting；
It is characterized in that,
When inculating crystal layer is laid, all or part of use cross section is the seed crystal of thin-and-long, is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section；
Grating projectin's length of above-mentioned thin-and-long crystal grain cross-section being controlled 2～20mm, vertical gate line projection length controls
4～156mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/2；The gross area of thin-and-long crystal grain cross-section is accounted for the Ratio control of silicon chip surface area more than 40%；
Above-mentioned grating projectin a length of thin-and-long crystal grain cross-section projected length on the thin grid of silver, vertical gate line projection a length of thin-and-long crystal grain cross-section projected length in silver thin grid vertical direction.
The manufacture method of polycrystalline silicon battery plate the most according to claim 1, it is characterised in that when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 2～20mm, and long edge lengths is 4～156mm, and the ratio of bond length and long edge lengths is less than or equal to 1/2;
It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and grating projectin's length of thin-and-long crystal grain cross-section is controlled 2～20mm, vertical gate line projection length controls 4～156mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/2.
The manufacture method of polycrystalline silicon battery plate the most according to claim 1, it is characterised in that when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 4～20mm, and long edge lengths is 12～100mm, and the ratio of bond length and long edge lengths is less than or equal to 1/3；
It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and by grating projectin's length control of thin-and-long crystal grain cross-section
System is 4～20mm, and vertical gate line projection length controls 12～100mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/3.
The manufacture method of polycrystalline silicon battery plate the most according to claim 1, it is characterised in that when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 5～20mm, and long edge lengths is 20～90mm, and the ratio of bond length and long edge lengths is less than or equal to 1/4；
It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and grating projectin's length of thin-and-long crystal grain cross-section is controlled 5～20mm, vertical gate line projection length controls 20～90mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/4.
The manufacture method of polycrystalline silicon battery plate the most according to claim 1, it is characterised in that when inculating crystal layer is laid, all or part of use cross section is rectangular seed crystal；Described rectangle seed crystal cross section, its bond length is 5～15mm, and long edge lengths is 25～80mm, and the ratio of bond length and long edge lengths is less than or equal to 1/5；
It is used for growing the crystal grain that can produce thin-and-long crystal grain cross-section, and grating projectin's length of thin-and-long crystal grain cross-section is controlled 5～15mm, vertical gate line projection length controls 25～80mm, and the Ratio control of grating projectin's length and vertical gate line projection length is less than or equal to 1/5.
6. according to the manufacture method of the polycrystalline silicon battery plate described in claim 2,3,4 or 5, it is characterized in that, using cross section is that rectangular seed crystal mutually splices laying inculating crystal layer, during splicing, making the long limit conllinear of each rectangle seed crystal cross section or be parallel to each other, above-mentioned each rectangle seed crystal cross section is positioned in same inculating crystal layer cross section.
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| CN201410758121.2A CN104465876B (en) | 2014-12-12 | 2014-12-12 | The manufacture method of polycrystalline silicon battery plate |
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| CN201410758121.2A CN104465876B (en) | 2014-12-12 | 2014-12-12 | The manufacture method of polycrystalline silicon battery plate |
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| CN107825606A (en) * | 2017-09-28 | 2018-03-23 | 江苏协鑫硅材料科技发展有限公司 | Polysilicon chip and preparation method thereof |
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| CN110085517A (en) * | 2019-04-02 | 2019-08-02 | 江苏华恒新能源有限公司 | A kind of rectangle polysilicon solar battery slice processing method of the non-equidimension of length and width |
| CN111624460B (en) * | 2020-06-28 | 2022-10-21 | 西安奕斯伟材料科技有限公司 | Method for detecting defect distribution area of monocrystalline silicon |
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| CN102337582A (en) * | 2010-07-14 | 2012-02-01 | 中美硅晶制品股份有限公司 | Method for manufacturing silicon crystal ingot |
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| JP2004014958A (en) * | 2002-06-11 | 2004-01-15 | Fuji Electric Holdings Co Ltd | Thin film polycrystalline solar cell and manufacturing method therefor |
| CN202159673U (en) * | 2011-08-10 | 2012-03-07 | 温州索乐新能源科技有限公司 | Novel solar polysilicon chip |
| CN103358407B (en) * | 2011-12-31 | 2016-04-06 | 英利能源（中国）有限公司 | A kind of production method of polysilicon chip |
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