CN104347613B - Has the chip of electrostatic discharge protection - Google Patents
Has the chip of electrostatic discharge protection Download PDFInfo
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- CN104347613B CN104347613B CN201310346737.4A CN201310346737A CN104347613B CN 104347613 B CN104347613 B CN 104347613B CN 201310346737 A CN201310346737 A CN 201310346737A CN 104347613 B CN104347613 B CN 104347613B
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- electrically connected
- control end
- electrostatic discharge
- power track
- chip
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Abstract
A kind of chip for having electrostatic discharge protection, it includes two power tracks, a pin, a p-type fin formula field effect transistor, a N-type fin formula field effect transistor, two fin resistance, two diodes and a static discharge unit.Above-mentioned pin is sequentially electrically connected with a wherein power track by a wherein fin resistance and p-type fin formula field effect transistor, and is sequentially electrically connected with another power track by another fin resistance and N-type fin formula field effect transistor.The control end of above-mentioned two fin formula field effect transistors is all to receive transmission signal.Above-mentioned two power tracks are electrically connected also through above-mentioned two diodes in above-mentioned pin.In addition, static discharge unit is electrically connected between above-mentioned two power tracks to form an electrostatic discharging path.
Description
Technical field
The invention relates to a kind of chip, in particular to a kind of chip for having electrostatic discharge protection.
Background technology
With the progress for developing with rapid changepl. never-ending changes and improvements and manufacture of semiconductor technology of science and technology, the chi of the electronic component of chip internal
Very little micro to only tens of nms, therefore can not expected burst voltage or electric current all may be trickle to these sizes electronics member
Part causes damage, and for example static discharge (ElectroStatic Discharge, ESD) just may be by the external pins of chip
(Pins) import and the electronic component of chip internal is caused damage.
In this case, the electrostatic discharges for how protecting the electronic component of chip internal not happened suddenly, become
The important topic faced needed for each chip design vendors.
The content of the invention
The present invention provides a kind of chip for having electrostatic discharge protection, and it includes the first power track, second source
Path, pin, p-type fin formula field effect transistor, the first fin resistance, N-type fin formula field effect transistor, the second fin resistance,
First diode, the second diode and static discharge unit.First power track is for electrically connecting to supply voltage, and second
Power track is for electrically connecting to reference potential.P-type fin formula field effect transistor has first end, the second end and control end, and P
First end the first power track of electric connection of type fin formula field effect transistor, and the control end of p-type fin formula field effect transistor
To receive transmission signal.First fin resistance has first end, the second end and control end, and the first end of the first fin resistance
The second end of p-type fin formula field effect transistor is all electrically connected with control end, and the second end of the first fin resistance is electrically connected with
Above-mentioned pin.N-type fin formula field effect transistor has first end, the second end and a control end, and N-type fin formula field effect transistor
Second end is electrically connected with second source path, and the control end of N-type fin formula field effect transistor is to receive said transmission signal.
Second fin resistance has first end, the second end and control end, and the second end of the second fin resistance all electrically connects with control end
The first end of N-type fin formula field effect transistor is connect, and the first end of the second fin resistance is electrically connected with above-mentioned pin.One or two pole
The anode of pipe is electrically connected with above-mentioned pin, and its negative electrode is then electrically connected with the first power track.The anode of second diode is electrical
Second source path is connected, and its negative electrode is then electrically connected with above-mentioned pin.As for static discharge unit, it is electrically connected at first
Between power track and second source path, to provide the static discharge between the first power track and second source path
Path.
The present invention is provided with the pin of chip by two fin resistance, two diodes and a static discharge unit
The electrostatic discharge protective circuit constituted, therefore electrostatic discharging path can be provided when electrostatic discharge event occurs for pin, it is to avoid chip
Internal main circuit is destroyed by static discharge.Further, since the meeting when electrostatic discharge event occurs for pin of fin resistance
High impedance is presented, therefore the transmission that is made up of p-type fin formula field effect transistor and N-type fin formula field effect transistor can be avoided
The output buffer of signal is also destroyed by static discharge.
Brief description of the drawings
Fig. 1 represents an embodiment of the chip of the tool electrostatic discharge protection of the present invention；
Fig. 2 is the schematic perspective view for illustrating N-type fin resistance；
Fig. 3 is the diagrammatic cross-section for illustrating the N-type fin resistance that high impedance status is presented；
Fig. 4 is the diagrammatic cross-section for illustrating the N-type fin resistance that low impedance state is presented；
Fig. 5 represents another embodiment of the chip of the tool electrostatic discharge protection of the present invention.
[label declaration]
200、400：Chip 201,202：Power track
21：P-type fin formula field effect transistor 22：N-type fin formula field effect transistor
23、24：Fin resistance 300：N-type fin resistance
25、26：Diode 27：Pin
28、410：Static discharge unit 28-1,412：N-type transistor
28-2：Parasitic bipolarity junction transistor
211、221、231、241、281、304、413：First end
212、222、232、242、282、306、414：Second end
213、223、233、243、283、302：Control end
308、312：N-type high-doped zone 310：N-type doped regions
314：Insulating barrier 316：Matrix
416：Electrostatic discharge testing circuit IN：Transmit signal
VDD：Supply voltage VSS：Reference potential
Embodiment
Fig. 1 is the chip for illustrating a kind of tool electrostatic discharge protection according to one embodiment of the invention.As shown in figure 1,
This chip 200 includes power track 201, power track 202, pin 27, p-type fin formula field effect transistor 21, fin resistance
23rd, N-type fin formula field effect transistor 22, fin resistance 24, diode 25, diode 26 and static discharge unit 28.Power supply
Path 201 is for electrically connecting to supply voltage VDD, and power track 202 is for electrically connecting to reference potential VSS.P-type fin
Effect transistor 21 has first end 211, the second end 212 and control end 213, and the first of p-type fin formula field effect transistor 21
End 211 is electrically connected with power track 201, and the control end 213 of p-type fin formula field effect transistor 21 is to receive transmission signal
IN.Fin resistance 23 has first end 231, the second end 232 and control end 233, and first end 231 and the control of fin resistance 23
End 233 is all electrically connected with the second end 212 of p-type fin formula field effect transistor 21, and the second end 232 of fin resistance 23 electrically connects
Pin 27.Explanation about fin resistance will be described in detail in rear.
N-type fin formula field effect transistor 22 has first end 221, the second end 222 and control end 223, and N-type fin effect
The second end 222 of transistor 22 is answered to be electrically connected with power track 202, and the control end 223 of N-type fin formula field effect transistor 22 is used
To receive transmission signal IN.Fin resistance 24 has first end 241, the second end 242 and a control end 243, and fin resistance 24
Second end 242 is all electrically connected with the first end 221 of N-type fin formula field effect transistor 22 with control end 243, and fin resistance 24
First end 241 is electrically connected with pin 27.The anode of diode 25 is electrically connected with pin 27, and its negative electrode is electrically connected with power track
201.The anode of diode 26 is electrically connected with power track 202, and its negative electrode is electrically connected with pin 27.The electricity of static discharge unit 28
Property is connected between power track 201 and 202, to provide the electrostatic discharging path between power track 201 and 202.
In this embodiment, static discharge unit 28 is realized with a N-type transistor 28-1.This N-type transistor 28-1 has first end
281st, the second end 282 and control end 283, and the transistor 28-1 electric connection power track 201 of first end 281, and transistor
28-1 the second end 282 is all electrically connected with power track 202 with control end 283.In addition, in this instance, fin resistance 23 and 24
All realized with a N-type fin resistance, illustrate it with Fig. 2~4.
Fig. 2 is the schematic perspective view for illustrating N-type fin resistance；Fig. 3 is to illustrate the N-type fin resistance that high impedance status is presented
Diagrammatic cross-section；And Fig. 4 is the diagrammatic cross-section for illustrating the N-type fin resistance that low impedance state is presented.In Fig. 2~4, mark
Show the 300 N-type fin resistance i.e. described in expression.In addition, in Fig. 3 and 4, sign 302 represents the control of N-type fin resistance 300
Hold (i.e. grid), sign 304 represents the first end (i.e. a wherein source/drain) of N-type fin resistance 300, sign 306 represents N-type
The second end (i.e. another source/drain) of fin resistance 300, sign 308 and 312 is all expressed as N-type high-doped zone, indicates 310 tables
N-type doped regions are shown as, sign 314 represents insulating barrier, and indicates 316 and be expressed as matrix.When the grid of N-type fin resistance 300
When voltage is much smaller than drain voltage, then the high impedance status shown in Fig. 3 will be presented in N-type fin resistance 300；When N-type fin
When the grid voltage of resistance 300 is close with the voltage swing of drain voltage, then N-type fin resistance 300 will be presented shown in Fig. 4
Low impedance state.
Referring again to Fig. 1, when electrostatic discharge event occurs for pin 27, the voltage meeting at the second end 232 of fin resistance 23
Much larger than the voltage of first end 231 and the control end 233 of fin resistance 23, therefore the now shape of the second end 232 of fin resistance 23
Into drain electrode and fin resistance 23 can show high impedance status.Similarly, when static discharge occurs for pin 27, fin resistance 24
First end 241 voltage can be much larger than fin resistance 24 the second end 242 and the voltage of control end 243, therefore now fin
The formation of first end 241 of resistance 24 is drained and fin resistance 24 can also show high impedance status.Simultaneously, put as electrostatic
The N-type transistor 28-1 of electric unit 28 can then trigger the parasitic bipolarity junction transistor of its transistor internal by static discharge
(bipolar junction transistor, BJT) 28-2 is turned on, and is put with forming the electrostatic between power track 201 and 202
Power path.
Consequently, it is possible to just can be sequentially via power track 201 and N-type transistor by the incoming static discharge current of pin 27
28-1 and conduct to power track 202.Further, since from the incoming static discharge current of pin 27 can by fin resistance 23 with
24 suppression, therefore p-type fin formula field effect transistor 21, N-type fin formula field effect transistor 22 can be avoided with providing transmission letter
Number IN front-end circuit (i.e. the core circuit of chip 200, is not indicated) is damaged by static discharge.In addition, in pin 27 not
Generation electrostatic discharge event, and during transmission signal IN presentation high level (high), N-type fin formula field effect transistor 22 can be turned on,
And the voltage of the first end 241 in suspension joint (floating) state in fin resistance 24 can be pulled to and the second end 242
Voltage is close, so that low impedance state is presented in fin resistance 24.Consequently, it is possible to which the transmission signal IN that high level is presented can
Normally it is sent to pin 27.Conversely, electrostatic discharge event does not occur in pin 27, and low level is presented in transmission signal IN
(low) when, p-type fin formula field effect transistor 21 can be turned on, and the second end 232 in floating in fin resistance 23
Voltage can be pulled to it is close with the voltage of first end 231 so that fin resistance 23 present low impedance state.Consequently, it is possible to
Low level transmission signal IN, which is presented, also can normally be sent to pin 27.
Although in the above description, fin resistance 23 is all realized with 24 using a N-type fin resistance, so this and be not used to
The limitation present invention, in fact, fin resistance 23 also can be realized all with 24 using a p-type fin resistance.The behaviour of p-type fin resistance
Make principle similar to the operating principle of N-type fin resistance, and the electric connection mode between other components is identical, herein just not
Repeat again.In addition, static discharge unit 28 can also be realized using a P-type transistor, the only control end of this P-type transistor
Electrotropism connect power track 201, and the electric connection mode of remaining pin of this P-type transistor then with foregoing N-type transistor
28-1 first end 281 is identical with the electric connection mode at the second end 282.
Fig. 5 is the chip for illustrating a kind of tool electrostatic discharge protection according to another embodiment of the present invention.In Figure 5,
Sign person identical with the sign in Fig. 1 is expressed as identical object or signal.Chip 400 and foregoing chip 200 shown in Fig. 5
Difference is in the static discharge unit 410 of chip 400 is by N-type transistor 412 and 416 groups of electrostatic discharge testing circuit
Into.Power track 201 and 202 is electrically connected in the end 414 of first end 413 and second of N-type transistor 412.Static discharge is examined
The input of slowdown monitoring circuit 416 is electrically connected with power track 201, and output end is then electrically connected with the control end 415 of N-type transistor 412.
And this electrostatic discharge testing circuit 416 is used to the voltage change according to power track 201 and detects whether pin 27 occurs electrostatic
Electric discharge event, and decide whether that provide enable signal opens N-type transistor to the control end 415 of N-type transistor 412 according to this
412.Certainly, N-type transistor 412 also can be replaced directly with a P-type transistor, and the electricity of each pin of this P-type transistor
Property connected mode is identical with the electric connection mode of each pin of N-type transistor 412.
In summary, the present invention is to be provided with quiet by two fin resistance, two diodes and one at the pin of chip
The electrostatic discharge protective circuit that discharge of electricity unit is constituted, therefore static discharge road can be provided when electrostatic discharge event occurs for pin
Footpath, it is to avoid the main circuit of chip internal is destroyed by static discharge.Put further, since in pin electrostatic occurs for fin resistance
High impedance can be presented during electric event, therefore can avoid by p-type fin formula field effect transistor and N-type fin formula field effect transistor institute
The output buffer of the transmission signal of composition is also destroyed by static discharge.
Although the present invention is disclosed above with preferred embodiment, so it is not limited to the present invention, any this area skill
Art personnel, without departing from the spirit and scope of the present invention, when can make a little change and retouching, therefore the protection model of the present invention
Enclose to work as and be defined depending on the scope of the appended claims person of defining.
Claims (7)
1. a kind of chip for having electrostatic discharge protection, it includes：
One first power track, is for electrically connecting to a supply voltage；
One second source path, is for electrically connecting to a reference potential；
One pin；
One p-type fin formula field effect transistor, with a first end, one second end and one first control end, the first end electrically connects
First power track is connect, and first control end is to receive a transmission signal；
One first fin resistance, with one the 3rd end, one the 4th end and one second control end, the 3rd end and second control end
Second end is all electrically connected with, and the 4th end is electrically connected with the pin；
One N-type fin formula field effect transistor, with one the 5th end, one the 6th end and one the 3rd control end, the 6th end electrically connects
The second source path is connect, and the 3rd control end is to receive the transmission signal；
One second fin resistance, with one the 7th end, one the 8th end and one the 4th control end, the 8th end and the 4th control end
The 5th end is all electrically connected with, and the 7th end is electrically connected with the pin；
One first diode, its anode is electrically connected with the pin, and its negative electrode is electrically connected with first power track；
One second diode, its anode is electrically connected with the second source path, and its negative electrode is electrically connected with the pin；And
One static discharge unit, is electrically connected between first power track and the second source path, to provide this
An electrostatic discharging path between one power track and the second source path.
2. it is according to claim 1 tool electrostatic discharge protection chip, wherein the first fin resistance with this second
Fin resistance is all a N-type fin resistance.
3. it is according to claim 1 tool electrostatic discharge protection chip, wherein the first fin resistance with this second
Fin resistance is all a p-type fin resistance.
4. the chip of tool electrostatic discharge protection according to claim 1, wherein static discharge unit includes：
One N-type transistor, with one the 9th end, 1 the tenth end and one the 5th control end, the 9th end is electrically connected with first electricity
Source path, and the tenth end is all electrically connected with the second source path with the 5th control end.
5. the chip of tool electrostatic discharge protection according to claim 1, wherein static discharge unit includes：
One P-type transistor, with one the 9th end, 1 the tenth end and one the 5th control end, the 9th end and the 5th control end are all
First power track is electrically connected with, and the tenth end is electrically connected with the second source path.
6. the chip of tool electrostatic discharge protection according to claim 1, wherein static discharge unit includes：
One N-type transistor, with one the 9th end, 1 the tenth end and one the 5th control end, the 9th end is electrically connected with first electricity
Source path, and the electrical second source path in the tenth end；And
One electrostatic discharge testing circuit, is electrically connected between first power track and the 5th control end, should to foundation
The voltage change of first power track and detect whether occur an electrostatic discharge event, and according to this decide whether provide an enable letter
Number open the N-type transistor to the 5th control end.
7. the chip of tool electrostatic discharge protection according to claim 1, wherein static discharge unit includes：
One P-type transistor, with one the 9th end, 1 the tenth end and one the 5th control end, the 9th end is electrically connected with first electricity
Source path, and the electrical second source path in the tenth end；And
One electrostatic discharge testing circuit, is electrically connected between first power track and the 5th control end, should to foundation
The voltage change of first power track and detect whether occur an electrostatic discharge event, and according to this decide whether provide an enable letter
Number open the P-type transistor to the 5th control end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310346737.4A CN104347613B (en) | 2013-08-09 | 2013-08-09 | Has the chip of electrostatic discharge protection |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310346737.4A CN104347613B (en) | 2013-08-09 | 2013-08-09 | Has the chip of electrostatic discharge protection |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104347613A CN104347613A (en) | 2015-02-11 |
| CN104347613B true CN104347613B (en) | 2017-07-14 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201310346737.4A Active CN104347613B (en) | 2013-08-09 | 2013-08-09 | Has the chip of electrostatic discharge protection |
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| WO2007145307A1 (en) * | 2006-06-15 | 2007-12-21 | Renesas Technology Corp. | Semiconductor integrated circuit device |
| CN101286509A (en) * | 2007-04-12 | 2008-10-15 | 恩益禧电子股份有限公司 | Electrostatic protection circuit |
| CN101421896A (en) * | 2006-04-21 | 2009-04-29 | 沙诺夫公司 | ESD clamp control by detection of power state |
| TWI337376B (en) * | 2005-08-19 | 2011-02-11 | Infineon Technologies Ag | Gate-gesteuertes fin-widerstandselement zur verwendung als esd-schutzelement in einem elektrischen schaltkreis und einrichtung zum schutz vor elektrostatischen entladungen in einem elektrischen schaltkreis |
| JP2011096897A (en) * | 2009-10-30 | 2011-05-12 | Renesas Electronics Corp | Semiconductor device, and electronic apparatus |
| CN102662426A (en) * | 2012-05-07 | 2012-09-12 | 中国航天科技集团公司第九研究院第七七一研究所 | Output driving circuit with self electrostatic discharge (ESD) protection function |
| CN102693978A (en) * | 2011-03-25 | 2012-09-26 | 瑞昱半导体股份有限公司 | Electrostatic discharge protection circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9048096B2 (en) * | 2007-08-24 | 2015-06-02 | Infineon Technologies Ag | Diode-based ESD concept for DEMOS protection |
-
2013
- 2013-08-09 CN CN201310346737.4A patent/CN104347613B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI337376B (en) * | 2005-08-19 | 2011-02-11 | Infineon Technologies Ag | Gate-gesteuertes fin-widerstandselement zur verwendung als esd-schutzelement in einem elektrischen schaltkreis und einrichtung zum schutz vor elektrostatischen entladungen in einem elektrischen schaltkreis |
| CN101421896A (en) * | 2006-04-21 | 2009-04-29 | 沙诺夫公司 | ESD clamp control by detection of power state |
| WO2007145307A1 (en) * | 2006-06-15 | 2007-12-21 | Renesas Technology Corp. | Semiconductor integrated circuit device |
| CN101286509A (en) * | 2007-04-12 | 2008-10-15 | 恩益禧电子股份有限公司 | Electrostatic protection circuit |
| JP2011096897A (en) * | 2009-10-30 | 2011-05-12 | Renesas Electronics Corp | Semiconductor device, and electronic apparatus |
| CN102693978A (en) * | 2011-03-25 | 2012-09-26 | 瑞昱半导体股份有限公司 | Electrostatic discharge protection circuit |
| CN102662426A (en) * | 2012-05-07 | 2012-09-12 | 中国航天科技集团公司第九研究院第七七一研究所 | Output driving circuit with self electrostatic discharge (ESD) protection function |
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| CN104347613A (en) | 2015-02-11 |
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