CN104298174B - Method for detecting and comparing tracks on basis of PCIe - Google Patents

Method for detecting and comparing tracks on basis of PCIe Download PDF

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Publication number
CN104298174B
CN104298174B CN201410502309.0A CN201410502309A CN104298174B CN 104298174 B CN104298174 B CN 104298174B CN 201410502309 A CN201410502309 A CN 201410502309A CN 104298174 B CN104298174 B CN 104298174B
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data
fpga
velocity
pcie
time value
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CN104298174A (en
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邹爽
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LEETRO AUTOMATION CO Ltd
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LEETRO AUTOMATION CO Ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/18Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form
    • G05B19/414Structure of the control system, e.g. common controller or multiprocessor systems, interface to servo, programmable interface controller

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  • Human Computer Interaction (AREA)
  • Manufacturing & Machinery (AREA)
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Abstract

The invention discloses a method for detecting and comparing tracks on the basis of PCIe. The method relates to an FPGA, an optical coupling isolation circuit, a PCIE interface and a power supply. The optical coupling isolation circuit inputs data signals into the FPGA. The PCIE interface is connected to the FPGA. The power supply is connected to the FPGA. The method comprises the steps that the FPGA directly collects actual output signals of motion board cards in a moving process and stores the signals in an FIFO opened up in the FPGA; the FPGA uploads the collected actual output signals to a memory of a host computer through the PCIE interface; errors are determined; comparison and correction are carried out, and finally sample data are identical with original data through repeated modification, operation and check, and a successive approach process. The speed fitted curve of the actual output is obtained through sampling on the actual output of the motion board cards and processing on sampling data, quantitative analysis is carried out on the fitted curve and a speed mode requested by a user, and whether a jumping phenomenon exists or not can be checked out conveniently, and the user is reminded to correct loopholes in an algorithm.

Description

The method that track detecting based on pcie is compared
Technical field
The present invention relates to automatic control technology field, specifically, it is the method that the track detecting based on pcie is compared.
Background technology
Output " process data " after treated device is processed for movement locus in control system at present is directly carried out to workpiece Processing, because handled track in actual condition is various, may saltus step, shadow because of unkownable factors in machining locus Ring processing effect, cause waste product.
In addition middle and high end general controls card basic framework is realized for dsp+fpga mode on the market at present, and dsp is responsible for processing The parsing of pattern and speed planning, fpga is responsible for for the exercise data of dsp being converted into actual pulse output.Due to digital signal Process error and each wiring board difference, the ideal curve error that the pulse wave frequency of reality output is set can be caused with user Too big, namely user sets process velocity there is any discrepancy, especially in variable motion, due to data prediction calculation error, meeting Lead to acceleration and speed flex point in motor process that saltus step occurs, be reacted to final driving and can produce punching in motor process Hit, affect processing effect.
Collect " process data " frequently with machining locus detecting system before reality is to work pieces process at present, judge whether Existing saltus step, it is to avoid directly examination processing causes to waste on workpiece, but the machining locus detecting system that prior art is used is to adopt Read related data with special setting equipment from control card, need special external inspection equipment, carried out by oscillograph Inspection, needs to differentiate the quality of operation curve by human eye, accuracy is not high.
Content of the invention
It is an object of the invention to provide the method that the track detecting based on pcie is compared, by the reality to motion board Output is sampled, and sampled data is processed, and obtains the velocity fitting curve of reality output, by same for this matched curve user The velocity mode requiring carries out quantitative analysiss and whether there is " saltus step " phenomenon in that context it may be convenient to check, reminds user to revise and calculates Leak in method or other problemses.
The present invention is achieved through the following technical solutions: the motion control card that the track detecting based on pcie is compared, including Fpga, optical coupling isolation circuit, pcie interface and power supply, described optical coupling isolation circuit is by the data signal of motion board to be tested Inputted by the way of optical coupling isolation input in fpga, described pcie interface connects fpga, described power supply connects fpga.
Further, to better implement the present invention, also include display lamp, described display lamp connects fpga.
Further, to better implement the present invention, it is provided with input filter circuit, pulse collection electricity in described fpga Road, data storage, data interaction circuit, ram, described optical coupling isolation circuit connects input filter circuit, described input filter Circuit connects pulse acquisition circuit, and described pulse acquisition circuit connects data storage data respectively and interacts circuit, described ram Connect data storage data respectively and interact circuit, described data interaction circuit connects pcie interface.
Further, to better implement the present invention, the master chip of described fpga adopts xc6slx45t.
Based on the track detecting system of pcie, the motion control card comparing including the track detecting based on pcie, main frame, fortune Dynamic board and initial data source, described main frame interacts circuit by pcie interfacing data, and described motion board connects respectively Connect main frame, described motion board passes through optical coupling isolation circuit by output pulse input to be tested in fpga, in described main frame It is loaded with data collecting system, data conversion system, data simulation system data analysis system, described initial data source will Initial data is loaded in main frame.
The method that track detecting based on pcie is compared, comprises the following steps:
Step a, fpga directly gathers real output signal in motion board motor process, is stored in and opens up inside fpga Fifo in;
The real output signal that step a is gathered is uploaded to master by the pcie bus that step b, fpga is passed through on pcie interface Machine internal memory;
Step c, in the data conversion system in main frame, the data that will be stored in host memory is converted to collecting sample Velocity-time value table, and by the initial data Practical Calculation that it is provided that initial data is originated go out complete operation speed-when Between be worth table, the Velocity-time value table of collecting sample is with the data acquisition system in main frame for the Velocity-time value table of complete operation Carry out contrast in system, data conversion system, data simulation system, data analysis system and determine error;
Step d, determine error after readjust the speed of motion board, and repeat step a, step b, step c, adopted Sample contrasts and revises, by multiple modification computing and check, the process of Approach by inchmeal, be finally reached sampled notebook data with original Data is identical, strongly reduces error it is ensured that motion board perfection runs.
Further, methods described to better implement the present invention, comprises the following steps:
1), fpga directly gathers the pulsewidth of reality output pulse and cycle parameter in motion board motor process, is stored in Open up in the fifo within fpga;
2), the pulsewidth gathering in motor process and cycle data are uploaded to by fpga by the pcie bus on pcie interface Host memory;
3), in the data conversion system in main frame, the data that will be stored in host memory is converted to collecting sample Velocity-time value table, and the Velocity-time of complete operation is gone out by the initial data Practical Calculation that it is provided that initial data is originated Value table, the Velocity-time value table of collecting sample with complete operation data collecting system in main frame for the Velocity-time value table, Carry out contrast in data conversion system, data simulation system, data analysis system and determine error;
4) readjust the speed of motion board after, determining error, and repeat step 1), step 2), step 3), adopted Sample contrasts and revises, by multiple modification computing and check, the process of Approach by inchmeal, be finally reached sampled notebook data with original Data is identical, strongly reduces error it is ensured that motion board perfection runs.
Further, methods described to better implement the present invention, the realization of described step 3) specifically divides the following two kinds side Formula:
3.1), two groups of data of Velocity-time value table of the Velocity-time value table to collecting sample and complete operation are in the time Described point on axle identical point, draws out two curve movements;
3.2), pass through to contrast the velocity amplitude of initial data in synchronization motor point and the velocity amplitude size of collecting sample, In place of indicating appearance " error " after exceed set point, concrete grammar is as follows: the mistake of setting test data and benchmark data Difference limen value, on a timeline, when certain point tolerance exceedes this threshold values, marks position and the velocity information in this motor point.
Further, methods described to better implement the present invention, the realization of described step c specifically divides the following two kinds side Formula:
C.1), two groups of data of Velocity-time value table of the Velocity-time value table to collecting sample and complete operation are in the time Described point on axle identical point, draws out two curve movements;
C.2 the velocity amplitude), passing through to contrast velocity amplitude and collecting sample in the initial data in synchronization motor point is big Little, in place of indicating appearance " error " after exceed set point, concrete grammar is as follows: setting test data and benchmark data Error threshold values, on a timeline, when certain point tolerance exceedes this threshold values, mark position and the velocity information in this motor point.
The present invention compared with prior art, has advantages below and a beneficial effect:
(1) present invention, by sampling to the reality output of motion board, is processed to sampled data, obtains actual The velocity fitting curve of output, this matched curve is carried out quantitative analysiss with the velocity mode that user requires in that context it may be convenient to examine Find and whether there is " saltus step " phenomenon, remind the leak on user's correction algorithm or other problemses.
(2) motion control card that the track detecting based on pcie of the present invention is compared, is acquired data using fpga Caching process, because the high speed of fpga, high reliability are communicated with pcie, improves the track based on pcie of the present invention detecting ratio The speed of motion control card relatively and reliability.
(3) configuration circuit of the present invention, increases the number of resources of fpga chip, further thus improving data processing amount.
(4) present invention is provided that higher transmission data and quality using pcie communication.
(5) the track detecting system based on pcie of the present invention, completes the process to sampled data, obtains reality output Velocity fitting curve, this matched curve is carried out quantitative analysiss with the velocity mode that user requires;To multigroup preprocessed signal Track fitting, analysis with actual acquisition signal.
(6) method that compares of track detecting based on pcie of the present invention, using simulation process technology, automatic data collection, Conversion, analytical technology, to the track fitting of multigroup preprocessed signal and actual acquisition signal, analysis, reach and intuitively accurately judge Purpose, and the leak on automatically prompting user correction algorithm or other problemses.
Brief description
The circuit diagram of the motion control card that Fig. 1 track detecting based on pcie of the present invention is compared.
Fig. 2 is the circuit diagram of the track detecting system based on pcie of the present invention.
Fig. 3 is the track comparison diagram of arc-shaped.
Fig. 4 is linear track comparison diagram.
Fig. 5 analyzes diagram for sampling error.
Specific embodiment
The applicant identifies oneself technician in technical field and combines existing known technology, and according to present specification Content i.e. can achieve the present invention.
With reference to embodiment, the present invention is described in further detail, but embodiments of the present invention not limited to this.
Embodiment 1:
The motion control card that track detecting based on pcie is compared, as shown in Figure 1 and Figure 2, including fpga, light-coupled isolation electricity Road, pcie interface and power supply, the data signal of motion board to be tested is adopted optical coupling to isolate by described optical coupling isolation circuit The mode of input inputs in fpga, and described pcie interface connects fpga, and described power supply connects fpga.
Motion board to be tested, during being operated, forms real output signal (axle pulse input and axle side To input), real output signal carries out coupling by photoelectric isolating circuit and is input in fpga, completes filtering, number in fpga According to collection, data storage, when ram is full, produce interrupt notification pc, pc machine reads the data in ram by pcie agreement, by Pcie data signal transmission is gone out in case the later stage is processed by pcie interface by pcie data communication protocol.
Embodiment 2:
The present embodiment is to optimize further on the basis of embodiment 1, in conjunction with shown in Fig. 1, Fig. 2, including fpga, optocoupler every From circuit, pcie interface and power supply, the data signal of motion board to be tested is adopted optical coupling by described optical coupling isolation circuit The mode of isolation input inputs in fpga, and described pcie interface connects fpga, and described power supply connects fpga, also includes being connected to Display lamp on fpga, display lamp preferably employs LED lamp.
Motion board to be tested, during being operated, forms real output signal (representated by axle pulse input Axle pulse data, the direction of principal axis data of direction of principal axis input), real output signal carries out coupling by photoelectric isolating circuit and is input to In fpga, fpga carries out data storage of sampling, pass through pcie data communication protocol by pcie data by pcie interface Signal transmission is gone out in case the later stage is processed, and LED lamp is used for state instruction, at least provided with two red and green color lamps, for instruction one A little common communication states, one is power supply indicator, is green light during normal voltage, is red light, one is when over-pressed or under-voltage Pcie relay indicating light, is green light during pcie proper communication, and having abnormal is red light.
Embodiment 3:
The present embodiment is to optimize further on the basis of above-described embodiment, in conjunction with shown in Fig. 1, Fig. 2, including fpga, light Coupling isolation circuit, pcie interface and power supply, the data signal of motion board to be tested is adopted light by described optical coupling isolation circuit The mode of coupling isolation input inputs in fpga, and described pcie interface connects fpga, and described power supply connects fpga, described fpga's Master chip adopts xc6slx45t.
Motion board to be tested, during being operated, forms real output signal (representated by axle pulse input Axle pulse data, the direction of principal axis data of direction of principal axis input), real output signal carries out coupling by photoelectric isolating circuit and is input to In fpga, fpga completes filtering, data acquisition, data storage, when ram is full, produce interrupt notification pc, pc machine passes through pcie Agreement read ram in data, by pcie interface by pcie data communication protocol by pcie data signal transmission go out with The standby later stage is processed, and the master chip of described fpga adopts the xc6slx45t of xilinx company, and it has more than 40,000 logical block, Comprise 270,000 6 input look-up tables, 540,000 triggers.
Embodiment 4:
The present embodiment is to optimize further on the basis of any of the above-described embodiment, is provided with input filter in described fpga Circuit, pulse acquisition circuit, data storage, data interaction circuit, ram, described optical coupling isolation circuit connects input filter electricity Road, described input filter circuit connects pulse acquisition circuit, and described pulse acquisition circuit connects data storage data respectively Interaction circuit, described ram connects data storage data respectively and interacts circuit, and described data interaction circuit connects pcie and connects Mouthful.
When using, the real output signal of fpga collection is high level time value and the value of whole pulse period of pulse, For 32bit data, be filtered inside fpga, data acquisition, the operation such as data storage, by this two after an end-of-pulsing To internal ram, ram notifies main frame to be read out by pcie after being filled with to data storage, and this data is converted into speed by main frame Value is analyzed.
Embodiment 5:
Based on the track detecting system of pcie, the motion control card comparing including the track detecting based on pcie, main frame, fortune Dynamic board and initial data source, described main frame interacts circuit by pcie interfacing data, and described motion board connects respectively Connect main frame, described motion board passes through optical coupling isolation circuit by output pulse input to be tested in fpga, in described main frame It is loaded with data collecting system, data conversion system, data simulation system data analysis system, described initial data source will Initial data is loaded in main frame.
Real output signal (the axle umber of pulse representated by axle pulse input that motion board is sent in the course of the work According to the direction of principal axis data of direction of principal axis input), the signal being gathered based on pulsewidth and cycle data, through fpga-pcie board After (motion control card that the track detecting based on pcie is compared) acquisition process, pcie data communication is utilized to assist by pcie interface By pcie data signal transmission in main frame, in main frame, the data collecting system of main frame passes through pcie from the ram of fpga to view Read data to pc internal memory;The pulse-width data reading and high level data are converted into speed in frequency by data conversion system;Number Actual motion curve is drawn out by gathered data data according to analogue system and to draw out complete motion by original complete data bent Line;Two curves are contrasted according to certain error criterion and are marked by data analysis system;Initial data is mainly to be processed Document analysis data, speed prediction processing data, dsp write data of fpga etc., load on main frame by initial data source Interior, described Various types of data completes described point by software system in main frame, draws its trace graphics, and the reality output being gathered Class signal data also will complete described point, draw its trace graphics, and both can analyze each group of data deviation, with side after being contrasted Checking just whether there is " saltus step " phenomenon, reminds the leak on user's correction algorithm or other problemses;User is directed to certain section Certain speed flex point of speed can be again downloaded in motion board after being adjusted and again move, and analyze again, until with set Definite value is approached;Wherein main frame can be selected for the host computer using on equipment or outside compare for track detecting other Pc machine, pc machine can include pc, laptop computer.
Embodiment 6:
The method that track detecting based on pcie is compared, comprises the following steps:
Step a, fpga directly gathers real output signal in motion board motor process, is stored in and opens up inside fpga Fifo in;
The real output signal that step a is gathered is uploaded to master by the pcie bus that step b, fpga is passed through on pcie interface Machine internal memory;
Step c, in the data conversion system in main frame, the data that will be stored in host memory is converted to collecting sample Velocity-time value table, and by the initial data Practical Calculation that it is provided that initial data is originated go out complete operation speed-when Between be worth table, the Velocity-time value table of collecting sample with complete operation Velocity-time value table in main frame using being carried in main frame It is right that trajectory analysis track in interior data collecting system, data conversion system, data simulation system, data analysis system is carried out Ratio determines error (i.e. the speed difference of the rate curve corresponding point that sample speed and the complete speed of service are formed);
Step d, determine error after readjust the speed of motion board, and repeat step a, step b, step c, adopted Sample contrasts and revises, by multiple modification computing and check, the process of Approach by inchmeal, be finally reached sampled notebook data with original Data is identical, strongly reduces error it is ensured that motion board perfection runs.
Sample frequency and sampling precision:
As shown in figure 5, when the highest frequency that the motion control card comparing is detected in the track based on pcie is 2mhz, sampling letter Number according to controller pulse frequency limit 2mhz be target, under this frequency, error temporarily orientates 10% as, goes to adopt with 40m frequency f1 2m frequency f2, a point rising edge is adopted as low level, but actually becomes high level afterwards at once, but this high level only arrives c point Really recorded, this can be made with the cycle time of high level few 40m than actual value sampling, equally in b point not accounting Number high level, can make high level count value than an actual value few 40m cycle again, when the error under extreme case is this two The clock cycle, i.e. 2 * 1/40m=0.05us.
Data storage and sampling by several times after sampling:
Data after sampling represents high level or the lasting sampling period count value of low level with tl;
If sample frequency is 40mhz, then under 2mhz pulse frequency, the pulse of 2m of sampling is gone with the frequency of 40m, each At 40m rising edge clock, judge that then count value adds 1 to 2m for high level, so, when the dutycycle of 2m pulse is 50%, i.e. high electricity Put down as 250ns, low level 250ns, and the 40m cycle is 25ns, so altogether needs to count 250/ in the high level time of 1 2m 25=10 time, 10 is this tl value, and computing formula is tl=sample frequency/(being sampled frequency * 2);
If pulse frequency is reduced to 100k, tl=40m/200k=200;
If pulse frequency is reduced to 1hz, tl=40m/2=20,000,000;
Preserve this time value with 32 data storage;
When having gathered number data storage simultaneously of a 2m pulsewidth postscript, this data is two 32bit, and one is high electricity Flat duration value, the total periodic quantity in position, therefore data volume treats measured frequency (mb/s)=2* for 2*4/ (1/ treats measured frequency)=8* 4byte/ (1/2m)= 16mb/s;
If reality processing average pulse frequency is 200k, average data transfer rate is 200*2*4=1.6mb/s;1 minute Data volume be: 1.6mb/s*60s=96mb;Message transmission rate is 8 * 200k=1.6mb/s;
In actual applications, the data volume of 1 minute can meet us and analyzes the needs of track and speed, and for exceeding The processed file of 1 minute, we carry out sampling analyses at segmentation;
Even processed file is 2 minutes, the service data of the 1st minute of storage sampling for the first time;Second point of second sampling The service data of clock;The dsp setting of the sampling time of fpga and motion time started and motion board is synchronous;
Fpga opens up the data volume of 10kb, according to the meansigma methodss of 1.6mb/s, the data of storage 6.25ms coexists, current control Under card hardware condition, the cycle of software twi-read is less than 1ms.If the counting-rate meter pressing peak value 2mhz calculates data volume, 16mb/ S, coexists the data of storage 0.625ms, and software read cycle is less than 500us;Software by read data conversion storage in internal memory, by 1 Minute data amount 96mb, current main frame is that it is opened up and saves as 128m in reserved, can store the data volume of lower 1 minute;Pulse Frequency reaches 400k, can preserve at least data of 30s.
Embodiment 7:
The present embodiment is to optimize further on the basis of above-described embodiment, comprises the following steps:
1), fpga directly gathers the pulsewidth of reality output pulse and cycle parameter in motion board motor process, is stored in Open up in the fifo within fpga;
2), the pulsewidth gathering in motor process and cycle data are uploaded to by fpga by the pcie bus on pcie interface Host memory;
3), in the data conversion system in main frame, the data that will be stored in host memory is converted to collecting sample Velocity-time value table, and the Velocity-time of complete operation is gone out by the initial data Practical Calculation that it is provided that initial data is originated Value table, the Velocity-time value table of collecting sample with complete operation Velocity-time value table in main frame using being carried in main frame Data collecting system, data conversion system, data simulation system, the trajectory analysis track in data analysis system contrasted Determine error;
4) readjust the speed of motion board after, determining error, and repeat step 1), step 2), step 3), adopted Sample contrasts and revises, and is changed computing and is checked, the process of Approach by inchmeal by multiple, the actual speed of motion at identical time value Degree and the velocity error of complete rate curve corresponding point in a critical field (+/- 10% can adjust as needed), finally Reach sampled notebook data identical with initial data, strongly reduce error it is ensured that motion board perfection runs.
Embodiment 8:
The present embodiment is to optimize further on the basis of above-described embodiment, concrete point following two of the realization of described step 3) The mode of kind:
3.1), two groups of data of Velocity-time value table of the Velocity-time value table to collecting sample and complete operation are in the time Described point on axle identical point, draws out two curve movements, reaches in place of error in intuitive judgment;
3.2), pass through to contrast the velocity amplitude of initial data in synchronization motor point and the velocity amplitude size of collecting sample, When the poor set point that outpaces (speed difference on the speed of matching time point corresponding with complete rate curve after collection) refers to afterwards In place of illustrating " error ", concrete grammar is as follows: the error threshold values of setting test data and benchmark data, on a timeline, When certain point tolerance exceedes this threshold values, mark position and the velocity information in this motor point (movement velocity on corresponding time point).
If Fig. 3 is shown in linear track comparison diagram for the track comparison diagram of arc-shaped, Fig. 4, contrast track (original number According to track) difference and racing track (sampled data track) between, i.e. error threshold values between sampled data and initial data δ s, when δ s indicates more than setting value (setting value is the 10% of complete value, can adjust as needed), represents and moves herein Error in data is excessive, with to be adjusted.
Embodiment 9:
The present embodiment is to optimize further on the basis of embodiment 6, and the realization of described step c specifically divides the following two kinds side Formula:
C.1), two groups of data of Velocity-time value table of the Velocity-time value table to collecting sample and complete operation are in the time Described point on axle identical point, draws out two curve movements, reaches in place of error in intuitive judgment;
C.2), pass through to contrast the velocity amplitude of initial data in synchronization motor point and the velocity amplitude size of collecting sample, When the poor set point that outpaces (speed difference on the speed of matching time point corresponding with complete rate curve after collection) refers to afterwards In place of illustrating " error ", concrete grammar is as follows: the error threshold values of setting test data and benchmark data, on a timeline, When certain point tolerance exceedes this threshold values, mark position and the velocity information in this motor point (movement velocity on corresponding time point).
If Fig. 3, the track comparison diagram of arc-shaped, Fig. 4 are shown in linear track comparison diagram, contrast track (original number According to track) difference and racing track (sampled data track) between, i.e. error threshold values between sampled data and initial data δ s, when δ s indicates more than setting value (setting value is the 10% of complete value, can adjust as needed), represents and moves herein Error in data is excessive, with to be adjusted.
The present invention, by sampling to the reality output of motion board, is processed to sampled data, obtains actual defeated The velocity fitting curve going out, this matched curve is carried out quantitative analysiss with the velocity mode that user requires in that context it may be convenient to check Go out to whether there is " saltus step " phenomenon, remind the leak on user's correction algorithm or other problemses.
The above, be only presently preferred embodiments of the present invention, and not the present invention is done with any pro forma restriction, every according to Any simple modification above example made according to the technical spirit of the present invention, equivalent variations, each fall within the protection of the present invention Within the scope of.

Claims (4)

1. the track method that compares of detecting based on pcie it is characterised in that: comprise the following steps:
Step a, fpga directly gathers real output signal in motion board motor process, is stored in and opens up within fpga In fifo;
The real output signal that step a is gathered is uploaded in main frame the pcie bus that step b, fpga is passed through on pcie interface Deposit;
Step c, in the data conversion system in main frame, will be stored in the speed that the data in host memory is converted to collecting sample Degree-time value table, and the Velocity-time value of complete operation is gone out by the initial data Practical Calculation that it is provided that initial data is originated Table, the Velocity-time value table of collecting sample is with the data collecting system in main frame for the Velocity-time value table of complete operation, number Determine error according to carrying out contrast in converting system, data simulation system, data analysis system;
Step d, determine error after readjust the speed of motion board, and repeat step a, step b, step c, it is right to carry out sampling Than and revise, by multiple modification computing and check, the process of Approach by inchmeal, be finally reached sampled notebook data and initial data Identical, strongly reduce error it is ensured that motion board perfection runs.
2. the track method that compares of detecting based on pcie according to claim 1 it is characterised in that: include following walking Rapid:
1), fpga directly gathers the pulsewidth of reality output pulse and cycle parameter in motion board motor process, is stored in and opens up In fifo within fpga;
2), the pulsewidth gathering in motor process and cycle data are uploaded to main frame by the pcie bus on pcie interface by fpga Internal memory;
3), in the data conversion system in main frame, will be stored in the data in host memory be converted to the speed of collecting sample- Time value table, and the Velocity-time value table of complete operation is gone out by the initial data Practical Calculation that it is provided that initial data is originated, The Velocity-time value table of collecting sample turns with the data collecting system in main frame for the Velocity-time value table of complete operation, data Change system, data simulation system, carry out contrast in data analysis system and determine error;
4) readjust the speed of motion board after, determining error, and repeat step 1), step 2), step 3), it is right to carry out sampling Than and revise, by multiple modification computing and check, the process of Approach by inchmeal, be finally reached sampled notebook data and initial data Identical, strongly reduce error it is ensured that motion board perfection runs.
3. the track method that compares of detecting based on pcie according to claim 2 it is characterised in that: described step 3) Realization specifically point the following two kinds mode:
3.1), two groups of data of Velocity-time value table of the Velocity-time value table to collecting sample and complete operation are in time shafts phase With putting upper described point, draw out two curve movements;
3.2), pass through to contrast the velocity amplitude of initial data in synchronization motor point and the velocity amplitude size of collecting sample, when super In place of indicating appearance " error " after crossing set point, concrete grammar is as follows: the error valve of setting test data and benchmark data Value, on a timeline, when certain point tolerance exceedes this threshold values, marks position and the velocity information in this motor point.
4. the track method that compares of detecting based on pcie according to claim 1 it is characterised in that: described step c Realization specifically point the following two kinds mode:
C.1), two groups of data of Velocity-time value table of the Velocity-time value table to collecting sample and complete operation are in time shafts phase With putting upper described point, draw out two curve movements;
C.2), pass through to contrast the velocity amplitude size of velocity amplitude and collecting sample in the initial data in synchronization motor point, when In place of indicating appearance " error " after exceeding set point, concrete grammar is as follows: the error of setting test data and benchmark data Threshold values, on a timeline, when certain point tolerance exceedes this threshold values, marks position and the velocity information in this motor point.
CN201410502309.0A 2014-09-26 2014-09-26 Method for detecting and comparing tracks on basis of PCIe Active CN104298174B (en)

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