CN104253151B - 场截止型反向导通绝缘栅双极型晶体管及其制造方法 - Google Patents

场截止型反向导通绝缘栅双极型晶体管及其制造方法 Download PDF

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CN104253151B
CN104253151B CN201310265445.8A CN201310265445A CN104253151B CN 104253151 B CN104253151 B CN 104253151B CN 201310265445 A CN201310265445 A CN 201310265445A CN 104253151 B CN104253151 B CN 104253151B
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layer
substrate
electric field
bipolar transistor
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CN104253151A (zh
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张硕
芮强
王根毅
邓小社
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CSMC Technologies Corp
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Wuxi CSMC Semiconductor Co Ltd
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Priority to EP14816878.4A priority patent/EP3016144B1/en
Priority to PCT/CN2014/079250 priority patent/WO2014206189A1/zh
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Abstract

本发明公开了一种FS型RC‑IGBT，包括终端结构和有源区，场截止型反向导通绝缘栅双极型晶体管的衬底为N型衬底，衬底的背面设有N型的电场终止层，电场终止层背离衬底的一面设有背面P型结构，背面P型结构的表面设有背面金属层；有源区内形成有多个从背面金属层贯穿背面P型结构至电场终止层内的槽口，背面金属层的金属填充入槽口中形成伸入电场终止层的金属结构。本发明还涉及一种FS型RC‑IGBT的制造方法。本发明终端结构内不设置伸入电场终止层的金属结构，二极管导通时只有少部分空穴流过终端结构内的漂移区，减小了内置二极管恢复时恢复电流的大小，改善了二极管的反向恢复能力。

Description

场截止型反向导通绝缘栅双极型晶体管及其制造方法
技术领域
本发明涉及半导体器件的制造方法，特别是涉及一种场截止型反向导通绝缘栅双极型晶体管，还涉及一种场截止型反向导通绝缘栅双极型晶体管的制造方法。
背景技术
绝缘栅双极型晶体管（IGBT）一般采用反向并联续流二极管的方式使用。但这种方式一方面浪费封装面积，另一方面由于寄生电感等寄生效应的存在，并联额外增加了功耗。因此，将IGBT与二极管集成在同一个芯片的技术日益受到重视。
传统的反向导通绝缘栅双极型晶体管（RC-IGBT）结构背面N+型和P+型遍布整个IGBT背面区域。二极管导通时由正极（IGBT发射极）注入的大量空穴，一部分通过终端部分的N-漂移区进入到阴极。当二极管反向恢复时，存储于终端下方部分的空穴无法空过迅速消失，必须通过辐照等载流子寿命控制技术来改善二极管的恢复特性。
发明内容
基于此，为了解决传统的反向导通绝缘栅双极型晶体管反向恢复特性较差的问题，有必要提供一种场截止型反向导通绝缘栅双极型晶体管。
一种场截止型反向导通绝缘栅双极型晶体管，包括***的终端结构和被所述终端结构包围的有源区，所述场截止型反向导通绝缘栅双极型晶体管的衬底为N型衬底，所述衬底的背面设有N型的电场终止层，所述电场终止层背离所述衬底的一面设有背面P型结构，所述背面P型结构背离所述衬底的表面设有背面金属层；所述有源区内形成有多个从背面金属层贯穿所述背面P型结构至所述电场终止层内的槽口，所述背面金属层的金属填充入所述槽口中形成伸入电场终止层的金属结构，所述终端结构内不设置所述槽口和所述伸入电场终止层的金属结构。
在其中一个实施例中，所述衬底的正面、终端结构内设有场限环，所述场限环上设有氧化硅层；所述衬底的正面、有源区内设有P阱，所述P阱内设有N型的发射极，所述衬底的正表面设有栅氧化层，所述栅氧化层的表面设有多晶硅栅极，所述多晶硅栅极被所述氧化硅层覆盖，所述P阱上设有发射极金属结构，所述氧化硅层和发射极金属结构上覆盖有钝化层。
在其中一个实施例中，所述电场终止层和发射极均为N+型，所述背面P型结构是P+型。
在其中一个实施例中，所述背面金属层和伸入电场终止层的金属结构是铝-钛-镍-银结构。
在其中一个实施例中，所述场截止型反向导通绝缘栅双极型晶体管是平面栅极绝缘栅双极型晶体管。
还有必要提供一种场截止型反向导通绝缘栅双极型晶体管的制造方法。
一种场截止型反向导通绝缘栅双极型晶体管的制造方法，包括下列步骤：步骤A，提供N型衬底，将所述衬底的一面作为背面，在所述背面形成N型的电场终止层；步骤B，进行第一阶段正面工艺；包括在所述场截止型反向导通绝缘栅双极型晶体管的衬底正面***的终端结构区域形成耐压结构，在被所述终端结构包围的有源区区域的衬底的正表面形成栅氧化层、及形成栅氧化层表面的多晶硅栅极，在衬底的正面、所述有源区区域内形成P阱，在所述P阱内形成N型的发射极，形成覆盖所述衬底的正面和所述多晶硅栅极的氧化硅层；步骤C，在所述电场终止层背离所述衬底的一面形成背面P型结构；步骤D，进行第二阶段正面工艺；包括光刻和刻蚀所述氧化硅层，形成使所述P阱和发射极呈部分露出的接触孔，向所述接触孔内填入发射极金属结构，形成覆盖所述氧化硅层和发射极金属结构的钝化层；步骤E，在所述有源区区域内形成贯穿所述背面P型结构至所述电场终止层内的槽口，并形成背面金属层，所述背面金属层填充入所述槽口中形成伸入电场终止层的金属结构。
在其中一个实施例中，所述步骤B包括：通过光刻在所述衬底正面注入P型杂质，热扩散后形成场限环作为所述耐压结构；在所述衬底的正面生长场氧化层，并光刻和刻蚀掉所述有源区区域上的场氧化层；在所述衬底的正面生长栅氧化层，并在所述栅氧化层表面形成多晶硅层；光刻和刻蚀去除多余的多晶硅层和栅氧化层，形成多晶硅栅极，并通过自对准注入工艺向所述衬底内离子注入P型杂质，推阱后形成所述P阱；光刻并向所述P阱内注入N型离子形成所述发射极；淀积氧化物介质层，所述场氧化层和淀积氧化物介质层组成所述覆盖所述衬底的正面和所述多晶硅栅极的氧化硅层。
在其中一个实施例中，所述步骤B中在所述衬底的正面生长栅氧化层的步骤是生长600埃～1500埃厚的栅氧化层。
在其中一个实施例中，所述步骤E是通过光刻和刻蚀在所述有源区区域内形成贯穿所述背面P型结构至所述电场终止层内的槽口，并通过溅射工艺形成所述背面金属层和所述伸入电场终止层的金属结构；所述电场终止层和发射极均为N+型，所述背面P型结构是P+型。
在其中一个实施例中，所述步骤C之前，还包括在所述氧化硅层上形成正面保护层的步骤；所述步骤C之后，所述步骤D之前，还包括去除所述正面保护层的步骤。
上述场截止型反向导通绝缘栅双极型晶体管，在终端结构内不形成伸入电场终止层的金属结构。这样当二极管导通时，只会有很少的一部分空穴流过终端结构内的漂移区，减小了内置二极管恢复时的恢复电流的大小，改善了内置二极管的反向恢复能力。
附图说明
图1是一实施例中场截止型反向导通绝缘栅双极型晶体管终端结构和有源区的俯视示意图；
图2是一实施例中场截止型反向导通绝缘栅双极型晶体管的剖面示意图；
图3是一实施例中场截止型反向导通绝缘栅双极型晶体管的制造方法的流程图；
图4A～4K是一实施例中场截止型反向导通绝缘栅双极型晶体管在制造过程中的剖面示意图；
图5是一实施例中步骤S320的具体流程图。
具体实施方式
为使本发明的目的、特征和优点能够更为明显易懂，下面结合附图对本发明的具体实施方式做详细的说明。
图1是一实施例中场截止型反向导通绝缘栅双极型晶体管终端结构和有源区的俯视示意图，图2是一实施例中场截止型反向导通绝缘栅双极型晶体管的剖面示意图。场截止型反向导通绝缘栅双极型晶体管包括***的终端结构200和被终端结构200包围的有源区100。在图2所示实施例中，场截止型反向导通绝缘栅双极型晶体管的衬底为N型衬底。衬底的背面设有N型的电场终止层1（即场截止层），电场终止层1的掺杂浓度大于衬底的掺杂浓度。电场终止层1背离衬底的一面设有背面P型结构10。背面P型结构10背离衬底的表面设有背面金属层12。在本实施例中，背面金属层12采用Al-Ti-Ni-Ag的结构。有源区100内形成有多个从背面金属层12贯穿背面P型结构10至电场终止层1内的金属结构，该金属结构是先形成贯穿背面P型结构10至电场终止层1内的槽口后，向槽口内填入背面金属层12形成的。终端结构200内不设置槽口和伸入电场终止层1的该金属结构。
上述场截止型反向导通绝缘栅双极型晶体管，在终端结构200内不形成伸入电场终止层1的金属结构。这样当二极管导通时，只会有很少的一部分空穴流过终端结构200内的漂移区，减小了内置二极管恢复时的恢复电流的大小，改善了内置二极管的反向恢复能力。
图2所示实施例是以平面栅极绝缘栅双极型晶体管为例对IGBT的结构进行说明，可以理解的，上述仅于有源区100内形成伸入电场终止层1的金属结构的背面结构，同样适用于沟槽（Trench）栅极IGBT。
参照图2，衬底的正面、终端结构200内设有P型的场限环2。场限环2可以设置多个，图2中将其数量进行了省略。场限环2上设有场氧化层14和氧化物介质层7，场氧化层14和氧化物介质层7组成氧化硅层。
衬底的正面、有源区100内设有P阱5，P阱5内设有N型的发射极6。衬底的正表面设有栅氧化层3，栅氧化层3的表面设有多晶硅栅极4，多晶硅栅极4同样被氧化硅层（氧化物介质层7）覆盖。多晶硅栅极4设于相邻的两个P阱5之间，及有源区100和终端结构200交界处的一个P阱5和场限环2之间。P阱5上设有发射极金属结构8，氧化硅层和发射极金属结构8上覆盖有钝化层9。钝化层9的作用是保护芯片表面不受外界离子污染，在本实施例中钝化层9的材质为SiN。
在图2所示实施例中，电场终止层1和发射极6均为N+型，背面P型结构10是P+型。
本发明还提供一种场截止型反向导通绝缘栅双极型晶体管的制造方法，以制造上述的场截止型反向导通绝缘栅双极型晶体管。如图3所示，包括下列步骤：
S310，提供N型衬底，在N型衬底的背面形成N型的电场终止层。
参照图4A，在本实施例中，N+电场终止层1的掺杂浓度大于衬底的掺杂浓度。
S320，进行第一阶段正面工艺。
图4F是步骤S320完成后场截止型反向导通绝缘栅双极型晶体管的剖面示意图。步骤S320具体包括：在场截止型反向导通绝缘栅双极型晶体管的衬底正面***的终端结构200区域形成耐压结构。在被终端结构200包围的有源区100区域的衬底的正表面形成栅氧化层3，及在栅氧化层3表面形成多晶硅栅极4。在衬底的正面、有源区100区域内形成P阱5。在P阱5内形成N型的发射极6。形成覆盖衬底的正面和多晶硅栅极的氧化硅层。氧化硅层由场氧化层14和氧化物介质层7组成。
在图4F所示的实施例中，为了保护圆片（wafer）在进行背面工艺时不损伤其正面结构，在形成氧化硅层后，还包括在氧化硅层上形成正面保护层13的步骤。
S330，在电场终止层背离衬底的一面形成背面P型结构。
图4G是步骤S330完成后场截止型反向导通绝缘栅双极型晶体管的剖面示意图。
参照图4H，步骤S330完成后还需要去除正面保护层13。
S340，进行第二阶段正面工艺。
图4J是步骤S340完成后场截止型反向导通绝缘栅双极型晶体管的剖面示意图。第二阶段正面工艺具体包括光刻和刻蚀氧化物介质层7，使P阱5和发射极6呈部分露出形成接触孔，向接触孔内填入发射极金属结构8，然后形成钝化层9。发射极金属结构8设于P阱5上，钝化层9覆盖于氧化硅层和发射极金属结构8上。钝化层9的作用是保护芯片表面不受外界离子污染，在本实施例中钝化层9的材质为SiN。
S350，在有源区内形成贯穿背面P型结构至电场终止层内的槽口，并填充背面金属层。
参照图4K，形成槽口11，然后填充背面金属层12，形成伸入电场终止层1的金属结构，如图2所示。在本实施例中，背面金属层12采用Al-Ti-Ni-Ag的结构。
采用上述场截止型反向导通绝缘栅双极型晶体管制造方法制造的器件，在终端结构200内不形成伸入电场终止层1的金属结构。这样当二极管导通时，只会有很少的一部分空穴流过终端结构200内的漂移区，减小了内置二极管恢复时的恢复电流的大小，改善了内置二极管的反向恢复能力。
另一方面，传统技术中RC-IGBT的制造工艺，一般在正面工艺完成以后进行两次背面光刻。即先进行一次光刻、注入和扩散形成P+型区域，然后再进行一次光刻、注入和扩散形成N+型区域。由于正面工艺中已完成了金属层的形成，因此后续的退火工艺只能采用较低的温度，难以获得较好的退火效果。
而上述场截止型反向导通绝缘栅双极型晶体管制造方法，采用正面工艺分两步完成的方式，将背面P型结构10的制作提前到正面工艺的金属层（即发射极金属结构8）之前，因此可以在形成发射极金属结构8之前，采用较高的温度进行退火，获得较高的背面注入离子的激活率。
参见图5，在其中一个实施例中，S320具体包括如下的步骤：
S321，通过光刻在衬底正面注入P型杂质，热扩散后形成场限环2作为耐压结构。
本实施例中采用场限环作为耐压结构，在其它实施例中也可以采用场板作为耐压结构，或者场限环+场板的耐压结构，又或者其它的终端耐压结构。
S322，在衬底的正面生长场氧化层14，并光刻和刻蚀掉有源区区域上的场氧化层14。
图4B是步骤S322完成后场截止型反向导通绝缘栅双极型晶体管的剖面示意图。
S323，在衬底的正面生长栅氧化层，并在栅氧化层表面形成多晶硅层。
图4C是步骤S323完成后场截止型反向导通绝缘栅双极型晶体管的剖面示意图。在本实施例中，是通过热氧化生长厚的栅氧化层3，然后在栅氧化层3表面淀积形成多晶硅层4。
S324，光刻和刻蚀去除多余的多晶硅和栅氧化层，形成多晶硅栅极，并向衬底内离子注入P型杂质，推阱后形成P阱。
图4D是步骤S324完成后场截止型反向导通绝缘栅双极型晶体管的剖面示意图。在本实施例中，是通过自对准注入工艺进行离子注入，形成P阱5。
S325，光刻并向P阱内注入N型离子形成发射极。
图4E是步骤S325完成后场截止型反向导通绝缘栅双极型晶体管的剖面示意图。通过光刻形成N+注入窗口后，通过离子注入和推阱形成N+发射极6。
S326，形成覆盖衬底的正面和多晶硅栅极的氧化物介质层。
在本实施例中，是通过淀积形成氧化物介质层7，然后通过炉管的方式形成前述的正面保护层13。因此，圆片的背面同样会形成保护层，需要在进行步骤S330之前将背面的去除掉。
步骤S326完成后执行步骤S330。参见图4F和图4G，可以光刻后注入P型离子，形成P+的背面P型结构10。
参见图4I，在本实施例中，发射极金属结构8是通过溅射工艺形成，并且需要通过光刻和刻蚀工艺去除部分多余的金属。
参见图4J，在本实施例中，钝化层9是通过化学气相淀积的工艺形成的，并且需要通过光刻和刻蚀出用于引出栅电极和发射极电极的焊盘（PAD）区域（图4J中未示）。
图4K中的槽口11可以通过光刻后刻蚀形成。通过调整槽口11的宽度和深度能够调整IGBT及其内置二极管的特性使其折中。
以上所述实施例仅表达了本发明的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对本发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本发明的保护范围。因此，本发明专利的保护范围应以所附权利要求为准。

Claims (10)

1.一种场截止型反向导通绝缘栅双极型晶体管，包括***的终端结构和被所述终端结构包围的有源区，所述场截止型反向导通绝缘栅双极型晶体管的衬底为N型衬底，所述衬底的背面设有N型的电场终止层，所述电场终止层背离所述衬底的一面设有背面P型结构，所述背面P型结构背离所述衬底的表面设有背面金属层；
其特征在于，所述有源区内形成有多个从背面金属层贯穿所述背面P型结构至所述电场终止层内的槽口，所述背面金属层的金属填充入所述槽口中形成伸入电场终止层的金属结构，所述终端结构内不设置所述槽口和所述伸入电场终止层的金属结构，所述电场终止层的掺杂浓度大于衬底的掺杂浓度。
2.根据权利要求1所述的场截止型反向导通绝缘栅双极型晶体管，其特征在于，所述衬底的正面、终端结构内设有场限环，所述场限环上设有氧化硅层；
所述衬底的正面、有源区内设有P阱，所述P阱内设有N型的发射极，所述衬底的正表面设有栅氧化层，所述栅氧化层的表面设有多晶硅栅极，所述多晶硅栅极被所述氧化硅层覆盖，所述P阱上设有发射极金属结构，所述氧化硅层和发射极金属结构上覆盖有钝化层。
3.根据权利要求2所述的场截止型反向导通绝缘栅双极型晶体管，其特征在于，所述电场终止层和发射极均为N+型，所述背面P型结构是P+型。
4.根据权利要求1所述的场截止型反向导通绝缘栅双极型晶体管，其特征在于，所述背面金属层和伸入电场终止层的金属结构是铝-钛-镍-银结构。
5.根据权利要求1所述的场截止型反向导通绝缘栅双极型晶体管，其特征在于，所述场截止型反向导通绝缘栅双极型晶体管是平面栅极绝缘栅双极型晶体管。
6.一种场截止型反向导通绝缘栅双极型晶体管的制造方法，包括下列步骤：
步骤A，提供N型衬底，将所述衬底的一面作为背面，在所述背面形成N型的电场终止层；所述电场终止层的掺杂浓度大于衬底的掺杂浓度；
步骤B，进行第一阶段正面工艺；包括在所述场截止型反向导通绝缘栅双极型晶体管的衬底正面***的终端结构区域形成耐压结构，在被所述终端结构包围的有源区区域的衬底的正表面形成栅氧化层、及形成栅氧化层表面的多晶硅栅极，在衬底的正面、所述有源区区域内形成P阱，在所述P阱内形成N型的发射极，形成覆盖所述衬底的正面和所述多晶硅栅极的氧化硅层；
步骤C，在所述电场终止层背离所述衬底的一面形成背面P型结构；
步骤D，进行第二阶段正面工艺；包括光刻和刻蚀所述氧化硅层，形成使所述P阱和发射极呈部分露出的接触孔，向所述接触孔内填入发射极金属结构，形成覆盖所述氧化硅层和发射极金属结构的钝化层；
步骤E，在所述有源区区域内形成贯穿所述背面P型结构至所述电场终止层内的槽口，并形成背面金属层，所述背面金属层填充入所述槽口中形成伸入电场终止层的金属结构。
7.根据权利要求6所述的场截止型反向导通绝缘栅双极型晶体管的制造方法，其特征在于，所述步骤B包括：
通过光刻在所述衬底正面注入P型杂质，热扩散后形成场限环作为所述耐压结构；
在所述衬底的正面生长场氧化层，并光刻和刻蚀掉所述有源区区域上的场氧化层；
在所述衬底的正面生长栅氧化层，并在所述栅氧化层表面形成多晶硅层；
光刻和刻蚀去除多余的多晶硅层和栅氧化层，形成多晶硅栅极，并通过自对准注入工艺向所述衬底内离子注入P型杂质，推阱后形成所述P阱；
光刻并向所述P阱内注入N型离子形成所述发射极；
淀积氧化物介质层，所述场氧化层和淀积氧化物介质层组成所述覆盖所述衬底的正面和所述多晶硅栅极的氧化硅层。
8.根据权利要求7所述的场截止型反向导通绝缘栅双极型晶体管的制造方法，其特征在于，所述步骤B中在所述衬底的正面生长栅氧化层的步骤是生长600埃～1500埃厚的栅氧化层。
9.根据权利要求7所述的场截止型反向导通绝缘栅双极型晶体管的制造方法，其特征在于，所述步骤E是通过光刻和刻蚀在所述有源区区域内形成贯穿所述背面P型结构至所述电场终止层内的槽口，并通过溅射工艺形成所述背面金属层和所述伸入电场终止层的金属结构；
所述电场终止层和发射极均为N+型，所述背面P型结构是P+型。
10.根据权利要求6所述的场截止型反向导通绝缘栅双极型晶体管的制造方法，其特征在于，所述步骤C之前，还包括在所述氧化硅层上形成正面保护层的步骤；所述步骤C之后，所述步骤D之前，还包括去除所述正面保护层的步骤。
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CN106057876B (zh) * 2016-07-19 2019-10-11 上海华虹宏力半导体制造有限公司 具有反向续流能力的igbt及其制造方法
CN106252390A (zh) * 2016-09-19 2016-12-21 西安理工大学 一种沟槽‑场限环复合终端结构及其制备方法
US10546948B1 (en) * 2018-09-11 2020-01-28 Semiconductor Components Industries, Llc Electronic device including an insulated gate bipolar transistor having a field-stop region and a process of forming the same
CN109817707A (zh) * 2019-01-15 2019-05-28 上海华虹宏力半导体制造有限公司 Rc-igbt结构及其制造方法
CN115881523A (zh) * 2023-02-08 2023-03-31 合肥晶合集成电路股份有限公司 沟槽式栅极及其制作方法
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Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4951110A (en) 1987-11-03 1990-08-21 Siemens Aktiengesellschaft Power semiconductor structural element with four layers
JPH02163973A (ja) 1988-12-16 1990-06-25 Fuji Electric Co Ltd 絶縁ゲート型バイポーラトランジスタ
EP0654829A1 (en) 1993-11-12 1995-05-24 STMicroelectronics, Inc. Increased density MOS-gated double diffused semiconductor devices
JP4167313B2 (ja) 1997-03-18 2008-10-15 株式会社東芝 高耐圧電力用半導体装置
US6429481B1 (en) * 1997-11-14 2002-08-06 Fairchild Semiconductor Corporation Field effect transistor and method of its manufacture
DE102005032074B4 (de) 2005-07-08 2007-07-26 Infineon Technologies Austria Ag Halbleiterbauelement mit Feldstopp
US7956419B2 (en) * 2005-11-02 2011-06-07 International Rectifier Corporation Trench IGBT with depletion stop layer
JP2007184486A (ja) * 2006-01-10 2007-07-19 Denso Corp 半導体装置
JP5011748B2 (ja) * 2006-02-24 2012-08-29 株式会社デンソー 半導体装置
CN101060133A (zh) * 2006-03-16 2007-10-24 三洋电机株式会社 半导体装置及其制造方法
US7769018B2 (en) 2006-07-11 2010-08-03 International Business Machines Corporation Establishing two or more simultaneous channels of communication with a user
JP2008117881A (ja) * 2006-11-02 2008-05-22 Sanyo Electric Co Ltd 半導体装置及びその製造方法
JP5477681B2 (ja) 2008-07-29 2014-04-23 三菱電機株式会社 半導体装置
JP2011035322A (ja) * 2009-08-05 2011-02-17 Panasonic Corp 半導体装置およびその製造方法
JP5587622B2 (ja) * 2010-01-27 2014-09-10 ルネサスエレクトロニクス株式会社 逆導通型ｉｇｂｔ
WO2012046329A1 (ja) 2010-10-07 2012-04-12 株式会社日立製作所 半導体装置およびその製造方法
JP5866827B2 (ja) 2011-06-30 2016-02-24 富士電機株式会社 逆阻止型絶縁ゲート型バイポーラトランジスタの製造方法
JP5995435B2 (ja) 2011-08-02 2016-09-21 ローム株式会社 半導体装置およびその製造方法
CN103137472B (zh) * 2011-11-25 2016-06-08 上海华虹宏力半导体制造有限公司 结合快复管的igbt器件制造方法
JP5954140B2 (ja) * 2012-11-29 2016-07-20 住友電気工業株式会社 炭化珪素半導体装置
CN102983160A (zh) * 2012-12-26 2013-03-20 无锡凤凰半导体科技有限公司 绝缘栅双极型晶体管

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