CN104038171B - Large dynamic range variable gain amplifier - Google Patents
Large dynamic range variable gain amplifier Download PDFInfo
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- CN104038171B CN104038171B CN201410220230.9A CN201410220230A CN104038171B CN 104038171 B CN104038171 B CN 104038171B CN 201410220230 A CN201410220230 A CN 201410220230A CN 104038171 B CN104038171 B CN 104038171B
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Abstract
The invention discloses a large dynamic range variable gain amplifier. The large dynamic range variable gain amplifier comprises a current source, a current mirror, a source electrode degeneration MOS pipe, a difference input pipe, a transconductance improve pipe, a load current mirror and a common mode feedback network; the current mirror is formed by a first NMOS pipe, a second NMOS pipe and a third NMOS pipe; the source electrode degeneration MOS pipe is formed by a fourth NMOS pipe and a fifth NMOS pipe; the difference input pipe is formed by a sixth NMOS pipe and a seventh NMOS pipe; the transconductance improve pipe is formed by a first PMOS pipe and a second PMOS pipe; the load current mirror is formed by a third PMOS pipe and a fourth PMOS pipe; a first resistor and a second resistor are in series connection to form into the common mode feedback network. The large dynamic range variable gain amplifier has the advantages of guaranteeing achievement of the dB-linear approximation relation in the large range, being simple in circuit structure composition, large in dB-linear approximate range and good in linearity.
Description
Technical field
The present invention relates to communication equipment field, particularly to the variable gain amplifier of a kind of Larger Dynamic scope.
Background technology
Automatic gain control circuit is widely used in communication system, such as radio-frequency transmitter circuit, disk drive circuit etc..
As it is shown in figure 1, automatic gain control circuit is mainly filtered by variable gain amplifier, power detector, error amplifier and loop
Ripple device forms.The output size of variable gain amplifier is detected rear error originated from input amplifier and reference by power detector
Level compares, and it exports the result control signal as variable gain amplifier after loop filter is smooth and returns.
Variable gain amplifier is as the important module of automatic gain control circuit, its gain and the finger controlled between voltage
Constant settling time and the dynamic range of system are had a major impact by number relation (dB-linear).Therefore, design one has finger
The high dynamic range variable gain amplifier of number characteristic has important effect to improving automatic gain control circuit performance.
It is special that variable gain amplifier in early days uses Taylors approximation or parasitic NPN transistor to realize dB-linear mostly
Property, use both approaches realize variable gain amplifier generally require change-over circuit could realize control voltage and gain it
Between dB-linear characteristic, therefore circuit structure is complicated, chip area and power consumption the biggest.In recent years without change-over circuit can
Variable-gain amplifier becomes research direction.
It is illustrated in figure 2 the existing variable gain amplifier without change-over circuit [Accurate dB-Linear Variable
Gain Amplifier With Gain Error Compensation,IEEE Journal of Solid-State
Circuit, 2013,48 (2) 456-464], its dB-linear characteristic is come real by source-degeneration resistance and Error Compensation Technology
Existing.The gain of the variable gain amplifier shown in Fig. 2 is:
A=-Gm·Rout (1)
Wherein A is the gain of variable gain amplifier, GmFor the equivalent inpnt mutual conductance of variable gain amplifier, gmFor input
Mutual conductance to pipe, RoutImpedance, G is exported for small-signals,totalAdmittance and the 5th for source-electrode degradation pipe the 4th NMOS tube MN4
The admittance sum of NMOS tube MN5.
Work as gmMuch larger than Gs,totalTime variable gain amplifier equivalent inpnt mutual conductance be approximately Gs,total, thus variable increasing
The gain of benefit amplifier can be approximately:
A=-Gs,total·Rout (3)
Wherein μn,4、μn,5It is respectively MN4 and MN5 carrier mobility, Cox,4、Cox,5Be respectively in MN4 and MN5 grid and
The unit-area capacitance that raceway groove is formed, (WL)4(WL)5It is respectively the breadth length ratio of MN4, MN5, Vgs4And Vgs5Be respectively MN4 and
The gate source voltage of MN5, VTH4And VTH5It is respectively the threshold voltage of MN4 and MN5.
As shown in above-mentioned list of references, use the variable gain amplifier cascade of three grades of these structures, by reasonably selecting
The type of MN4 and MN5 and breadth length ratio can make total gain expressions be approximately: within the specific limits
A=27a3ex+b-3 (5)
Thus realize controlling the dB-linear characteristic between voltage and gain, wherein a=-μN, 4Cox(WL)4, b=-
Vds,1-VTH,4, the dB-linear approximate extents of circuit can be improved further by Error Compensation Technology fine adjustments a and b.This
Method circuit structure is simple, it is not necessary to extra conversion circuit, therefore power consumption is less.But this circuit structure has a disadvantage that
The G when gain is biggers,totalCan increase, cause gmMuch larger than Gs,totalThis condition is unsatisfactory for so that the circuit gain realized
Become big with preferable dB-linear characteristic error.
Summary of the invention
In order to overcome shortcoming that prior art exists with not enough, the present invention provides the variable gain of a kind of Larger Dynamic scope to put
Big device.
The present invention is not in the case of using auxiliary circuit structure, it is achieved approximates greatly dynamic range and has preferable line
Property degree.
The technical solution used in the present invention:
The variable gain amplifier of a kind of Larger Dynamic scope, including a current source IREF, also includes current mirror 1, source electrode
Degeneration metal-oxide-semiconductor 2, Differential Input pipe 3, mutual conductance improve pipe 4, load current mirror 5 and common-mode feedback network 6;
Described current mirror 1 is made up of the first NMOS tube MN1, the second NMOS tube MN2 and the 3rd NMOS tube MN3;
Described source-electrode degradation metal-oxide-semiconductor 2 is made up of the 4th NMOS tube MN4 and the 5th NMOS tube MN5;
Described Differential Input pipe 3 is made up of the 6th NMOS tube MN6 and the 7th NMOS tube MN7;
Described mutual conductance improves pipe 4 and is made up of the first PMOS MP1 and the second PMOS MP2;
Described load current mirror 5 is made up of the 3rd PMOS MP3 and the 4th PMOS MP4;
Described common-mode feedback network 6 is by the first resistance R1With the second resistance R2In series;
Wherein, the grid of described first PMOS MP1 respectively with the drain electrode of the 6th NMOS tube MN6, the one of the first resistance R1
The drain electrode of end and the 3rd PMOS MP3 is connected;
The grid of described second PMOS MP2 respectively with drain electrode, one end of the second resistance R2 and of the 7th NMOS tube MN7
The drain electrode of four PMOS MP4 connects;
The source electrode of described first PMOS MP1 and the source electrode of the second PMOS MP2 are all connected with voltage source VDD;
The drain electrode of described first PMOS MP1 is connected with the source electrode of the 6th NMOS tube MN6, described second PMOS MP2
Drain electrode is connected with the source electrode of the 7th NMOS tube MN7.
The grid of described first NMOS tube MN1, the grid of the second NMOS tube MN2, the grid and the 3rd of the 3rd NMOS tube MN3
The drain electrode of NMOS tube MN3 is all connected with described current source IREF;
The drain electrode of described first NMOS tube MN1 respectively with source electrode, the source electrode of the 5th NMOS tube MN5 of the 4th NMOS tube MN4
And the 6th NMOS tube MN6 source electrode connect;
The drain electrode of the second NMOS tube MN2 respectively with drain electrode, the drain electrode of the 5th NMOS tube MN5 and of the 4th NMOS tube MN4
The source electrode of seven NMOS tube MN7 connects;
The source electrode of described first NMOS tube MN1, the source electrode of the second NMOS tube MN2 and the source ground of the 3rd NMOS tube MN3;
The grid of described 4th NMOS tube MN4, the grid of the 5th NMOS tube MN5 are all connected with gain-controlled voltage VC;
The grid of described 6th NMOS tube MN6 and the grid of the 7th NMOS tube MN7 are respectively with the positive and negative electrode of input signal even
Connect.
The grid of described 3rd PMOS MP3, the grid of the 4th PMOS MP4 connect with the common port of common-mode feedback network
Connect;
The source electrode of described 3rd PMOS MP3, the source electrode of the 4th PMOS MP4 are connected with voltage source VDD.
First, second, third, fourth, the five, the 6th and the 7th NMOS tube and first, second, third and the 4th PMOS
All use 0.18um CMOS technology.
First, second, third, fourth, the substrate of the five, the 6th and the 7th NMOS tube is all connected to ground, first, second,
The substrate of the 3rd and the 4th PMOS is all connected with voltage source VDD.
Beneficial effects of the present invention:
(1) present invention uses mutual conductance on the basis of source-degeneration resistance and Error Compensation Technology realize dB-linear
Raising method, can expand the approximation of variable gain amplifier dB-linear on the basis of not introducing other extra conversion circuit
Scope.There is the advantage that circuit structure composition is simple, dB-linear approximate extents is bigger.
(2) variable gain amplifier of the present invention have employed mutual conductance develop skill raising dB-linear scope, due to mutual conductance
Developing skill and introduce local negative feedback, therefore mutual conductance develops skill and not only expands the approximate extents of dB-linear, the most also
Improve the linearity of circuit.
Accompanying drawing explanation
Fig. 1 is automatic gain control circuit structure block diagram of the prior art;
Fig. 2 is to realize dB-linear characteristic schematic diagram without change-over circuit in prior art;
Fig. 3 is the variable gain amplifier structure chart of the present invention a kind of Larger Dynamic scope;
Fig. 4 is the curve chart controlling voltage and gain relationship in the embodiment of the present invention;
Fig. 5 a is that the present invention controls the contrast with ideal curve of voltage and gain relationship curve chart;
Fig. 5 b is variable-gain amplifier gain and the perfect Gain Error Graph of the present invention a kind of Larger Dynamic scope;
Fig. 6 is the input third order intermodulation point under the variable gain amplifier different gains of the present invention a kind of Larger Dynamic scope.
Detailed description of the invention
Below in conjunction with embodiment and accompanying drawing, the present invention is described in further detail, but embodiments of the present invention are not
It is limited to this.
Embodiment
As it is shown on figure 3, the variable gain amplifier of a kind of Larger Dynamic scope, including a current source IREF, current mirror 1,
Source-electrode degradation metal-oxide-semiconductor 2, Differential Input pipe 3, mutual conductance improve pipe 4, load current mirror 5 and common-mode feedback network 6;
Described current mirror 1 is made up of the first NMOS tube MN1, the second NMOS tube MN2 and the 3rd NMOS tube MN3;
Described source-electrode degradation metal-oxide-semiconductor 2 is made up of the 4th NMOS tube MN4 and the 5th NMOS tube MN5;
Described Differential Input pipe 3 is made up of the 6th NMOS tube MN6 and the 7th NMOS tube MN7;
Described mutual conductance improves pipe 4 and is made up of the first PMOS MP1 and the second PMOS MP2;
Described load current mirror 5 is made up of the 3rd PMOS MP3 and the 4th PMOS MP4;
Described common-mode feedback network 6 is by the first resistance R1With the second resistance R2In series;
In current mirror, the grid of described first NMOS tube MN1, the grid of the second NMOS tube MN2, the 3rd NMOS tube MN3
The drain electrode of grid and the 3rd NMOS tube MN3 is all connected with described current source IREF;The other end of described current source is with voltage source even
Connect, with the electric current I of current sourcerefThe mirror on the first NMOS tube MN1, the second NMOS tube MN2 place branch road respectively as reference current
As forming the first image current I1With the second image current I2;Wherein the first image current I1With the second image current I2Equal;
The drain electrode (outfan of the first image current) of described first NMOS tube MN1 respectively with the source of the 4th NMOS tube MN4
The source electrode of pole, the source electrode of the 5th NMOS tube MN5 and the 6th NMOS tube MN6 connects;
The drain electrode (outfan of the second image current) of the second NMOS tube MN2 respectively with the drain electrode of the 4th NMOS tube MN4,
The drain electrode of five NMOS tube MN5 and the source electrode of the 7th NMOS tube MN7 connect;
The source electrode of described first NMOS tube MN1, the source electrode of the second NMOS tube MN2 and the source ground of the 3rd NMOS tube MN3;
The grid of described 4th NMOS tube MN4, the grid of the 5th NMOS tube MN5 are all connected with gain-controlled voltage VC;
The grid of described 6th NMOS tube MN6 and the grid of the 7th NMOS tube MN7 are respectively with the positive and negative electrode of input signal even
Connect.
Mutual conductance improves in pipe, the grid of described first PMOS MP1 respectively with drain electrode, first electricity of the 6th NMOS tube MN6
One end i.e. one end of common-mode feedback network of resistance R1 and the drain electrode of the 3rd PMOS MP3 are connected;
The grid of described second PMOS MP2 is the most common with one end of the drain electrode of the 7th NMOS tube MN7, the second resistance R2 respectively
The other end of mould feedback network and the drain electrode of the 4th PMOS MP4 connect;
The source electrode of described first PMOS MP1 and the source electrode of the second PMOS MP2 are all connected with voltage source VDD.
The drain electrode of described first PMOS MP1 and the source electrode of the 6th NMOS tube MN6 connect, described second PMOS MP2
Drain electrode is connected with the source electrode of the 7th NMOS tube MN7.
The grid of the 3rd PMOS MP3, the grid of the 4th PMOS MP4 are connected with the common port of common-mode feedback network;
The source electrode of the 3rd PMOS MP3, the source electrode of the 4th PMOS MP4 are connected with voltage source VDD.
First, second, third, fourth, the substrate of the five, the 6th and the 7th NMOS tube is all connected to ground, first, second,
The substrate of the 3rd and the 4th PMOS is all connected with voltage source VDD.
NMOS tube and PMOS in the present embodiment are employing 0.18um CMOS technology.
In the present embodiment, the gain expressions of variable gain amplifier can be written as:
A=-Gm·Rout (6)
Wherein A is the gain of variable gain amplifier, GmFor equivalent transconductance, RoutImpedance is exported for small-signal.
Owing to the mutual conductance raising pipe 4 introduced in the present embodiment is as local negative feedback branch road, by the work of local negative feedback
By the equivalent transconductance that improve circuit so that it is mutual conductance expression formula is:
Wherein GmFor the equivalent inpnt mutual conductance of variable gain amplifier, gmn6,7It is the 6th NMOS tube MN6 and the 7th NMOS tube
The mutual conductance of MN7, gmp1,2It is the first PMOS MP1 and the mutual conductance of the second PMOS MP2, RoutImpedance, G is exported for small-signals,total
Admittance and the admittance sum of the 5th NMOS tube MN5 for source-electrode degradation pipe the 4th NMOS tube MN4.
Because gmp1,2·RoutTypically much deeper than 1, so gm6,7·gmp1,2·RoutMuch larger than Gs,totalThis precondition
Can meet in more large gain excursion, therefore the equivalent inpnt mutual conductance of variable gain amplifier is approximately Gs,total, thus
The gain of variable gain amplifier can be approximately:
A=-Gs,total·Rout (8)
Wherein A is the gain of variable gain amplifier, RoutImpedance, G is exported for small-signals,totalFor source-electrode degradation pipe
The admittance of four NMOS tube MN4 and the admittance sum of the 5th NMOS tube MN5, μn,4And μn,5It is respectively the 4th NMOS tube MN4 and the 5th
The mobility of carrier, C in NMOS tube MN5ox,4And Cox,5It is respectively the unit are electricity of MN4 and MN5 grid and raceway groove formation
Hold, (WL)4(WL)5It is respectively NMOS tube MN4 and the breadth length ratio of MN5, Vgs4And Vgs5It is respectively the 4th NMOS tube MN4 and the 5th
The gate source voltage of NMOS tube MN5, VTH4And VTH5It is respectively the 4th NMOS tube MN4 and the threshold voltage of the 5th NMOS tube MN5.
Completely the same with (4) formula, by [Accurate dB-Linear Variable Gain by contrast (9) formula
Amplifier With Gain Error Compensation] understand by selecting suitable metal-oxide-semiconductor type and breadth length ratio
The control voltage and the gain that enable to this structure meet dB-linear characteristic, by the gain table that three grades of this structure cascades are total
Reach formula:
A=27a3ex+b-3 (10)
Because using mutual conductance to develop skill it is possible to make gm6,7·gmp1,2·RoutMuch larger than Gs,totalThis condition energy
Meeting in bigger gain ranging, therefore the dB-linear scope of this structure can be bigger than original structure dB-linear scope,
And due to mutual conductance develop skill introduce local negative feedback make the linearity of circuit also superior to original structure.
Corresponding gain when being that in the present embodiment, gain-controlled voltage VC changes in the range of 0.7~1.35V as shown in Figure 4
Excursion, x-axis is for controlling voltage, and y-axis is cascade amplifier gain, and the present embodiment can realize in-25dB~70dB altogether
95dB gain variation range, is better than the 76dB excursion of original structure.
When being that in the present embodiment, gain-controlled voltage VC changes in the range of 0.7~1.15V as shown in Figure 5 a accordingly in fact
Testing the contrast of gain curve and ideal index gain curve, wherein x-axis is for controlling voltage, and y-axis is gain;It is real as shown in Figure 5 b
Border gain and the error relationship of the perfect Gain, x-axis is for controlling voltage VC, and y-axis is the error of actual gain curve and ideal curve.
Visible the present embodiment can realize the approximation of 70dB gain ranging in the range of error is less than ± 0.6dB, is better than the 50dB of original structure
Approximation in gain ranging, hence it is demonstrated that the variable gain amplifier of present configuration to have larger range of dB-linear special
Property.
It is the input third order intermodulation point relation with gain of variable gain amplifier as shown in Figure 6.X-axis is gain, and y-axis is
Input third order intermodulation point.Inputting third order intermodulation point when gain is 63dB is-37dBm, is better than-the 48.5dBm of original structure, it is seen that
Have employed the present embodiment that mutual conductance develops skill, relative to original structure, there is the more preferable linearity.
In the present invention, current source is mirrored to two difference channels as tail current by current mirror.Source-electrode degradation metal-oxide-semiconductor conduct
Changing the parts of gain, the control voltage changing its grid can change gain, selects different types of metal-oxide-semiconductor and suitably
Breadth length ratio can approximate and realize dB-linear characteristic.Mutual conductance improves pipe introducing local negative feedback can make equivalent inpnt mutual conductance improve, from
And dB-linear approximation can be realized in a wider context, the linearity characteristic of circuit can also be improved simultaneously.
Above-described embodiment is the present invention preferably embodiment, but embodiments of the present invention are not by described embodiment
Limit, the change made under other any spirit without departing from the present invention and principle, modify, substitute, combine, simplify,
All should be the substitute mode of equivalence, within being included in protection scope of the present invention.
Claims (5)
1. a variable gain amplifier for Larger Dynamic scope, including a current source (IREF), it is characterised in that also include electricity
Stream mirror (1), source-electrode degradation metal-oxide-semiconductor (2), Differential Input pipe (3), mutual conductance improve pipe (4), load current mirror (5) and common-mode feedback
Network (6);
Described current mirror (1) is made up of the first NMOS tube (MN1), the second NMOS tube (MN2) and the 3rd NMOS tube (MN3);
Described source-electrode degradation metal-oxide-semiconductor (2) is made up of the 4th NMOS tube (MN4) and the 5th NMOS tube (MN5);
Described Differential Input pipe (3) is made up of the 6th NMOS tube (MN6) and the 7th NMOS tube (MN7);
Described mutual conductance improves pipe (4) and is made up of the first PMOS (MP1) and the second PMOS (MP2);
Described load current mirror (5) is made up of the 3rd PMOS (MP3) and the 4th PMOS (MP4);
Described common-mode feedback network (6) is by the first resistance (R1) and the second resistance (R2) in series;
Wherein, the grid of described first PMOS (MP1) respectively with the drain electrode of the 6th NMOS tube (MN6), the first resistance (R1)
The drain electrode of one end and the 3rd PMOS (MP3) is connected;
The grid of described second PMOS (MP2) respectively with the drain electrode of the 7th NMOS tube (MN7), one end of the second resistance (R2) and
The drain electrode of the 4th PMOS (MP4) connects;
The source electrode of described first PMOS (MP1) and the source electrode of the second PMOS (MP2) are all connected with voltage source (VDD);
The drain electrode of described first PMOS (MP1) is connected with the source electrode of the 6th NMOS tube (MN6), described second PMOS (MP2)
Drain electrode be connected with the source electrode of the 7th NMOS tube (MN7).
The variable gain amplifier of a kind of Larger Dynamic scope the most according to claim 1, it is characterised in that described first
The grid of NMOS tube (MN1), the grid of the second NMOS tube (MN2), the grid of the 3rd NMOS tube (MN3) and the 3rd NMOS tube
(MN3) drain electrode is all connected with described current source (IREF);
The drain electrode of described first NMOS tube (MN1) respectively with source electrode, the source of the 5th NMOS tube (MN5) of the 4th NMOS tube (MN4)
The source electrode of pole and the 6th NMOS tube (MN6) connects;
The drain electrode of described second NMOS tube (MN2) respectively with drain electrode, the leakage of the 5th NMOS tube (MN5) of the 4th NMOS tube (MN4)
The source electrode of pole and the 7th NMOS tube (MN7) connects;
The source electrode of the source electrode of described first NMOS tube (MN1), the source electrode of the second NMOS tube (MN2) and the 3rd NMOS tube (MN3) connects
Ground;
The grid of described 4th NMOS tube (MN4), the grid of the 5th NMOS tube (MN5) are all connected with gain-controlled voltage (VC);
The grid of described 6th NMOS tube (MN6) and the grid of the 7th NMOS tube (MN7) are respectively with the positive and negative electrode of input signal even
Connect.
The variable gain amplifier of a kind of Larger Dynamic scope the most according to claim 1, it is characterised in that the described 3rd
The grid of PMOS (MP3), the grid of the 4th PMOS (MP4) are connected with the common port of common-mode feedback network;
The source electrode of described 3rd PMOS (MP3), the source electrode of the 4th PMOS (MP4) are connected with voltage source (VDD).
4. according to the variable gain amplifier of a kind of Larger Dynamic scope described in any one of claim 1-3, it is characterised in that the
One, second, third, fourth, fifth, the 6th and the 7th NMOS tube and first, second, third and the 4th PMOS all use
0.18um CMOS technology.
The variable gain amplifier of a kind of Larger Dynamic scope the most according to claim 1, it is characterised in that first, second,
The substrate of the three, the four, the five, the 6th and the 7th NMOS tube is all connected to ground, first, second, third and the 4th PMOS
Substrate is all connected with voltage source (VDD).
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CN101641862A (en) * | 2007-03-19 | 2010-02-03 | 高通股份有限公司 | Linear transconductor for RF communications |
CN102045035A (en) * | 2010-11-24 | 2011-05-04 | 东南大学 | Low-power consumption broadband high-gain high-swing rate single-level operation transconductance amplifier |
CN203872141U (en) * | 2014-05-22 | 2014-10-08 | 华南理工大学 | Large-dynamic range variable gain amplifier |
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CN101641862A (en) * | 2007-03-19 | 2010-02-03 | 高通股份有限公司 | Linear transconductor for RF communications |
CN102045035A (en) * | 2010-11-24 | 2011-05-04 | 东南大学 | Low-power consumption broadband high-gain high-swing rate single-level operation transconductance amplifier |
CN203872141U (en) * | 2014-05-22 | 2014-10-08 | 华南理工大学 | Large-dynamic range variable gain amplifier |
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