CN103944369A - Wave pursuing current limiting method and device with function of short pulse suppression - Google Patents
Wave pursuing current limiting method and device with function of short pulse suppression Download PDFInfo
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- CN103944369A CN103944369A CN201410154260.4A CN201410154260A CN103944369A CN 103944369 A CN103944369 A CN 103944369A CN 201410154260 A CN201410154260 A CN 201410154260A CN 103944369 A CN103944369 A CN 103944369A
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- pwm
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- input signal
- short pulse
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
- Inverter Devices (AREA)
Abstract
The invention provides a wave pursuing current limiting method and device with a function of short pulse suppression, and relates to the technical field of switch power supply current protection. The wave pursuing current limiting method and device with the function of short pulse suppression aims to solve the problem of short pulse signals in the wave pursuing current limiting process. The method includes the steps that when over current fault happens, time keeping begins, the time tH acted by the PWM input signal is judged, if the time tH is larger than the preset time Tset1, the driving signal is blocked; if the time tH is less than the preset time Tset1, the blocking of the driving signal is delayed, and the delay is that Tdelay1=Tset1-tH; when the over current fault signal is reset, the time tL from over current signal low putting and PWM input signal low putting is judged, if the time tL is larger than the preset time Tset2, the driving signal is released; if the time tL is less than the preset time Tset2, the releasing of the driving signal is delayed, and the delay is that Tdelay2=Tset2-tL.
Description
Technical field
Invention relates to switch power supply current resist technology field, relates in particular to a kind of wave-chasing current limiting method and device with short pulse suppression function.
Background technology
Wave limiting is a kind of technology for power electronic product overcurrent protection, and compared with traditional current protection technology, it can improve the efficiency of circuit.At present stress how to improve when protection sequential logic control in many level topology and current limliting are recovered aspect circuit efficiency about the research of wave limiting technology.
Wave limiting is a kind of overcurrent protection measure conventional in switch power supply equipment.Its initial design considerations is based on PWM(Pulse Width Modulation, pulse width modulation) numerical characteristic of control signal---there is low and high level two states.In the time there is overcurrent, rely on the driving of the quick lockout switch pipe of hardware; After fault disappears, carry out failure reset according to the rising edge of PWM, switching tube can return to rapidly normal operating conditions.So just can strictly control the overcurrent protection time, improve the efficiency of circuit.
Conventional wave limiting device is realized by the logical device such as trigger, NAND gate, and control logic is comparatively simple.Along with the appearance of new unit and new topology, stress both ways for the improvement of wave limiting technology:
The one, for multi-level circuit topological structure, how to control the turn-on and turn-off sequential of each switching tube, make wave limiting do the used time and can not cause switching tube unbalanced stress, avoid bridge arm direct pass etc.
The 2nd, how to improve circuit efficiency, especially, after over-current signal disappears, recover as early as possible to drive signal.
Common wave limiting technology, in the moment of action and recovery, likely can produce short pulse, if do not processed, the power semiconductor to rear class is produced to very serious harm, affects device lifetime, even directly damages device.
Summary of the invention
Effectively solve contingent short pulse signal in wave limiting process, protection switch pipe, improves product reliability.
The present invention is to achieve these goals by the following technical solutions:
There is a method for the wave limiting of short pulse suppression function, it is characterized in that comprising the following steps:
When over current fault occurs to start timing, over-current signal sets high, and starts to act on wave limiting,
If now PWM input signal is low, do not need to do extra process, directly block and drive signal,
If PWM input signal is high, the time t acting on while needing judge when over-current signal sets high to PWM input signal rising edge
h,
If time t
hbe greater than scheduled time T
set1, block and drive signal;
If time t
hbe less than scheduled time T
set1, postpone to block to drive signal, postpone for T
delay1=T
set1-t
h;
In the time that overcurrent fault-signal resets, over-current signal sets low, wave limiting finishes, if now PWM input signal is low, do not need to do extra process, directly discharge and drive signal, if now PWM input signal is high, and judge the time t acting on when over-current signal sets low in the time that PWM input signal sets low
l,
If be greater than scheduled time T
set2, decontrol and drive signal;
If be less than scheduled time T
set2, postpone to decontrol to drive signal, postpone for T
delay2=T
set2-t
l.
In technique scheme, t
h=t
r_error-t
r_PWM, t
l=t
f_PWM-t
f_error, T
delay1=T
set1-t
h, T
delay2=T
set2-t
l,
The rising edge moment t of PWM input signal
r_PWM, the trailing edge moment t of PWM input signal
f_PWM, the rising edge moment t of over-current signal
r_error, the trailing edge moment t of over-current signal
f_error.
In technique scheme, PWM input signal is by after PWM reference signal fixed delay h microsecond, has been equivalent on time shaft translation and has obtained after h microsecond, the rising edge moment t of PWM reference signal
r_ref, trailing edge moment t
f_ref, the rising edge moment tr_PWM of PWM input signal, has:
Reset signal occurs in t
f_refafterwards
Because of t
f_refoccur, after h microsecond, PWM input signal will be closed, and try to achieve t by following formula
l
t
f_PWM=h+t
f_ref
t
L=t
f_PWM-t
f_error=h-（t
f_error-t
f_ref）；
Reset signal occurs in t
f_refbefore, t
r_PWMafterwards
Now PWM input signal will continue to maintain at least h microsecond of high level, discharges locking signal, can not cause short pulse.
In technique scheme, described scheduled time T
set1be 820 nanoseconds, scheduled time T
set2it was 600 nanoseconds.
In technique scheme, described h microsecond is 1 microsecond.
Because so the present invention has adopted above technical scheme to possess following beneficial effect:
One, method and apparatus disclosed by the invention has been applied in newly-designed 100kVar dynamic reactive power compensation equipment, respond well.
Two, core thinking of the present invention is that PWM reference signal has been added to constant time lag, and carries out corresponding logic judgement and processing with the PWM input signal newly producing, and has overcome t
f_PWMoccur in t
f_errorafterwards, when over current fault signal resets, in the trailing edge moment that need to prejudge PWM input signal, this is for the very difficult problem of the digital circuit based on sequential logic.
Three, the present invention effectively solves contingent short pulse signal in wave limiting process, and protection switch pipe improves product reliability.
Brief description of the drawings
Fig. 1 is schematic diagram of device of the present invention
Fig. 2 is logic decision flow chart of the present invention
Fault set and reset timing figure when Fig. 3 is PWM input signal low level
Fault set (without short pulse) sequential chart when Fig. 4 is PWM input signal high level
Fault set (short pulse suppression) sequential chart when Fig. 5 is PWM input signal high level
Failure reset (without short pulse) sequential chart when Fig. 6 is PWM input signal high level
Failure reset (short pulse suppression) sequential chart when Fig. 7 is PWM input signal high level
Fig. 8 adds constant time lag failure reset situation one (short pulse suppression) sequential chart
Fig. 9 adds constant time lag failure reset situation two sequential charts
Figure 10 adds constant time lag failure reset situation three sequential charts.
Embodiment
Below in conjunction with accompanying drawing, the present invention is further illustrated:
In the time there is over current fault, over-current signal is set high, and now wave limiting starts effect, should block driving signal.If now PWM input signal is low, do not need to do extra process, directly block, as shown in Figure 3.If now PWM input signal is high, to judge the time t of continuous action of high level
hif be greater than scheduled time 1(T
set1), locking pulse immediately, as shown in Figure 4; If t
h< T
set1, pass through 1(T time of delay
delay1=T
set1-t
h) locking pulse again, avoid the generation of short pulse, as shown in Figure 5.
In the time of overcurrent failure reset, over-current signal is set low, and now wave limiting finishes, and should discharge driving signal.If now PWM input signal is low, do not need to do extra process, directly discharge, as shown in Figure 3.If now PWM input signal is high, want the time t of judging distance pwm signal trailing edge
lif be greater than scheduled time 2(T
set2), discharge immediately pulse, as shown in Figure 6; If tL < is T
set2, pass through 2(T time of delay
delay2=T
set2-t
l) discharge again pulse, avoid the generation of short pulse, as shown in Figure 7.
In the middle of whole process, CPLD need to know the rising edge moment t of each PWM input signal
r_PWMwith trailing edge moment t
f_PWM, over-current signal rising edge (fault) moment t
r_errortrailing edge moment t
f_error, so just can calculate t according to following formula 1 ~ 4
hand t
l:
Formula 1:t
h=t
r_error-t
r_PWM
Formula 2:t
l=t
f_PWM-t
f_error
Formula 3:T
delay1=T
set1-t
h
Formula 4:T
delay2=T
set2-t
l
Wherein T
set1=850 nanoseconds, T
set2=600 nanoseconds,
For formula 1, t
r_PWMoccur in t
r_errorbefore, easily calculate.In formula 2, because need to be to t in the time that overcurrent fault-signal resets
f_PWMand t
f_errorjudge, and t
f_PWMbut occur in t
f_errorafterwards, therefore will be at t
f_errorbefore, or and t
f_errorthe trailing edge moment that simultaneously judges PWM input signal, this is very difficult for the digital circuit based on sequential logic, need to do flexible processing.The invention discloses a kind of method that realizes this object, details are as follows:
Pwm signal (called after PWM reference signal) for each from controller output, by pwm signal processing unit constant time lag 1 microsecond (be equivalent on time shaft translation 1 microsecond), obtain a new signal (called after PWM input signal), input to CPLD.CPLD records respectively rising edge moment tr_ref and the trailing edge moment tf_ref of PWM reference signal, and the rising edge moment tr_PWM of PWM input signal, and does short pulse suppression according to these three parameters.Wherein, the processing mode of wave limiting protection is constant, as shown in Figure 4 and Figure 5.Processing while reset for over-current signal is divided into two kinds of situations (a situation arises after tr_PWM only to need to process tf_ref, because in practical application, is limited to device level, and PWM reference signal is not less than 1 microsecond, is generally tens to hundreds of microsecond);
1, reset signal occurs in t
f_refafterwards
Now due to t
f_refoccur, can know 1 microsecond after PWM input signal will close, calculate from t
f_refto the trailing edge moment t of over-current signal
f_errortime, just can obtain PWM input signal and also will continue t action time of high level
l, t
ltry to achieve by following formula
t
f_PWM=h+t
f_ref
t
L=t
f_PWM-t
f_error=h-（t
f_error-t
f_ref）；
Then make a decision processing according to formula 4, as shown in Figure 8 and Figure 9.
2, reset signal occurs in t
f_refbefore, t
r_PWMafterwards.
Now PWM input signal maintains high level at least 1 microsecond by continuing, and can discharge locking signal, can not cause short pulse, as shown in figure 10.
embodiment 1
There is a method for the wave limiting of short pulse suppression function, it is characterized in that comprising the following steps:
When over current fault occurs to start timing, over-current signal sets high, and starts to act on wave limiting,
If now PWM input signal is low, do not need to do extra process, directly block and drive signal,
If PWM input signal is high, the time t acting on while needing judge when over-current signal sets high to PWM input signal rising edge
h,
If time t
hbe greater than 820 nanoseconds of the scheduled time, block and drive signal;
If time t
hbe less than 820 nanoseconds of the scheduled time, postpone to block driving signal, postpone for T
delay1=T
set1-t
h;
In the time that overcurrent fault-signal resets, over-current signal sets low, wave limiting finishes, if now PWM input signal is low, do not need to do extra process, directly discharge and drive signal, if now PWM input signal is high, and judge the time t acting on when over-current signal sets low in the time that PWM input signal sets low
l,
If be greater than 600 nanoseconds of the scheduled time, decontrol and drive signal;
If be less than 600 nanoseconds of the scheduled time, postpone to decontrol to drive signal, postpone for T
delay2=T
set2-t
l.
In technique scheme, t
h=t
r_error-t
r_PWM, t
l=t
f_PWM-t
f_error, T
delay1=T
set1-t
h, T
delay2=T
set2-t
l,
The rising edge moment t of PWM input signal
r_PWM, the trailing edge moment t of PWM input signal
f_PWM, the rising edge moment t of over-current signal
r_error, the trailing edge moment t of over-current signal
f_error.
In technique scheme, PWM input signal is by after PWM reference signal fixed delay 1 microsecond, has been equivalent on time shaft translation and has obtained after 1 microsecond, the rising edge moment t of PWM reference signal
r_ref, trailing edge moment t
f_ref, the rising edge moment tr_PWM of PWM input signal, has:
Reset signal occurs in t
f_refafterwards
Because of t
f_refoccur, after h microsecond, PWM input signal will be closed, and try to achieve t by following formula
l
t
f_PWM=h+t
f_ref
t
L=t
f_PWM-t
f_error=h-（t
f_error-t
f_ref）；
Reset signal occurs in t
f_refbefore, t
r_PWMafterwards
Now PWM input signal will continue to maintain high level at least 1 microsecond, discharges locking signal, can not cause short pulse.
Claims (5)
1. there is a method for the wave limiting of short pulse suppression function, it is characterized in that comprising the following steps:
When over current fault occurs to start timing, over-current signal sets high, and starts to act on wave limiting,
If now PWM input signal is low, do not need to do extra process, directly block and drive signal,
If PWM input signal is high, the time t acting on while needing judge when over-current signal sets high to PWM input signal rising edge
h,
If time t
hbe greater than scheduled time T
set1, block and drive signal;
If time t
hbe less than scheduled time T
set1, postpone to block to drive signal, postpone for T
delay1=T
set1-t
h;
In the time that overcurrent fault-signal resets, over-current signal sets low, wave limiting finishes, if now PWM input signal is low, do not need to do extra process, directly discharge and drive signal, if now PWM input signal is high, and judge the time t acting on when over-current signal sets low in the time that PWM input signal sets low
l,
If be greater than scheduled time T
set2, decontrol and drive signal;
If be less than scheduled time T
set2, postpone to decontrol to drive signal, postpone for T
delay2=T
set2-t
l.
2. the method for a kind of wave limiting with short pulse suppression function according to claim 1, is characterized in that, t
h=t
r_error-t
r_PWM, t
l=t
f_PWM-t
f_error, T
delay1=T
set1-t
h, T
delay2=T
set2-t
l,
The rising edge moment t of PWM input signal
r_PWM, the trailing edge moment t of PWM input signal
f_PWM, the rising edge moment t of over-current signal
r_error, the trailing edge moment t of over-current signal
f_error.
3. the method for a kind of wave limiting with short pulse suppression function according to claim 1 and 2, it is characterized in that, PWM input signal is by after PWM reference signal fixed delay h microsecond, has been equivalent on time shaft translation and has obtained after h microsecond, the rising edge moment t of PWM reference signal
r_ref, trailing edge moment t
f_ref, the rising edge moment tr_PWM of PWM input signal, has:
Reset signal occurs in t
f_refafterwards
Because of t
f_refoccur, after h microsecond, PWM input signal will be closed, and try to achieve t by following formula
l
t
f_PWM=h+t
f_ref
t
L=t
f_PWM-t
f_error=h-（t
f_error-t
f_ref）；
Reset signal occurs in t
f_refbefore, t
r_PWMafterwards
Now PWM input signal will continue to maintain at least h microsecond of high level, discharges locking signal, can not cause short pulse.
4. the method for a kind of wave limiting with short pulse suppression function according to claim 1 and 2, is characterized in that, the described scheduled time 1 was 820 nanoseconds, and the scheduled time 2 was 600 nanoseconds.
5. the method for a kind of wave limiting with short pulse suppression function according to claim 3, is characterized in that, described h microsecond is 1 microsecond.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410154260.4A CN103944369B (en) | 2014-04-17 | 2014-04-17 | A kind of wave-chasing current limiting method and device with short pulse suppression function |
| PCT/CN2014/082457 WO2015158050A1 (en) | 2014-04-17 | 2014-07-18 | Cycle-by-cycle current limiting method and apparatus with short pulse suppression function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410154260.4A CN103944369B (en) | 2014-04-17 | 2014-04-17 | A kind of wave-chasing current limiting method and device with short pulse suppression function |
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| Publication Number | Publication Date |
|---|---|
| CN103944369A true CN103944369A (en) | 2014-07-23 |
| CN103944369B CN103944369B (en) | 2016-03-23 |
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|---|---|
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| WO (1) | WO2015158050A1 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104967299A (en) * | 2015-05-22 | 2015-10-07 | 赖友源 | Inverter fault solution method in case of pulse-by-pulse current-limiting caused by low switching frequency |
| CN106773932A (en) * | 2016-12-06 | 2017-05-31 | 武汉工程大学 | Digitlization based on FPGA is by ripple current limiting system and guard method |
| CN112510978A (en) * | 2020-11-24 | 2021-03-16 | 廊坊英博电气有限公司 | Method, device, equipment and storage medium for suppressing driving narrow pulse |
| CN112653099A (en) * | 2020-12-22 | 2021-04-13 | 深圳市禾望电气股份有限公司 | Wave-by-wave current limiting control method and system based on general MCU |
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| US5467242A (en) * | 1992-06-18 | 1995-11-14 | International Rectifier Corporation | Method and apparatus for short circuit protection of power transistor device |
| CN102214987A (en) * | 2010-04-06 | 2011-10-12 | 大连精拓光电有限公司 | System for providing over-current protection for switching power converter |
| US20130076330A1 (en) * | 2011-09-27 | 2013-03-28 | Denso Corporation | Power converter |
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| DE19617054C2 (en) * | 1996-04-29 | 2002-05-08 | Semikron Elektronik Gmbh | Overcurrent and short circuit protection |
| CN101902122B (en) * | 2010-07-29 | 2014-07-16 | 中兴通讯股份有限公司 | Cycle-by-cycle current-limiting protection method for VIENNA rectifier and device thereof |
| CN202550538U (en) * | 2012-04-01 | 2012-11-21 | 上海市电力公司 | Cycle-by-cycle overcurrent limiting protection electric energy quality control device |
| CN102624273B (en) * | 2012-04-27 | 2014-10-08 | 华为技术有限公司 | Current limiting control method and device for inverter |
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- 2014-07-18 WO PCT/CN2014/082457 patent/WO2015158050A1/en active Application Filing
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|---|---|---|---|---|
| US5467242A (en) * | 1992-06-18 | 1995-11-14 | International Rectifier Corporation | Method and apparatus for short circuit protection of power transistor device |
| CN102214987A (en) * | 2010-04-06 | 2011-10-12 | 大连精拓光电有限公司 | System for providing over-current protection for switching power converter |
| US20130076330A1 (en) * | 2011-09-27 | 2013-03-28 | Denso Corporation | Power converter |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104967299A (en) * | 2015-05-22 | 2015-10-07 | 赖友源 | Inverter fault solution method in case of pulse-by-pulse current-limiting caused by low switching frequency |
| CN106773932A (en) * | 2016-12-06 | 2017-05-31 | 武汉工程大学 | Digitlization based on FPGA is by ripple current limiting system and guard method |
| CN112510978A (en) * | 2020-11-24 | 2021-03-16 | 廊坊英博电气有限公司 | Method, device, equipment and storage medium for suppressing driving narrow pulse |
| CN112653099A (en) * | 2020-12-22 | 2021-04-13 | 深圳市禾望电气股份有限公司 | Wave-by-wave current limiting control method and system based on general MCU |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103944369B (en) | 2016-03-23 |
| WO2015158050A1 (en) | 2015-10-22 |
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