CN103928393B - 连接件及其制造方法 - Google Patents

连接件及其制造方法 Download PDF

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Publication number
CN103928393B
CN103928393B CN201310009776.5A CN201310009776A CN103928393B CN 103928393 B CN103928393 B CN 103928393B CN 201310009776 A CN201310009776 A CN 201310009776A CN 103928393 B CN103928393 B CN 103928393B
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conductive layer
connector
manufacture method
ion
particle size
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CN103928393A (zh
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周鸣
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Semiconductor Manufacturing International Shanghai Corp
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Semiconductor Manufacturing International Shanghai Corp
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Priority to CN201310009776.5A priority Critical patent/CN103928393B/zh
Priority to US14/060,975 priority patent/US8883626B2/en
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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Abstract

本发明提供一种连接件及其制造方法。所述连接件的制造方法,包括:在基底上形成第一导电层;对所述第一导电层进行离子掺杂,以形成第二导电层;所述第二导电层的颗粒尺寸小于所述第一导电层的颗粒尺寸。所述连接件包括:基底;位于基底上的导电层,所述导电层中掺杂有离子。本发明可以提高连接件的制造良率。

Description

连接件及其制造方法
技术领域
本发明涉及半导体制造领域,尤其涉及一种连接件及其制造方法。
背景技术
随着集成电路技术的不断发展,电子产品越来越向小型化、智能化、高性能以及高可靠性方向发展。而集成电路封装不仅直接影响着集成电路、电子模块乃至整机的性能,而且还制约着整个电子***的小型化、低成本和可靠性。在集成电路晶片尺寸逐步缩小,集成度不断提高的情况下,电子工业对集成电路封装技术提出了越来越高的要求。
在公开号为US7514797B2的美国专利中公开了一种封装结构。参考图1,示出了所述美国专利的一种封装结构的示意图。所述封装结构包括:电路112,位于所述电路112下方与所述电路112的连接端相连的接触插塞118,与所述接触插塞118相连的底部配线层116,与所述底部配线层116相连的穿透硅通道114,与所述穿透硅通道114相连的顶部配线层810,与所述顶部配线层810相接触的顶部焊球1010。在所述封装结构中,通过所述接触插塞118、底部配线层116、穿透硅通道114、顶部配线层810以及焊球1010等的连接件将所述电路112的连接端引出。
然而,实际工艺中,所述底部配线层116、底部配线层116、顶部配线层810等的连接件通常采用一薄型的金属层形成,所述金属层可承受的机械强度较小,容易产生断开的问题,一方面了影响连接件的制造良率,另一方面影响了封装结构的电连接的可靠性。
发明内容
本发明解决的是提供一种连接件及其制造方法,以提高连接件的制造良率。
为了解决上述技术问题,本发明提供一种连接件的制造方法,包括:在基底上形成第一导电层;对所述第一导电层进行离子掺杂,以形成第二导电层;所述第二导电层的颗粒尺寸小于所述第一导电层的颗粒尺寸。
相应地,本发明还提供一种连接件,包括:基底;位于基底上的导电层,所述导电层中掺杂有离子。
与现有技术相比,本发明具有以下优点:
所述掺杂的离子使第一导电层中的颗粒尺寸变小,从而形成具有较小颗粒尺寸的第二导电层,第二导电层中小尺寸的颗粒能够较为集中地进行密排布,从而可以减小颗粒之间的空隙,较小的空隙可以使第二导电层承受外力的能力增强,从而提高了最终形成的连接件的机械强度。
附图说明
图1为现有技术一种封装结构的示意图;
图2至图4本发明连接件的制造方法一实施方式的流程示意图;
图5和图6是本发明连接件在进行离子掺杂之前、之后的电镜图;
图7是本发明连接件一实施例的示意图。
具体实施方式
在下面的描述中阐述了很多具体细节以便于充分理解本发明。但是本发明能够以很多不同于在此描述的其它方式来实施,本领域技术人员可以在不违背本发明内涵的情况下做类似推广,因此本发明不受下面公开的具体实施的限制。
为了解决现有技术的问题,本发明提供一种连接件的制造方法,所述连接件的制造方法大致包括以下步骤:
步骤S1,在基底上形成第一导电层;
步骤S2,对所述第一导电层进行离子掺杂,以形成第二导电层;所述第二导电层的颗粒尺寸(grain size)小于所述第一导电层的颗粒尺寸。
下面结合具体实施例对本发明连接件的制造方法做详细说明。
参考图2至图4是本发明连接件的制造方法一实施例的示意图。本实施例中,以形成用作焊垫的连接件为例进行说明,但是本发明对此不作限制。
如图2所示,执行步骤S1,首先,提供基底100。所述基底100包括半导体衬底,所述半导体衬底中形成有半导体器件;所述半导体衬底上还形成有覆盖所述半导体器件的绝缘层,所述绝缘层中设置有与所述半导体器件的连接端相连的插塞。
此处,所述基底100还可以具有其他的结构,本发明对此不作限制。
如图3所示,继续执行步骤S1,在基底100上形成第一导电层101。本实施例中所述第一导电层101的材料为金属,但是本发明对此不作限制,还可以是氧化铟锡等的透明导电材料。
可以通过物理气相沉积方法(Physical Vapor Deposition,PVD)的方式形成所述金属。但是本发明对形成金属的方法不作限制,还可以采用溅射工艺形成所述金属。
具体地,所述第一导电层101的材料为铝,但是本发明对此不作限制,所述第一导电层101的材料还可以是铜。
如图4所示,执行步骤S2,在形成铝材料的第一导电层101之后,对所述第一导电层101进行离子掺杂,以形成包含离子的第二导电层102。所述掺杂的离子能够使第一导电层101中的颗粒尺寸变小,从而形成具有较小颗粒尺寸的第二导电层102。第二导电层102中小尺寸的颗粒能够较为集中地进行密排布,从而可以减小颗粒之间的空隙,较小的空隙可以使第二导电层102承受外力的能力增强,从而提高了最终形成的连接件的机械强度。
实际工艺中,可以通过扩散或注入的方式实现对所述第一导电层101的离子掺杂。
本实施例中,通过硼(B)离子对所述铝材料的第一导电层101进行离子注入。通过离子注入的方式进行掺杂,效率比较高,可以缩短工艺周期。此外,虽然本实施例采用硼离子进行掺杂,但是本发明对此不作限制,还可以采用其他的离子进行注入,例如:磷离子、砷离子等。
如果离子注入的能量过高,容易破坏所述第一导电层101;而如果离子注入的能量过低,则掺杂的离子较难到达第一导电层101较深的位置处,而造成最终形成的第二导电层102内掺杂离子分布不均的问题。而如果离子注入的剂量过高,会影响连接件的电学性能。因此,较佳地,在通过硼离子进行离子注入的过程中,离子注入的能量为5KeV~50KeV,剂量小于1E27atom/cm2
需要说明的是,在较佳实施例中,在通过硼离子进行离子注入之后,还包括退火步骤,所述退火步骤可以在氦气或氮气的环境中进行。所述退火的步骤可以使硼离子发生扩散,从而使最终形成的第二导电层102中的离子分布更加均匀,进而使第二导电层102中的颗粒尺寸分布更加的均匀,从而使第二导电层102可承受的外力更加均匀,进而提高了第二导电层102的机械强度。
所述退火工艺中,如果温度过高、退火时间过长容易增加退火工艺花费的时间,而如果温度过低、退火时间过短,则不能使最终形成的第二导电层102的离子具有良好的均匀性。因此,优选地,所述氦气或氮气的流量为100~5000标况毫升每分,退火的温度位于250~450℃的范围内,退火的时间位于15~300s的范围内。
参考图5和图6,分别示意出了通过扫描电子显微镜(Scanning ElectronMicroscopy,简称SEM)测量的第一导电层101、第二导电层102的电镜图。
如图5所示,在第一导电层101中,颗粒的尺寸大部分位于100~200μm的范围内,并且颗粒尺寸分布不均。
如图6所示,通过对第一导电层101进行离子掺杂所形成的第二导电层102中,颗粒的尺寸大部分位于50~80μm的范围内,并且所述第二导电层102中颗粒尺寸的差别不大。
需要说明的是,如果所述第二导电层102的颗粒尺寸与第一导电层101颗粒尺寸的差别过大,则对离子掺杂的工艺要求较高,会增加工艺时间,还会增加工艺成本;而如果所述第二导电层102的颗粒尺寸与第一导电层101颗粒尺寸的差别过小,则对连接件机械强度增强的效果不够明显。因此,优选地,所述第二导电层102的颗粒尺寸为所述第一导电层101的颗粒尺寸的0.1~0.9。
在形成第二导电层102之后,本实施例连接件的制造方法还包括:对所述第二导电层102进行图形化,形成由所述第二导电层102构成的焊垫,所述焊垫与基底100中的插塞相接触,用于将基底100中的半导体器件的连接端引出。所述步骤与现有技术相同,在此不再赘述。
至此完成了用作焊垫的连接件的制造方法。
需要说明的是,在上述实施例中,是在完成第一导电层的生长之后,再对第一导电层进行离子掺杂,但是本发明对此不做限制,在其他实施例中,还可以在形成第一导电层的过程中对所述第一导电层进行原位的离子掺杂,以形成第二导电层。
通过原位方式进行离子掺杂,所述离子掺杂的步骤可以与现有设备实现良好的集成。此外,在进行离子掺杂时无需将待形成的互连结构从真空腔中去除并移至其他腔体内,可以减少工艺步骤,简化工艺。
此外,通过原位方式进行离子的掺杂,还可以抑制第一导电层中颗粒的生长,可以进一步减小最终形成的第二导电层中颗粒的尺寸。
在其他实施例中,还可以通过连接件的制造方法形成焊线、电极或插塞等连接件的一种或多种,制造方法与上述实施相同。本领域技术人员可以根据上述实施例进行相应地的修改、变形和替换。
相应地,为了解决现有技术的问题,本发明还提供一种连接件。参考图7,示意出了本发明连接件一实施例的示意图。所述连接件包括:
基底200,所述基底200包括半导体衬底,所述半导体衬底中形成有半导体器件,还具有覆盖所述半导体器件的绝缘层,所述绝缘层中设置有与所述半导体器件连接端相连的插塞。
此处,所述基底200还可以具有其他的结构,本发明对此不作限制。
位于基底200上的导电层202,所述导电层202中掺杂有离子。所述掺杂离子的存在能使所述导电层202中的颗粒尺寸较小。
本实施例中,所述导电层202的材料为金属材料,但是本发明对此不作限制,在其他实施例中,所述导电层202还可以是诸如氧化铟锡等的透明导电材料。
本实施例中,所述金属材料的导电层202为铝。在其他实施例中,所述导电层202的材料还可以是铜。
具体地,铝材料的导电层202中掺杂的离子可以是硼离子,还可以是其他诸如磷离子、砷离子等的掺杂离子。
本实施例中,导电层202中颗粒的尺寸较小并且尺寸分布较为均匀,大致位于50~80nm的范围内。但是本发明对颗粒的具体尺寸值并不作限制。
小尺寸的颗粒可以进行密排布,所述密排布减小了颗粒之间的空隙,从而提高导电层202承受外力的能力,进而提高了连接件的机械强度,具有较高机械强度的连接件不容易产生断裂现象,从而可以保证连接件进行电连接的可靠性。
需要说明的是,所述连接件可以由本发明连接件的制造方法形成,也可以由其他连接件的制造方法形成,本发明对此不作限制。
还需要说明的是,所述导电层202可以用作焊垫、焊线、电极或插塞等连接件的一种或多种。本发明对此不作限制。
以上所述,仅是本发明的较佳实施例而已,并非对本发明作任何形式上的限制。任何熟悉本领域的技术人员,在不脱离本发明技术方案范围情况下,都可利用上述揭示的技术内容对本发明技术方案作出许多可能的变动和修饰,或修改为等同变化的等效实施例。因此,凡是未脱离本发明技术方案的内容,依据本发明的技术实质对以上实施例所做的任何简单修改、等同变化及修饰,均仍属于本发明技术方案保护的范围内。

Claims (9)

1.一种连接件的制造方法,其特征在于,包括:
在基底上形成第一导电层;
对所述第一导电层进行离子掺杂,以形成第二导电层,所述第一导电层和第二导电层的材料为铝,所述离子掺杂的步骤包括:通过硼离子对所述铝材料的第一导电层进行离子注入,离子注入的能量为5KeV~50KeV,剂量小于1E27atom/cm2
所述第二导电层的颗粒尺寸小于所述第一导电层的颗粒尺寸;
在通过硼离子进行离子注入之后执行退火步骤,所述退火的温度位于250~450℃的范围内,退火的时间位于15~300s的范围内。
2.如权利要求1所述的连接件的制造方法,其特征在于,所述第一导电层为金属材料。
3.如权利要求2所述的连接件的制造方法,其特征在于,在基底上形成第一导电层的步骤包括:通过物理气相沉积的方式形成所述第一导电层。
4.如权利要求1所述的连接件的制造方法,其特征在于,在进行离子掺杂之后,还包括退火的步骤,以形成第二导电层。
5.如权利要求1所述的连接件的制造方法,其特征在于,所述退火步骤在氦气或氮气的环境中进行。
6.如权利要求5所述的连接件的制造方法,其特征在于,所述氦气或氮气的流量为100~5000标况毫升每分。
7.如权利要求1所述的连接件的制造方法,其特征在于,所述第二导电层的颗粒尺寸为所述第一导电层的颗粒尺寸的0.1~0.9。
8.如权利要求1所述的连接件的制造方法,其特征在于,所述连接件为焊垫、焊线、电极或插塞中的一种或多种。
9.如权利要求1所述的连接件的制造方法,其特征在于,在基底上形成第一导电层的过程中对所述第一导电层进行原位的离子掺杂,以形成第二导电层。
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CN101070592A (zh) * 2007-06-14 2007-11-14 上海交通大学 铜及其合金的复合离子注入表面改性的方法
CN101246875A (zh) * 2007-02-15 2008-08-20 富士通株式会社 半导体器件及其制造方法

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CN101070592A (zh) * 2007-06-14 2007-11-14 上海交通大学 铜及其合金的复合离子注入表面改性的方法

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