CN103890944A - 热分流器 - Google Patents

热分流器 Download PDF

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CN103890944A
CN103890944A CN201180074348.XA CN201180074348A CN103890944A CN 103890944 A CN103890944 A CN 103890944A CN 201180074348 A CN201180074348 A CN 201180074348A CN 103890944 A CN103890944 A CN 103890944A
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梁迪
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Hewlett Packard Development Co LP
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Abstract

一种热分流器，其将热从器件的侧壁传递至硅衬底。该器件与包含掩埋氧化物层的绝缘体上硅(SOI)相连。该热分流器穿过掩埋氧化物层延伸至硅衬底。

Description

热分流器
背景技术
绝缘体上硅(SOI)器件会生成可能损害器件操作性能的热。由于器件尺寸/覆盖区减小，热的生成会显著增加对器件的操作危害。
附图说明
图1是根据一个实例的绝缘体上硅(SOI)器件的透视图。
图2是根据一个实例的绝缘体上硅(SOI)器件的截面视图。
图3是根据一个实例的绝缘体上硅(SOI)器件的截面视图。
图4是根据一个实例的绝缘体上硅(SOI)器件的截面视图。
图5是根据一个实例的绝缘体上硅(SOI)器件的截面视图。
图6是根据一个实例的光互连件的俯视图。
图7A-7E是根据一个实例制造的绝缘体上硅(SOI)器件的截面视图。
图8A-8F是根据一个实例制造的绝缘体上硅(SOI)器件的截面视图。
图9是基于根据一个实例的从绝缘体上硅(SOI)器件传递热的方法的流程图。
现在将参考附图描述本实例。在附图中，相同的附图标记可表示相同或功能类似的元件。
具体实施方式
绝缘体上硅(SOI)器件可用于电子学领域和光子学领域，例如，用于光互连件中的激光光源。该器件会生成热，热会损害器件带宽，提高操作阈值，并且会导致器件需要更大的功率来克服由于热造成的更高的操作阈值。器件尺寸的减小会关系到操作方面的优势，例如较低的操作阈值功率和较小的覆盖区(即，较高的集成密度)，但也会与额外的热生成相关。掩埋氧化物层由于极差的热导率可充当主要热屏障，防止热通过衬底消散。热阻抗可与器件相关，对应于器件如何消散/传递热。热分流器可用于增强从器件的热传递，而降低热阻抗并改进器件的操作特性。
图1是根据一个实例的绝缘体上硅(SOI)器件100的透视图。在所示的实例中，器件100是光学器件(电力驱动混合硅微环激光器)并且包含SOI110、连接至SOI110的微环102，以及在SOI110中限定的用于消散波耦合微环102以谐振光模的波导120。SOI110包含硅器件层112、掩埋氧化物层114和硅衬底116。微环102包含外接触件105和内接触件104，其可接收驱动电流。微环102还包括侧壁106。
尽管在图1中以微环激光器说明，器件100可包括其它器件，例如分布布拉格反射器、分布反馈激光器和/或可调式激光器。具有谐振器几何形状的激光器可用作光子集成电路(PIC)(包含光子数据链路)的芯片上光源，并且可用于波分复用(WDM)、插分滤波器/路由器、交换机、传感器、调制器、缓冲器和芯片上光互连应用，无源部件例如多路复用器和硅调制器，以及有源部件例如电吸收调制器。
有益效果与减小的器件尺寸相关。例如，通过缩短光学谐振腔的长度并降低操作阈值电流，随着减小环的直径会提高性能。较小的阈值电流以及功耗的相应降低可与较小的器件尺寸有关，并且在不同波长更有效地达到激光发射阈值。此外，对于例如将不同波长信号组合在一起用于多路复用的应用，较小的器件尺寸可导致更快的调制速率并可对激光发射波长控制。集成密度也可随减小的器件覆盖区而增加，导致生产效率提高以及单位器件成本相应降低。
器件100(例如具有阈值电流的电驱动内接触件104和外接触件105)的操作可生成热，这会降低操作的性能。与较大尺寸的器件相比，减小器件100的物理尺寸，例如减小微环102的直径，会关系到增加的热生成。热会损害微环102的带宽性能，并且会导致微环102在热存在下具有更高的激光发射阈值，从而需要更大的功率以达到操作阈值。器件100可与通过器件串联电阻确定的热阻抗相关。该串联电阻可直接与器件100的尺寸相关，器件100的尺寸与器件100消散热的能力相关。温度会在激活(例如以连续波电流驱动)时在器件100的有源区(activeregion)中升高，并且会作为器件直径的函数以二次方提高。在一个实例中，对于具有50微米(μm)直径的器件而言，器件有源区中温度提高可为2.5摄氏度(℃)。在另一实例中，具有15μm的相对较小直径的器件可在63℃的有源区具有温度提高。50μm、25μm和15μm直径的器件的实例热阻抗可为465.2℃/瓦特(W)、1253.4℃/W，和1782℃/W。产生过量热的器件会被限定在脉冲模式下操作以使器件在脉冲之间冷却，以避免操作期间由热引起的过度操作退化。
热会通过表面辐射、对流(气体和/或流体冷却)和扩散(例如由SOI110)而消散。尽管硅可传递热(例如，硅器件层112和硅衬底116)，但是SOI110的掩埋氧化物层114却充当热绝缘体。例如，硅可具有130W/m/℃的热导率，相比之下，氧化硅(例如，掩埋氧化物层114可为SiO2)具有仅为1.3W/m/℃的热导率。因此，由微环102通过SOI110的热扩散会受到掩埋氧化物层114及其低热导率的限制。
因此，本文中的实例可使用热分流器，以将热从侧壁106穿过掩埋氧化物层114传递至硅衬底116。与产生高温且缺少热分流器的类似器件相比，使用热分流器以减少潜在的腔体温度升高会使得器件具有非常低的操作阈值和非常低的功耗。
微环102可与窄波导120一起操作，使得热分流器可置于非常接近微环102以达到微环102中的热点(hotspot)(例如，相比之下，与宽波导结构相关的线性激光器或其它光学器件防止分流器紧邻器件热点)。根据本文中的实例的器件会使热分流器的位置邻近器件的侧壁106，以从器件热点通过侧壁106除去热。
图2是根据一个实例的包含热分流器230的绝缘体上硅(SOI)器件200的截面视图。微环202连接至SOI210的硅器件层212。SOI210包含夹在硅器件层212和硅衬底216之间的掩埋氧化物(BOX)层214。热分流器230可与微环202的侧壁206接触。微环202包含内接触件204、外接触件205、接触层217，以及在器件200的操作期间可生成热(“热点”)的有源层208。
图2中的热分流器230可为非金属，例如可充当电介质的氧化铝(例如，Al2O3)。因此，与直接接触侧壁206的金属热分流器相对照，电介质热分流器230不会引起微环202中的光损耗，并且可置于接触侧壁206和载流子复合/有源区208之处(此处温度可最高)而提供从器件200的侧壁206有效的热排出。
热分流器230的电介质材料可避免对例如高温退火、精抛光和低公差(tolerance)等复杂工艺步骤的需要，复杂工艺步骤会与其它材料如多晶硅和金属有关。氧化铝具有25-40W/m/℃的热导率，其与具有较低热导率的其它材料(例如，氧化硅)相比可提供作为热分流器的有效操作。因此，氧化铝具有使其能够同时充当包覆材料和热分流器材料的热和绝缘(例如，光、电，等)性质。例如，热分流器230可用于表面悬空键钝化(例如，刻蚀了的表面的钝化)，提高操作效率和防止器件200的表面降解。因此，热分流器230可提供多种增强的方面以改进器件性能，包括热排出以外的增强(例如，钝化、谐振光模的调整等)。此外，热分流器230具有可忽略不计的覆盖区，使得器件200和热分流器230与其它器件/热分流器密集集成。由于热分流器230可基于标准剥离光刻(standard lift-off photolithography)、刻蚀以及电介质沉积步骤而制造，而没有任何其它制造复杂性(例如为了严格的公差而抛光)，因此制造是简单的。
图3是根据一个实例的绝缘体上硅(SOI)器件300的截面视图。微环302连接至SOI310的硅器件层312，SOI310还包括掩埋氧化物(BOX)层314和硅衬底316。热分流器330与微环302的侧壁306接触，并且还与内接触件304、接触层317、外接触件305、有源层308以及微环302的内腔接触。
热分流器330可包裹和/或钝化微环302，而对微环302提供保护，同时确保有效热传递至硅衬底316并同时通过表面辐射和对流使热消散。因此，即使在包裹和保护器件300的同时，热分流器330仍为器件300的整体提供增强的热消散/排出(例如，与可阻碍通过表面辐射和对流的有效热消散的其它钝化材料相比)。热分流器330可为光绝缘和/或电绝缘的，从而接触侧壁306而不会干扰光学操作，并且接触内接触件304和外接触件305而不会干扰电操作。通孔和/或沟槽可用于通过热分流器330为上述接触件提供电连接。可通过将电介质分流器部分并入热分流器330以使热分流器330的金属部分与可受金属接触和/或靠近影响的下部器件热耦合以及电隔离和/或光隔离，从而使用金属热分流器330。
图4是根据一个实例的绝缘体上硅(SOI)器件400的截面视图。微环402连接至SOI410的硅器件层412，SOI410还包含掩埋氧化物(BOX)层414和硅衬底416。热分流器430与微环402的侧壁406和有源层408接触，并且暴露内接触件404、接触层417、外接触件405以及微环402的内腔。器件400还包括与硅器件层412和硅衬底416接触的热衬底分流器436。
热衬底分流器436可位于下部并且在微环402的横向尺寸内。热衬底分流器436可由具有高热导率的材料(例如氧化铝、金或其它金属或电介质材料)组成，以填充由BOX层414刻蚀的孔。热衬底分流器436可接触至少一部分硅器件层412，使得热从硅器件层412可向下排出至硅衬底416。
如图4中所示，热衬底分流器436可垂直升至低于硅器件层412的顶表面的程度。因此，能够控制热衬底分流器436的填充率，并且沉积热衬底分流器436而不必抛光热衬底分流器436和SOI410的顶表面。
图5是根据一个实例的绝缘体上硅(SOI)器件500的截面视图。微环502连接至SOI510的硅器件层512，SOI510还包含掩埋氧化物(BOX)层514和硅衬底516。热分流器530可为金属并且可包含与微环502的侧壁506和有源层508接触的电介质分流器532。器件500包含内接触件504、接触层517以及外接触件505。热分流器530与外接触件505接触，并且可由与例如一个单一接触件/分流器组件相同的材料形成。器件500还包含与硅器件层512和硅衬底516接触的热衬底分流器536。
电介质分流器532可形成热分流器530的部分，并且可形成微环502的半导体材料和热分流器530的金属(例如，金、铝和铜)之间的电介质层。因此，电介质分流器532可防止与微环502相关的光模被热分流器530的金属和/或相近处光吸收。热分流器530可由与内接触件504和/或外接触件505相同的材料(例如，金、铝和铜)制成。由于半导体和电介质(例如SiO2和/或Al2O3)之间大的折射率对比，即使在金属热分流器530邻近侧壁506时，光模也可由电介质分流器532被很好地限定在半导体内。电介质分流器532的厚度，即从器件结构中的最热点跨越至热分流器530的距离，因此可以薄至300nm而没有从金属热分流器530的其它光学吸收损失。该尺寸对于从微环502排出热会非常有利。电介质分流器532具有低的光损耗以防止对谐振微环502的光学性能影响。电介质分流器532还具有高的热导率以能够快速和有效地将热从微环502的侧壁506传递至金属热分流器530至硅衬底516。
热衬底分流器536可设置于SOI510中，以将热从硅器件层512传递至硅衬底516。如图5中说明的实例所示，热衬底分流器536可朝微环502的内边缘(例如，至谐振器的边缘)横向延伸以吸收、减弱和/或抑制较高阶的横向光模。因此，谐振器可作为单模谐振器有效地操作，使得热衬底分流器536的定位除了增强从硅器件层512排出的热以外，还可增强基于谐振器模式操作的器件性能。此外，热衬底分流器536可与接触层517隔开，这是因为器件500和/或热衬底分流器530的尺寸、结构和/或其它特征使得以结构支持并隔开微环502和相关结构更灵活。
图6是根据一个实例的光互连件600的俯视图。光互连件600可包括在SOI610上设置的多个微环602、波导620和光检测器650。微环602可产生它自己的信号，并且一个通道可分配至一个环式激光器，而另一通道分配至另一环式激光器，以此类推。微环602包括内接触件604、外接触件605，和与微环602的侧壁606接触的热分流器630。如图6的俯视图，热分流器630可包裹微环602，并且可包裹微环602的一部分和/或整个周长，同时从侧壁606排出热。
多个微环602可共享波导620，从而一起多路复用与微环602相关的信号以使多波长激光器能在光互连件600中使用。基于图6的微环实例的多路复用器与线性激光器相比可具有较少组件，线性激光器与图6的实例相比在使用较多组件的同时具有光损耗和较大覆盖区。
光检测器650可与波导620集成。在一个实例中，具有约180微米长度的锥形光检测器可在绝热条件下将光模从无源SOI波导620转变为具有低耦合损耗和小反射的混合波导检测器650。
光互连件600可使功率高效且高速的硅基处理器(例如用于光互连***的引擎)成为可能。包括光子数据链路的上述***与例如使用常规金属互连的CMOS芯片相比可增加带宽并降低功耗。
基于紧凑的微环设计，光互连件600可在其它光学***(例如Intel LightPeakTMII***)中代替激光器、调制器和多路复用器，同时提供面积(和成本)减小约40倍以及每比特耗散的能量降低约4倍以及数据速率提高2倍。例如，基于图6的***可生成光，使多个微环(光源)一起进行波分复用(WDM)，并且将多个微环直接调节至非常高的速度，而不是如LightPeakTM II***中使用单独的激光源、调制器和多路复用器。因此，与其它***相比，图6的光互连件600可使用降低的功率和尺寸/器件覆盖区特性的直接编码信号。
图7A-7E是根据一个实例制造的绝缘体上硅(SOI)器件的截面视图。图7A-7E中显示的实例器件可为电子器件结构(例如，晶体管)和/或SOI波导光子器件结构(例如，直的光学谐振器、弯曲的光学谐振器和环状光学谐振器等)，并且可为在衬底上形成的非混合结构，包括可含有波导结构的电子和光子器件。
图7A示出了包含硅器件层712、掩埋氧化物(BOX)层714和硅衬底716的SOI710。图7B示出了除去硅器件层712的一部分以提供台面748。图7C示出了除去硅器件层712、BOX层714和硅衬底716的一部分以形成沟槽740。图7D示出了热分流器730的沉积。热分流器730可为光学低损失、高热传导材料(例如，金刚石和氧化铝等，包括其它电介质)。热分流器730还可为电绝缘的。热分流器可接触台面748的侧壁706，并且可穿过硅器件层712和BOX层714延伸以接触侧壁706并从侧壁706将热传递至硅衬底716。图7E示出了在热分流器730中刻蚀沟槽以及内接触件704和外接触件705的沉积。内接触件704和外接触件705可为导电的，例如金属(例如金)。
图8A-8F是根据一个实例制造的绝缘体上硅(SOI)器件的截面视图。图8A示出了包含硅器件层812、掩埋氧化物(BOX)层814和硅衬底816的SOI810。SOI810的各层可选择性地除去(例如，图案化、刻蚀和剥离等)，使得热衬底分流器836可沉积于SOI810中。热衬底分流器836可接触器件层812以将热从器件层812穿过BOX层814传递至硅衬底816。图8A-8F示出了包括器件802的混合结构，器件802可包含可连接至衬底的III-V材料的结构(例如，器件802连接至SOI810以形成混合器件，与之相对照，示于图7A-7E中的非混合器件可由单一衬底形成)。
热衬底分流器836的顶表面可与硅器件层812的顶表面垂直偏移(offset)。此外，热衬底分流器836的顶表面不需要抛光达到严格的公差(这可能与其它混合器件相关，在这些器件中涉及了连接)。对于热衬底分流器836，基于沉积到硅器件层812的热衬底分流器836的材料(例如，氧化铝)，硅器件层812中的热可被有效地排至硅衬底816。因此，热衬底分流器816可在宽松的公差范围内沉积。因此，在步骤图8A中不需要对SOI810的顶表面作这样精细的抛光步骤，而降低了制造复杂性。此外，热衬底分流器836可被定位，使得它不对要连接至SOI810顶表面的器件802提供结构支持。因此，热衬底分流器836的顶部和硅器件层812的顶部之间的垂直偏移存在较大公差。对于热衬底分流器836可使用内孔剥离。
图8B示出了将微环802连接至硅器件层812。根据影响硅器件层812的电子束光刻术和/或干法刻蚀，可在硅器件层812中制备主波导820。器件802(例如，微环)可包括通过高质量晶片连接可被传递至SOI810的III-V获得外延层。用于器件802的实例III-V外延结构可包括InAlGaAs基量子阱周期加上p型掺杂的50nm厚InAlGaAs分别限制异质结构(SCH)层，该限制异质结构(SCH)层夹在110nm厚n型掺杂的InP接触层和p型掺杂的1.5μm厚的InP包层之间。该结构可在SOI810的顶部上连接至350nm厚的硅器件层812。热衬底分流器836和器件802之间可存在腔室，这是因为器件802不依赖热衬底分流器836而用于结构支持，并且热可由热衬底分流器836传递至硅衬底816，即使热衬底分流器836的顶表面不与硅器件层812的顶表面齐平。
图8C示出了穿过BOX层814的图案化和干法刻蚀。例如，可刻蚀掩埋氧化物(BOX)沟槽840以制备BOX层814用于热分流器的沉积。
图8D示出了热分流器830的剥离，和器件802的内腔的图案化。热分流器830可由电介质(例如，氧化铝)制成，以及可由包括电介质分流器832的金属制成。BOX沟槽840穿过BOX层814延伸并且延伸至硅衬底816中。
图8E示出了干法刻蚀、钝化和微加工量子阱(MQW)湿法刻蚀。在器件802中形成内器件沟槽842，并延伸BOX沟槽840以使热有效传递。钝化844应用于外表面(例如，刻蚀了的半导体表面)以保护器件802和各种组件。
图8F示出了内接触件804和外接触件805的剥离。还采用了最终探测垫光刻术。因此，制造了包含热分流器830的器件802，以将热从器件802的侧壁806穿过BOX层814传递至硅衬底816。
图9是基于根据一个实例的从绝缘体上硅(SOI)器件传递热的方法的流程图。在步骤910中，使用热分流器材料将器件的侧壁钝化。将器件设置在SOI的硅器件层上。在步骤920中，穿过SOI的硅器件层和掩埋氧化物层将热分流器材料延伸至SOI的硅衬底，以将热从器件的侧壁传递至硅衬底。因此，热分流器可提供钝化以及从器件的侧壁有效的热传递。
本发明的宽度和范围不得受任何上述实例所限制，而是应当根据以下权利要求及其等同方式加以限定。

Claims (15)

1.一种绝缘体上硅(SOI)器件，包含：
设置在所述SOI的硅器件层上的侧壁，其中所述SOI包含夹在所述硅器件层和硅衬底之间的掩埋氧化物层；以及
热分流器，以接触所述器件的所述侧壁并穿过所述硅器件层和掩埋氧化物层延伸至所述硅衬底，以将热从所述器件的侧壁传递至所述硅衬底。
2.根据权利要求1所述的器件，其中所述热分流器由电介质组成，以接触所述器件而用于表面悬空键钝化。
3.根据权利要求1所述的器件，其中所述热分流器是电绝缘的。
4.根据权利要求1所述的器件，进一步包含与所述热分流器横向位移的热衬底分流器，以穿过所述掩埋氧化物层延伸将热从所述硅器件层穿过所述掩埋氧化物层传递至所述硅衬底。
5.根据权利要求4所述的器件，其中所述热衬底分流器的顶表面在所述硅器件层的顶表面下方偏移。
6.一种光互连件，包含：
光子发生器，连接至绝缘体上硅(SOI)的硅器件层以谐振光模；
掩埋氧化物层，夹在所述硅器件层和硅衬底之间；以及
热分流器，以穿过所述硅器件层和所述掩埋氧化物层从所述光子发生器延伸至所述硅衬底，其中所述热分流器邻近所述光子发生器的侧壁，以将热从所述侧壁传递并且基本上将所述谐振的光模限定在所述光子发生器内。
7.根据权利要求6所述的光互连件，其中所述热分流器为导热的并且与光损耗特性有关，以基本上将所述谐振的光模限定在所述光子发生器内。
8.根据权利要求6所述的光互连件，其中所述热分流器为金刚石。
9.根据权利要求6所述的光互连件，其中所述热分流器为氧化铝。
10.根据权利要求6所述的光互连件，进一步包含波导以谐振光模。
11.一种从绝缘体上硅(SOI)器件传递热的方法，包括：
使用热分流器材料钝化在绝缘体上硅(SOI)的硅器件层上设置的所述器件的刻蚀了的侧壁；以及
穿过所述SOI的硅器件层和掩埋氧化物层将所述热分流器材料延伸至所述SOI的硅衬底，以将热从所述器件的侧壁传递至所述硅衬底。
12.根据权利要求11所述的方法，进一步包括使用所述器件产生光子。
13.根据权利要求11所述的方法，进一步包括使用所述热分流器材料电绝缘所述器件的侧壁。
14.根据权利要求11所述的方法，进一步包括穿过所述硅器件层和所述掩埋氧化物层延伸热衬底分流器，以将热从所述硅器件层穿过所述掩埋氧化物层传递至所述硅衬底。
15.根据权利要求13所述的方法，进一步包括相对于所述侧壁横向偏移所述热衬底分流器以减弱所述器件的较高阶模式。
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