CN103579478B - Make the method for upside-down mounting integrated LED chip level light source module - Google Patents

Make the method for upside-down mounting integrated LED chip level light source module Download PDF

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CN103579478B
CN103579478B CN201310553600.6A CN201310553600A CN103579478B CN 103579478 B CN103579478 B CN 103579478B CN 201310553600 A CN201310553600 A CN 201310553600A CN 103579478 B CN103579478 B CN 103579478B
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CN103579478A (en
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李璟
王国宏
王军喜
李晋闽
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Institute of Semiconductors of CAS
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02458Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2933/0041Processes relating to semiconductor body packages relating to wavelength conversion elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50Wavelength conversion elements

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Abstract

The invention provides a kind of method of making upside-down mounting integrated LED chip level light source module. The method comprises: steps A, at Grown GaN material, forms GaN epitaxial structure; Step B, carries out deep etching technique to GaN epitaxial structure, forms multiple independently little LED material structures; Step C, carries out flip LED chips preparation technology to multiple independently little LED material structures, prepares multiple LED chips, with P electrode and the N electrode of substrate contact; Step D, the P electrode to multiple flip LED chips and N electrode are gone here and there and are connected technique, form flip-chip LED integrated chip; And step e: to substrate polishing, sprayed with fluorescent powder, cuts into many upside-down mounting integrated chips, i.e. upside-down mounting integrated LED chip level light source module. Adopt the upside-down mounting integrated LED chip level light source prepared of the inventive method have good heat dissipation, can large driven current density, light efficiency advantages of higher.

Description

Make the method for upside-down mounting integrated LED chip level light source module
Technical field
The present invention relates to packaging of photoelectric device field, relate in particular to a kind of upside-down mounting integrated LED chip level light source module of makingMethod.
Background technology
LED (light emitting diode) is a kind of junction type electroluminescent semiconductor devices that can convert the electrical signal to optical signal.Solid-state lighting lamp with LED as new light sources, replaces gradually traditional illuminating lamp by having an opportunity and enters common people house. GenerallyThe LED bulb lamp of 3W and 5W can replace the white flag lamp of traditional 60W and 100W. LED light source more than 3W is in LED illuminating productCore. The light efficiency that further improves LED light source can further economize on electricity, reduce costs, and is the unremitting order that LED industry is pursuedMark.
Conventionally adopt many positive cartridge chips of middle great power LED to prepare LED by COB (chiponboard) packaging technologyLight source. As shown in Figure 1, many packed LED chip die bonds are on aluminium base, by gold thread string and get up, glimmering to COB coating of substratesLight powder and embedding silica gel form LED light source. Owing to having crystal-bonding adhesive and Sapphire Substrate between chip light emitting layer and aluminium base, because ofThis heat dispersion is not good, and while driving under large electric current, the Droop effect of LED chip is serious, and light efficiency declines obviously. This LED lightThe light efficiency in source is conventionally in 100lm/W left and right.
Summary of the invention
(1) technical problem that will solve
In view of above-mentioned technical problem, the invention provides a kind of method of making upside-down mounting integrated LED chip level light source module.
(2) technical scheme
According to an aspect of the present invention, provide a kind of method of making upside-down mounting integrated LED chip level light source module. ShouldMethod comprises: steps A, at Grown GaN material, form GaN epitaxial structure, and this GaN epitaxial structure is from bottom to top successivelyComprise: low temperature GaN cushion, the GaN layer that undopes, N-GaN layer, multiple quantum well light emitting layer, P-GaN layer; Step B, to GaN extensionStructure is carried out deep etching technique, forms multiple independently little LED material structures; Step C, to multiple independently little LED material knotsStructure carries out flip LED chips preparation technology, prepares P electrode and the N electrode of multiple LED chips; Step D, to multiple flip LED coresThe P electrode of sheet and N electrode are gone here and there and are connected technique, form flip-chip LED integrated chip; And step e: to substrate polishing, sprayingFluorescent material, cuts into many upside-down mounting integrated chips, i.e. upside-down mounting integrated LED chip level light source module.
(3) beneficial effect
Can find out from technique scheme, the method that the present invention makes upside-down mounting integrated LED chip level light source module hasFollowing beneficial effect:
(1) due to the P of flip LED chips, N electrode directly and substrate contacts, and luminous zone is close to substrate, therefore, adoptsThe upside-down mounting integrated LED chip level light source of preparing by the present embodiment method have good heat dissipation, can large driven current density, light efficiency height etc. is excellentPoint;
(2) because upside-down mounting integrated LED light source is to realize the little chip of upside-down mounting in the light source the superiors by metal evaporation and photoetchingBetween string company, and COB packaged type is to adopt the packed LED chip string the company that realize chip chamber by gold thread, therefore upside-down mountingIntegrated LED light source is without beating gold thread, and electrode connects more reliable;
(3) because upside-down mounting integrated LED light source is to be directly made into chip-scale light source by LED chip preparation technology, thereforeRemove encapsulation step from, made light source volume-diminished, can be greatly cost-saving.
Brief description of the drawings
Fig. 1 is the top view that prior art adopts the LED light source of positive cartridge chip COB packaged type;
Fig. 2 is the flow chart of making upside-down mounting integrated LED chip level light source die prescription method according to the embodiment of the present invention;
Fig. 3 A is the top view of the upside-down mounting integrated LED chip level light source module prepared according to method shown in Fig. 2;
Fig. 3 B is the generalized section of the upside-down mounting integrated LED chip level light source module prepared according to method shown in Fig. 2.
[main element symbol description of the present invention]
1-substrate; 2-low temperature GaN cushion;
The 3-GaN layer that undopes; 4-N-GaN;
41-table top 5-multiple quantum well;
6-P-GaN; 7-P electrode;
8-N electrode; 9-the first insulating barrier;
10-the second insulating barrier; 11-upside-down mounting integrated chip P electrode in parallel;
The 12-upside-down mounting integrated chip PN electrode of connecting; 13-upside-down mounting integrated chip N electrode in parallel;
14-the 3rd insulating barrier; 15-fluorescent material.
Detailed description of the invention
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and referenceAccompanying drawing, the present invention is described in more detail. It should be noted that, in accompanying drawing or description description, similar or identical portionDivide and all use identical figure number. The implementation that does not illustrate in accompanying drawing or describe is those of ordinary skill in affiliated technical fieldKnown to form. In addition, although the demonstration of the parameter that comprises particular value can be provided herein, should be appreciated that, parameter is without definite etc.In corresponding value, but can in acceptable error margin or design constraint, be similar to corresponding value.
The present invention is the first preparation upside-down mounting middle low power LED chip of isolation mutually in Sapphire Substrate, is then owningOn upside-down mounting middle low power LED chip, prepare insulating barrier, by photoetching process by the P of each upside-down mounting middle low power LED chip, N electricityThe utmost point is drawn and connection in series-parallel formation upside-down mounting integrated chip on insulating barrier. Finally, by Sapphire Substrate polishing, sprayed with fluorescent powder, cutsForm an independent grain upside-down mounting integrated LED chip. Prepared upside-down mounting integrated LED chip can be direct as chip-scale light sourceFor low-power LED lighting, also can use as high-power LED light source module by COB packaged type again.
In one exemplary embodiment of the present invention, provide a kind of side that makes upside-down mounting integrated LED chip level light sourceMethod. Fig. 2 is the flow chart of making upside-down mounting integrated LED chip level light source method according to the embodiment of the present invention. Fig. 3 A is for according to Fig. 2 instituteShow the top view of upside-down mounting integrated LED chip level light source prepared by method. Fig. 3 B is that the upside-down mounting of preparing according to method shown in Fig. 2 is integratedThe generalized section of LED chip level light source.
Please refer to Fig. 2, Fig. 3 A and Fig. 3 B, the method that the present embodiment is made upside-down mounting integrated LED chip level light source module comprises:
Steps A, growth GaN material on substrate 1, forms GaN epitaxial structure;
In the present embodiment, substrate 1 is Sapphire Substrate, but the present invention is as limit, this substrate can also be SiC,Si, GaN etc.
In substrate growth GaN material structure art methods, typical method is: adopt Organometallic Chemistry gas phaseThe method of deposition (MOCVD), GaN layer 3, the 3 μ m that undope of low temperature GaN cushion 2, the 1 μ m of the 1 μ m that grows successively on substrate 1N-GaN layer 4, the multiple quantum well light emitting layer 5 of 150nm and the P-GaN layer 6 of 300nm, form GaN epitaxial structure, thereby prepareLED material structure.
Step B, carries out ICP deep etching technique to GaN epitaxial structure, forms multiple independently little on GaN epitaxial structureLED material structure;
This step B further can comprise:
Sub-step B1 adopts PECVD (plasma enhanced CVD method) method deposit on GaN epitaxial structureSiO2Film, as the mask of ICP deep etching;
In this sub-step, the parameters of PECVD is: temperature is 300 DEG C, power 40~70W, and pressure 500~700mtorr,N2O800~1000sccm,SiH4400~600sccm,N2400~600sccm, film thicknessTime 13~26min;
Sub-step B2, at SiO2On film, apply photoresist, photoetching corrosion SiO2, expose the post position of ICP deep etching,Form SiO2Mask; ;
Multiple independently little LED material structures are square or rectangular, and they neatly arrange by ranks on whole substrateCloth.
Sub-step B3, carries out ICP deep etching to GaN epitaxial structure, etches away the GaN epitaxial film of post position, exposes indigo plantJewel substrate, thus GaN epitaxial structure is divided into multiple independently little LED material structures.
In this sub-step, the parameters of ICP deep etching is: etching gas is Cl2、BCl3、Ar2, wherein Cl2Flow is30-100sccm,BCl3Flow is 10-20sccm, Ar2Flow is 15-25sccm; Etching power is 400-700W; Radio-frequency powerFor 100-200W; Etch period is 20~40min; Etching depth 7um.
Step C, carries out flip LED chips preparation technology to multiple independently little LED material structures on GaN epitaxial structure,Prepare P electrode and the N electrode of described LED chip;
This step C further can comprise:
Sub-step C1, continues with SiO2For mask carries out mesa etch to multiple independently little LED material structures, etch awayThe P-GaN layer of one side and multiple quantum well light emitting layer, form table top 41, adopts hydrofluoric acid erosion removal SiO2Mask;
In subsequent step, will on this table top, prepare N electrode. Etching depth 1200nm~the 1500nm of this table top 41,Etch period is 10-15min;
Sub-step C2, the part without mesa etch on multiple independently little LED material structures forms P electrode 7;
In this sub-step, adopt electron-beam vapor deposition method evaporation metal Ni/Ag/Pt/AuAs P face metal ohmic contact and P face speculum. Select negative photoresist L-300 photoetching, without mesa etch multiple solelyOn vertical little LED material structure, form P electrode 7.
Sub-step C3 forms N electrode 8 on table top;
In this sub-step, adopt electron-beam vapor deposition method evaporation metal Cr/Pt/AuSelect negativeType photoresist L-300 photoetching, forms and is positioned at table top 41 N electrode 8 above.
Sub-step C4, adopts PECVD deposit the first insulating barrier SiO2Film 9, film thicknessPhotoetching corrosionSiO2, exposing P, N electrode, multiple independently little LED material structure remainders are by SiO2Institute protects.
Step D, to going here and there between the electrode of multiple flip LED chips and connecting technique, forms flip-chip LED integrated chip;
This step D further can comprise:
Sub-step D1, on multiple flip LED chips, spin coating insulation gel is as photosensitive polyimide or SiO2Gel, doesBe the second insulating barrier 10, through photoetching and etching technics step, expose a part of P electrode 7 and N electrode 8, so as with insulating barrier onElectrode connect;
This photosensitive polyimide or SiO2The thickness 2um of gel, 250 degree solidify.
Sub-step D2, selects negative photoresist L-300 photoetching electrode array connect figure on insulating barrier 10;
Adopt electron-beam vapor deposition method evaporation metal Cr/Pt/AuPeel off rear formation upside-down mounting integratedThe electrode pattern of chip, comprises that upside-down mounting integrated chip P electrode 11 in parallel, upside-down mounting integrated chip PN series connection electrode 12 and upside-down mounting are integratedChip N electrode 13 in parallel.
Sub-step D3, adopts PECVD deposit the 3rd insulating barrier SiO2Film 14, film thicknessPhotoetching corrosionSiO2Film, exposes all electrodes of upside-down mounting integrated chip, and remainder is by SiO2Film is protected.
Step e: to substrate polishing, sprayed with fluorescent powder 15, adopts laser scribing, cuts into many upside-down mounting integrated chips,It is upside-down mounting integrated LED chip level light source module.
Prove after tested, the upside-down mounting integrated LED chip level light source that adopts the present embodiment method to prepare, comparable by positive cartridge chipEncapsulate by COB the conventional light source forming and save cost more than 10%, more than light transmittance efficiency reaches 120lm/W.
So far, by reference to the accompanying drawings the present embodiment be have been described in detail. Those skilled in the art are described according to aboveThe method that should make upside-down mounting integrated LED chip level light source to the present invention has had clearly understanding.
In addition, the above-mentioned definition to each element, method is not limited in various concrete structures, the shape in embodiment, mentionedShape or method, those of ordinary skill in the art can know simply and replace it, for example:
(1) PECVD deposition SiO2Can also adopt the form of sputter;
(2) spin coating the second insulating barrier can also adopt the method for spraying to replace.
In sum, the invention provides a kind of method of making upside-down mounting integrated LED chip level light source. Utilize the method preparationUpside-down mounting integrated chip can be directly used in low-power LED lighting as chip-scale light source, also can seal by COB againDress mode is used as high-power LED light source module, and application mode is very flexible.
Above-described specific embodiment, has carried out further in detail object of the present invention, technical scheme and beneficial effectDescribe in detail brightly, institute it should be understood that and the foregoing is only specific embodiments of the invention, is not limited to the present invention, allWithin the spirit and principles in the present invention, any amendment of making, be equal to replacement, improvement etc., all should be included in guarantor of the present inventionWithin protecting scope.

Claims (9)

1. a method of making upside-down mounting integrated LED chip level light source module, is characterized in that, comprising:
Steps A, at Grown GaN material, forms GaN epitaxial structure;
Step B, carries out deep etching technique to described GaN epitaxial structure, forms multiple independently little LED material structures;
Step C, carries out flip LED chips preparation technology to described multiple independently little LED material structures, prepares multiple LED coresThe P electrode of sheet and N electrode;
Step D, the P electrode to multiple flip LED chips and N electrode are gone here and there and are connected technique, form flip-chip LED integrated chip;And
Step e: to substrate polishing, sprayed with fluorescent powder, cuts into many upside-down mounting integrated chips, i.e. upside-down mounting integrated LED chip levelLight source module;
Wherein, described step D comprises: sub-step D1, on multiple flip LED chips, prepare the second insulating barrier, through photoetching andEtching technics step, exposes a part of P electrode and N electrode; Sub-step D2, on insulating barrier 10, photoetching forms electrode array and connects figureShape; Sub-step D3, deposit the 3rd insulating barrier, photoetching corrosion the 3rd insulating barrier, exposes all electrodes of upside-down mounting integrated chip, all the otherPart is protected by the 3rd insulating barrier.
2. method according to claim 1, is characterized in that, described GaN epitaxial structure comprises from bottom to top successively: low temperatureGaN cushion, the GaN layer that undopes, N-GaN layer, multiple quantum well light emitting layer, P-GaN layer, described step C comprises:
Sub-step C1, carries out mesa etch to multiple independently little LED material structures, etches away P-GaN layer and the volume of a sideSub-trap luminescent layer, forms table top;
Sub-step C2, the position outside multiple independently little the above table position of LED material structure forms P electrode;
Sub-step C3 forms N electrode on described table top; And
Sub-step C4, deposit the first insulating barrier, exposes P electrode and N electrode, multiple independently little LED to the first insulating barrier corrosionMaterial structure remainder is protected by the first insulating barrier.
3. method according to claim 2, is characterized in that, in described step C1, and the etching depth of described table top1200nm~1500nm。
4. method according to claim 2, is characterized in that, described step C2 comprises:
Adopt electron-beam vapor deposition method evaporation Ni/Ag/Pt/Au film;
Select negative photoresist photoetching, on the multiple independently little LED material structure without mesa etch, form P electrode.
5. method according to claim 2, is characterized in that, described step C3 comprises:
Adopt electron-beam vapor deposition method evaporation metal Cr/Pt/Au film;
Select negative photoresist photoetching, on table top, form N electrode.
6. method according to claim 1, is characterized in that, described sub-step D2 comprises:
Adopt electron-beam vapor deposition method evaporation metal Cr/Pt/Au film;
After Metal Cr/Pt/Au film of predeterminated position is peeled off, form the electrode pattern of upside-down mounting integrated chip, this electrode patternComprise upside-down mounting integrated chip P electrode in parallel, upside-down mounting integrated chip PN series connection electrode and upside-down mounting integrated chip N electrode in parallel.
7. method according to claim 1, is characterized in that, the material of described the second insulating barrier is photosensitive polyimideOr SiO2Gel.
8. according to the method described in any one in claim 1 to 7, it is characterized in that, described step B comprises:
Sub-step B1, deposit SiO on described GaN epitaxial structure2Film, as the mask of ICP deep etching;
Sub-step B2, at described SiO2On film, apply photoresist, photoetching corrosion SiO2, expose the post position of ICP deep etching,Form SiO2Mask; And
Sub-step B3, utilizes described SiO2Mask carries out ICP deep etching to described GaN epitaxial structure, etches away post positionGaN epitaxial material, exposes substrate, thereby described GaN epitaxial structure is divided into multiple independently little LED material structures.
9. according to the method described in any one in claim 1 to 7, it is characterized in that, the material of described substrate is: sapphire,SiC, Si or GaN.
CN201310553600.6A 2013-11-08 2013-11-08 Make the method for upside-down mounting integrated LED chip level light source module Active CN103579478B (en)

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CN105226155B (en) * 2014-05-30 2018-02-23 无锡极目科技有限公司 Direct epitaxy growth LED method and application on laminated circuit board
CN104485401B (en) * 2014-12-17 2017-09-12 聚灿光电科技股份有限公司 GaN base flip LED micro display structure and preparation method thereof

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CN101076900A (en) * 2004-12-14 2007-11-21 首尔Opto仪器股份有限公司 Light emitting device with multiple light emitting units and package for mounting the same light emitting device
CN101859849A (en) * 2009-04-10 2010-10-13 亿光电子工业股份有限公司 Light emitting diode device and method for forming the same

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US8368114B2 (en) * 2007-05-18 2013-02-05 Chiuchung Yang Flip chip LED die and array thereof
CN202957291U (en) * 2012-11-16 2013-05-29 聚灿光电科技(苏州)有限公司 High-power COB (Chip on Board) packing LED (Light Emitting Diode) structure

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Publication number Priority date Publication date Assignee Title
CN101076900A (en) * 2004-12-14 2007-11-21 首尔Opto仪器股份有限公司 Light emitting device with multiple light emitting units and package for mounting the same light emitting device
CN101859849A (en) * 2009-04-10 2010-10-13 亿光电子工业股份有限公司 Light emitting diode device and method for forming the same

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