CN103531657A - Preparation method for polycrystal/monocrystal-like solar cell selective emitting electrode structure - Google Patents
Preparation method for polycrystal/monocrystal-like solar cell selective emitting electrode structure Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 23
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 52
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 52
- 239000010703 silicon Substances 0.000 claims abstract description 52
- 238000000034 method Methods 0.000 claims abstract description 39
- 238000001020 plasma etching Methods 0.000 claims abstract description 26
- 238000009792 diffusion process Methods 0.000 claims abstract description 14
- 238000005516 engineering process Methods 0.000 claims abstract description 14
- 238000002310 reflectometry Methods 0.000 claims abstract description 11
- 230000007797 corrosion Effects 0.000 claims abstract description 8
- 238000005260 corrosion Methods 0.000 claims abstract description 8
- 239000000126 substance Substances 0.000 claims abstract description 8
- 238000000151 deposition Methods 0.000 claims description 13
- 229910004205 SiNX Inorganic materials 0.000 claims description 11
- 230000008021 deposition Effects 0.000 claims description 11
- 239000002002 slurry Substances 0.000 claims description 11
- 238000007650 screen-printing Methods 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 9
- 230000006378 damage Effects 0.000 claims description 8
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 8
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 6
- KVBCYCWRDBDGBG-UHFFFAOYSA-N azane;dihydrofluoride Chemical compound [NH4+].F.[F-] KVBCYCWRDBDGBG-UHFFFAOYSA-N 0.000 claims description 6
- 239000011701 zinc Substances 0.000 claims description 6
- 229910020286 SiOxNy Inorganic materials 0.000 claims description 5
- 239000003795 chemical substances by application Substances 0.000 claims description 5
- 238000004513 sizing Methods 0.000 claims description 5
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims description 4
- 239000002253 acid Substances 0.000 claims description 4
- 238000004062 sedimentation Methods 0.000 claims description 4
- 229910052725 zinc Inorganic materials 0.000 claims description 4
- 238000007641 inkjet printing Methods 0.000 claims description 3
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 3
- 238000005507 spraying Methods 0.000 claims description 3
- 238000001311 chemical methods and process Methods 0.000 claims description 2
- 238000005229 chemical vapour deposition Methods 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000007254 oxidation reaction Methods 0.000 claims description 2
- 239000002243 precursor Substances 0.000 claims description 2
- 238000007613 slurry method Methods 0.000 claims description 2
- SBEQWOXEGHQIMW-UHFFFAOYSA-N silicon Chemical compound [Si].[Si] SBEQWOXEGHQIMW-UHFFFAOYSA-N 0.000 claims 1
- 238000004544 sputter deposition Methods 0.000 claims 1
- 238000005530 etching Methods 0.000 abstract description 6
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 238000006243 chemical reaction Methods 0.000 abstract description 3
- 238000007704 wet chemistry method Methods 0.000 abstract description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 18
- 239000011787 zinc oxide Substances 0.000 description 9
- 238000012545 processing Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 239000003518 caustics Substances 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000010307 cell transformation Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 235000008216 herbs Nutrition 0.000 description 2
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 238000000992 sputter etching Methods 0.000 description 2
- 230000009466 transformation Effects 0.000 description 2
- 210000002268 wool Anatomy 0.000 description 2
- 229960001296 zinc oxide Drugs 0.000 description 2
- 206010061245 Internal injury Diseases 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 241000084978 Rena Species 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005587 bubbling Effects 0.000 description 1
- 230000011712 cell development Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000035484 reaction time Effects 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a preparation method for a polycrystal/monocrystal-like solar cell selective emitting electrode structure. The preparation method for the polycrystal/monocrystal-like solar cell selective emitting electrode structure comprises the following steps: (1) chemically removing a surface energy affected layer; (2) carrying out heavy doping by the one-time diffusion technology to form a PN junction; (3) growing or forming a dielectric layer or a mask layer on the surface of a silicon wafer; (4) corroding the dielectric layer of a non-electrode grid line area with a chemical corrosion method, and keeping the mask layer under an electrode grid line area; (5) etching a pyramid matte structure of 100-300nm in the non-electrode grid line area by reactive ion etching (RIE), and meanwhile, forming a shallow doped area in one time; and (6) removing a surface affected layer formed by RIE and a lower mask layer under the electrode grid line area with a wet chemistry method to obtain the selective emitting electrode structure. According to the preparation method for the polycrystal/monocrystal-like solar cell selective emitting electrode structure, which is disclosed by the invention, the light doping and the heavy doping required by the selective emitting electrode polycrystal/monocrystal-like solar cell and a low-reflectivity nanoscale surface texture can be finished by one-time diffusion combined with the RIE technology, the process path is simplified, the conversion efficiency is high, and the preparation method for the polycrystal/monocrystal-like solar cell selective emitting electrode structure is suitable for industrial volume production.
Description
Technical field:
The present invention relates to a kind of preparation method of crystal silicon solar energy battery, be specifically related to a kind of preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure.
Background technology:
The process for etching of polysilicon solar cell always is the acid etch system that adopts HF/HNO3, and making herbs into wool reflectivity is 20% left and right, progressively becomes the bottleneck technique of polycrystal silicon cell development; Class monocrystalline silicon refers to by the transformation to polycrystalline processing procedure, under raw material quality is constant, polycrystalline is made to the Silicon Wafer quality of single crystal-like.But due to grain size and number of grain boundaries, to be drawn process technology limit uneven, cannot accurately control, and causes the process for etching of class monocrystalline to have difficult point.And RIE (reactive ion etching) process using SF
6and O
2and Cl
2dry etching system, by can realize 1%～20% matte reflectivity to the control of technological parameter, this has increased the light absorption of battery to a great extent; But in the time of RIE making herbs into wool, can produce certain damage layer, need to coordinate HF/HNO
3the damage of going process the lifting realize battery efficiency.
CN201010233421 the invention discloses a kind of preparation method of selective emitting electrode structure of crystalline silicon solar battery, at crystal silicon chip uniform deposition zinc-oxide film, by chemical corrosion method, on zinc-oxide film, corrode again and form electrode window through ray, then by electrode window through ray, make heavily doped region and the shallow doped region of selective emitting electrode structure.The method is not easy to form high-quality matte texture.
Selective emitter solar battery requires the silicon face in Metal Contact district to form dense diffusion region, and the potential barrier that concentration difference forms is repelled the effect of minority carrier, thereby reduces here compound.But not the daylighting emitter region of Metal Contact wishes lighter diffusion (so-called shallow diffusion region), the loss causing to reduce surperficial dead layer.Another advantage of selective emitting electrode structure is that the silicon face of denseer doping is less to the contact resistance of metal.
Applicant's CSUN-US Nanjing company between 2007-2008, take the lead in the world exploitation, produced selection emitter solar battery (patent publication No.: 101101936), take its typical process flow that is representative as follows: 1. remove damaged layer on surface of silicon slice and form matte structure; 2. heat growth silicon dioxide is done barrier layer; 3. the formation electrode window through ray of windowing; 4. high concentration heavily expands; 5. remove silicon dioxide layer; 6. low concentration gently expands; 7. remove periphery and back side PN junction; The passivation of 8.PECVD deposition, anti-reflection layer; 9. aiming at optionally emitter prints positive and negative electrode and carries on the back electric field and carry out sintering.Adopt the method to produce and select the cost of emitter battery greatly to reduce, but the method has adopted the multiple high temp heat treatment process such as diffusion and oxidation, processing step is more complicated still, and all larger to the internal injury of silicon chip and energy consumption, cost is still high than current common process solar cell.
Summary of the invention:
The present invention seeks to propose a kind of preparation method who is suitable for polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure of commercial Application, and can prepare high-quality matte texture, simplify technique, improve battery efficiency, lower production cost.
For achieving the above object, the technical solution used in the present invention is: a kind of preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure, comprises the following steps: (1) chemistry is removed surface can damage layer; (2) adopt One Diffusion Process technique to carry out heavy doping, form PN junction; (3) silicon chip surface growth or formation dielectric layer or mask layer, mask bed thickness 20-300nm, as SiO
2, SiNx, SiOxNy, Al
2o
3or ZnO mask layer; (4) chemical corrosion method corrodes the dielectric layer in non-gate electrode line district and retains the mask layer under gate electrode line district, as used screen printing sizing agent corrosion or ink jet printing slurry methods to retain the mask layer under gate electrode line district; (5) utilize reactive ion etching RIEFei gate electrode line district to etch the pyramid suede structure of 100-300nm, simultaneously the shallow doped region of disposable formation; (6) use the surface damage layer of the disposable removal reactive ion etching formation of wet-chemical technique and the SiO under gate electrode line district
2, SiNx, SiOxNy, Al
2o
3or ZnO mask layer, obtain selective emitting electrode structure; (7) can further remove periphery and back side PN junction.
The invention has the beneficial effects as follows: the preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitter of proposition, adopt One Diffusion Process association reaction ion etching technology just can disposablely complete selective emitter polycrystalline/class single crystal silicon solar cell required weight doping and antiradar reflectivity nanoscale Surface Texture, reduced high-temperature process, simplified processing route, and cost reduces greatly, polycrystalline/class monocrystaline silicon solar cell transformation efficiency high (higher than current common production technology), be applicable to selecting emitter polycrystalline/class monocrystaline silicon solar cell industrialization volume production.
Accompanying drawing explanation
Fig. 1 is matte texture photo prepared by the present invention.
Embodiment
Embodiment 1
Step 1: layer can be damaged in described removal surface, step is corroded after 80-100s for polysilicon chip being put into the sodium hydroxide solution that the mass concentration of 85-90 ℃ is 20%, in deionized water, bubbling cleans 200s, afterwards respectively at 1#, and heated wash 360s in 2# cleaning fluid.Or other conventional corrosion adds cleaning method and also can.
Step 2: described heavy doping step is for adopting conventional tubular type method of diffusion at 850-950 ℃ of temperature the silicon chip cleaning after drying, adopt phosphorus oxychloride as phosphorous diffusion source, pass into nitrogen and oxygen mixed gas that volume ratio is 14:1 simultaneously, be 10-30min diffusion time, diffused sheet resistance is 10-30 Ω/, after in the HF of 1-5% mass concentration acid solution, under normal temperature, soak 20-200s, to remove the PSG of silicon face.
Step 3: described in silicon chip surface growth or form dielectric layer or mask layer, if PECVD technology is at the silicon chip surface SiO that grows
2film, step is for being used conventional plasma enhanced chemical vapor deposition method at the thick SiO of silicon chip surface deposition 200-300nm
2thin layer.Depositing temperature is 100-250 ℃, and radio-frequency power is 200w, and SiH4 flow is 20-40sccm, N
2o flow is 20-30sccm, and deposition pressure is 0.5-20Pa, and sedimentation time is 200-300s.
Step 4: the step that described screen printing sizing agent caustic solution retains the mask layer under gate electrode line district is: adopt screen printing technique at SiO
2on thin layer, printing one deck concentration is 10-25% ammonium acid fluoride corrosivity slurry, and standing 400-1000s, makes slurry fully erode the SiO in non-gate electrode line district
2thin layer, retains the SiO under gate electrode line district
2as mask layer.
Step 5: the step of described reactive ion etching is to adopt SF
6/ O
2reactive ion etching system, SF
6/ O
2flow-rate ratio is 0.4-0.5, operating pressure 10-20Pa, radio-frequency power 100w-30kw, etch period 1-5min, matte pyramid size 100-150nm, reflectivity 8%-12%.
Step 6: the sheet resistance that described non-gate electrode line district forms shallow doped region after reactive ion etching is controlled at 80～100 Ω/.
Step 7: described wet chemistry method refers to the HF acid solution soak at room temperature 200-1000s that silicon chip is placed in to 1-5%, the surface damage layer that disposable removal reactive ion etching forms and the SiO under gate electrode line district
2mask layer.
Step 8: further, can remove periphery and back side PN junction step and tie at the P-N of silicon chip surrounding and back side formation for adopting RENA wet etching technique to remove in diffusion process, prevent edge current leakage.
Class monocrystalline also obtains identical result, the same prior art of process conditions of main sub-step.
Embodiment 2
Step 1, step 2 are same as.
Step 3: described grows or form dielectric layer or mask layer at silicon chip surface, and as used MOCVD deposition ZnO film, step is for use Metalorganic Chemical Vapor Deposition is at the thick ZnO film of silicon chip surface deposition 50-300nm.Use the DPM complex Zn(DPM containing zinc) 2 precursor as zinc, in 10-50Torr pressure limit and 400-600 ℃ of temperature range, sedimentation time is 15-100min.
Step 4: the step that described screen printing sizing agent caustic solution retains mask layer under gate electrode line district is: adopting silk screen printing to print one deck concentration on ZnO thin layer is 10-25% ammonium acid fluoride corrosivity slurry, standing 400-1000s, make slurry fully erode the ZnO thin layer in non-gate electrode line district, the ZnO under reservation gate electrode line district is as mask layer.
Step 5: the step of described reactive ion etching is to adopt SF
6/ O
2reactive ion etching system, SF
6/ O
2flow-rate ratio is 0.4-0.5, operating pressure 10-20Pa, radio-frequency power 100w-30kw, etch period 1-10min, matte pyramid size 150-200nm, reflectivity 8%-12%.The time of etching is relevant with the degree of depth and mask thicknesses, is generally directly proportional relation.
Step 6, step 7 and step 8 are same as.
Embodiment 3
Step 1, step 2 are same as.
Step 3: described grows or form dielectric layer or mask layer at silicon chip surface, and as adopted PECVD technology at silicon chip surface growth SiNx mask layer, step is the SiNx mask layer of employing PECVD technology at silicon chip surface growth 200-300nm.SiH
4flow is 600-700sccm, NH
3flow is 1400-1500sccm, and operating pressure is 0.1-0.3mbar, technological temperature 300-500 ℃, discharge frequency 2450MHz, discharge power 2000-3500w, discharge time 450-900s.
Step 4: adopt ink-jet printing technology, by concentration, be that 10-25% ammonium acid fluoride corrosivity pulp spraying is coated in non-gate electrode line district, standing 500-1200s, makes slurry fully erode the SiNx thin layer in non-gate electrode line district, and the SiNx under reservation gate electrode line district is as mask layer; Or directly with screen printing technique, on SiNx thin layer, print one deck corrosivity slurry.
Step 5: the step of described reactive ion etching is to adopt the reactive ion etching system of SF6/O2, SF
6/ O
2flow-rate ratio is 1-4, operating pressure 10-20Pa, radio-frequency power 100w-30kw, etch period 5-10min, matte pyramid size 200-250nm, reflectivity 8%-12%.Reference example 2.
Step 6, step 7 and step 8 are same as.
Embodiment 4
Step 1, step 2 are same as.
Step 3: described grows or form dielectric layer or mask layer at silicon chip surface, as adopted radio frequency magnetron reactive sputtering technology at the Al of silicon chip surface growth 200-300nm
2o
3mask layer, Ar flow 10-30sccm, O
2flow 0-3sccm, radio-frequency power 100-400w, pressure is 0.15-1Pa, target-substrate distance 50-100mm, reaction time 1-10min.
Step 4: the step that described screen printing sizing agent caustic solution retains the mask layer under gate electrode line district is: adopt screen printing technique at Al
2o
3on thin layer, printing one deck concentration is 10-25% ammonium acid fluoride corrosivity slurry, and standing 400-1000s, makes slurry fully erode the Al in non-gate electrode line district
2o
3thin layer, retains the Al under gate electrode line district
2o
3as mask layer.
Step 5: the step of described reactive ion etching is to adopt SF
6/ O
2reactive ion etching system, SF
6/ O
2flow-rate ratio is 1-4, operating pressure 10-20Pa, radio-frequency power 100w-30kw, etch period 5-15min, matte pyramid size 250-300nm, reflectivity 8%-12%.
Step 6, step 7 and step 8 are same as.
Table 1:
As can be seen from Table 1: etching matte pyramid size is when 100-300nm changes, and the variation tendency of battery efficiency is for first raising and reduce afterwards, and when 200-250nm, reaches maximum, compared with normal is evenly tied polycrystal silicon cell efficiency and is improved 0.7-0.8%.
In a word, the preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitter provided by the invention, it is advantageous that: adopt One Diffusion Process association reaction ion etching technology just can disposablely complete selective emitter polycrystalline silicon solar cell required weight doping and antiradar reflectivity nanoscale Surface Texture, reduced high-temperature processing technology process, the pyramidal size 100-300nm of etching matte, reflectivity 8%-12% or lower has formed high-quality shallow doped region simultaneously.Simplified processing route, polycrystalline/class monocrystaline silicon solar cell transformation efficiency is high, is applicable to selecting emitter polycrystalline/class monocrystaline silicon solar cell industrialization volume production.
Above-described embodiment does not limit the present invention in any form, and all employings are equal to replaces or technical scheme that the mode of equivalent transformation obtains, does not all exceed protection scope of the present invention.
Claims (10)
1. a preparation method for polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure, is characterized in that comprising the following steps (1) chemical surface of removing polycrystalline/class monocrystalline silicon silicon chip and can damage layer; (2) to silicon chip surface, adopt One Diffusion Process technique to carry out heavy doping, form PN junction; (3) silicon chip surface growth or formation dielectric layer or mask layer, mask bed thickness 20-300nm; (4) chemical corrosion method corrodes the mask layer in non-gate electrode line district and retains the mask layer under gate electrode line district; (5) utilize reactive ion etching RIEFei gate electrode line district to etch the pyramid suede structure of 100-300nm, simultaneously the shallow doped region of disposable formation; (6) mask layer under the surface damage layer that the disposable removal reactive ion etching of use wet chemical method forms and gate electrode line district, obtains selective emitting electrode structure.
2. the preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure according to claim 1, is characterized in that the growth of step (3) silicon chip surface or formation dielectric layer or mask layer are adopt PECVD, MOCVD, thermal oxidation or sputtering technology in silicon chip surface growth or form SiO
2, SiNx, SiOxNy, Al
2o
3or ZnO dielectric layer or mask layer.
3. the preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure according to claim 1, is characterized in that step (4) chemical corrosion method corrodes the dielectric layer in non-gate electrode line district and retains dielectric layer under gate electrode line district or the method for mask layer is: use screen printing sizing agent burn into light sensitve exposing method to cover corrosive slurry or print spraying corrosive slurry method and corrodes dielectric layer or the mask layer in non-gate electrode line district and retain dielectric layer or the mask layer under gate electrode line district.
4. the preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure according to claim 1, it is characterized in that step (5) utilizes reactive ion etching RIEFei gate electrode line district to etch the pyramid suede structure of 100-300nm, simultaneously the shallow doped region of disposable formation.
5. the preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure according to claim 4, is characterized in that step (5): the sheet resistance that described non-gate electrode line district forms shallow doped region after reactive ion etching is controlled at 80～100 Ω/.
6. the preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure according to claim 1, it is characterized in that, described wet-chemical technique refers to silicon chip is placed under the HF acid solution normal temperature of 1-5% and soaks 200-1000s, the surface damage layer that disposable removal reactive ion etching forms and the mask layer under gate electrode line district.
7. the preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure according to claim 1, is characterized in that step (3): described PECVD deposition SiO
2film step is to use conventional plasma enhanced chemical vapor deposition method at the thick SiO of silicon chip surface deposition 200-300nm
2thin layer; Depositing temperature is 100-250 ℃, and radio-frequency power is 200w, SiH
4flow is 20-40sccm, N
2o flow is 20-30sccm, and deposition pressure is 0.5-20Pa, and sedimentation time is 200-300s, SiO
2thickness of thin layer is controlled at 200-300nm.
8. the preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure according to claim 1, it is characterized in that in step (3): described MOCVD deposition ZnO film step is to use Metalorganic Chemical Vapor Deposition at the thick ZnO film of silicon chip surface deposition 50-300nm; Use the DPM complex Zn(DPM containing zinc) 2 precursor as zinc, in 10-50Torr pressure limit and 400-600 ℃ of temperature range, sedimentation time is 15-100min, ZnO thickness of thin layer is controlled at 50-300nm.
9. the preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure according to claim 1, is characterized in that step (5): the step of described reactive ion etching is to adopt SF
6/ O
2reactive ion etching system, SF
6/ O
2flow-rate ratio is 0.4-0.5, operating pressure 10-20Pa, radio-frequency power 100w-30kw, etch period 1-5min, matte pyramid size 100-300nm, reflectivity 8%-12%.
10. the preparation method of polycrystalline/class monocrystaline silicon solar cell selective emitting electrode structure according to claim 3, it is characterized in that chemical corrosion method in step (4) corrode non-gate electrode line district dielectric layer and retain the mask layer under gate electrode line district; The method of ink jet printing, the corrosivity pulp spraying that is 10-25% ammonium acid fluoride by concentration is coated in non-gate electrode line district, and standing 500-1200s makes slurry fully erode the SiO in non-gate electrode line district
2, SiNx, SiOxN
y, AL
2o
3or ZnO thin layer, retain the SiO under gate electrode line district
2, SiNx, SiOxNy, AL
2o
3or ZnO is as mask layer; Or directly use screen printing technique at SiO
2, SiNx, SiOxNy, AL
2o
3or on ZnO thin layer, print the corrosivity slurry that one deck concentration is 10-25% ammonium acid fluoride.
Priority Applications (1)
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