CN103455452B - The method of a kind of usb data collection, Apparatus and system - Google Patents
The method of a kind of usb data collection, Apparatus and system Download PDFInfo
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Abstract
The invention discloses a kind of method that usb data gathers, including: the data constantly collected are stored in first group of SDRAM by S1.；S2. judge whether described first group SDRAM is filled with, if so, enter step S3, if it is not, return step S1；S3. first group of described SDRAM data are read back, the new data constantly collected is stored in second group of SDRAM meanwhile；S4. judge whether described second group SDRAM is filled with, if so, enter step S5, if it is not, return step S3；S5. second group of described SDRAM data are read back.The invention also discloses the Apparatus and system that usb data gathers.Implement the present invention, use SDRAM as data buffer storage, on the one hand ensure that bandwidth and the degree of depth of data storage, the hardware cost that another aspect greatly reduces that data stores.
Description
Technical field
The present invention relates to usb data gather field, be specifically related to a kind of usb data gather method, device and
System.
Background technology
USB, is the abbreviation of English Universal Serial BUS (USB (universal serial bus)), and its Chinese letter
It is referred to as " logical getting lines crossed, being an external bus standard, for being connected and communicate with of specification computer and external equipment.
It is to apply the interfacing in PC field.USB uses quadded cable, and wherein two are used to transmit data
Serial-port, another two is that downstream (Downstream) equipment provides power supply, at a high speed and need high-band
Wide peripheral hardware, USB is with the transmission data of full speed 12Mbps；For low-speed peripheral, USB is then with 1.5Mbps
Transfer rate transmit data.Usb bus can according to peripheral hardware situation in two kinds of transmission modes dynamic
Conversion.USB is bus based on token.It is similar to token-ring network or FDDI bus based on token.USB
Master controller broadcast token, in bus, whether the address in equipment Inspection token is consistent with self, by receiving
Or send data to main frame and respond.USB is by supporting that suspension/recovery operation manages usb bus power supply.
USB system uses cascaded star topology, and this topology is made up of three essential parts: main frame (Host), line concentration
Device (Hub) and function device.
The usb data acquisition system scheme of existing a lot of maturation, uses one with USB controller as simple
MCU can complete usb data collection, although this scheme simple in construction with low cost, but due to MCU's
Internal memory is less, and the speed of service is relatively slow, and therefore picking rate and transmission are the most very limited, is difficult to tackle at a high speed
Data acquisition demand.More conventional usb data acquisition system scheme is fpga chip+USB controller+SRAM
Structure, wherein: FPGA (Field-Programmable Gate Array), i.e. field programmable gate
Array, it is the product of development further on the basis of the programming devices such as PAL, GAL, CPLD, and it is
Occur as a kind of semi-custom circuit in special IC (ASIC) field, both solved customization
The deficiency of circuit, overcomes again the shortcoming that original programming device gate circuit number is limited；SRAM is English Static
The abbreviation of RAM, it is a kind of internal memory with static access facility, it is not necessary to refreshes circuit and can preserve in it
The data of portion's storage.This scheme can realize data acquisition at a high speed, but along with storage depth is required not
Disconnected raising, the cost of SRAM will increase with exponential law.
Summary of the invention
In order to solve above technical problem, the present invention provides method, the device of a kind of usb data collection and is
System.
The invention discloses a kind of method that usb data gathers, including:
S1. the data constantly collected are stored in first group of SDRAM；
S2. judge whether described first group SDRAM is filled with, if so, enter step S3, if it is not, return
Step S1；
S3. first group of described SDRAM data are read back, meanwhile, the new data storage that will constantly collect
In second group of SDRAM；
S4. judge whether described second group SDRAM is filled with, if so, enter step S5, if it is not, return
Step S3；
S5. second group of described SDRAM data are read back.
In the method that usb data of the present invention gathers, also include between described step S2 and S3
Step: first group of SDRAM of S21. set is filled with mark.
In the method that usb data of the present invention gathers, also include between described step S3 and S4
Step: S31. removes first group of SDRAM and is filled with mark.
In the method that usb data of the present invention gathers, also include between described step S4 and S5
Step: second group of SDRAM of S41. set is filled with mark.
In the method that usb data of the present invention gathers, after described step S5, further comprise the steps of: S6.
Remove second group of SDRAM be filled with mark and return step S1.
The invention discloses the device that a kind of usb data gathers, including:
First group of SDRAM unit: for the data constantly collected are stored in first group of SDRAM；
First group of SDRAM is filled with judging unit: is connected with first group of described SDRAM unit, is used for judging
Whether first group of described SDRAM is filled with；
First group of SDRAM data is read back and second group of SDRAM unit, is filled with first group of described SDRAM
Judging unit is connected, for reading back, first group of described SDRAM data meanwhile, by constantly collect
New data is stored in second group of SDRAM；
Second group of SDRAM is filled with judging unit, reads back and second group of SDRAM with first group of described SDRAM
Unit is connected, for judging whether described second group SDRAM is filled with；
Second group of SDRAM data is read back unit, is filled with judging unit with second group of described SDRAM and is connected,
For second group of described SDRAM data are read back.
In the device that usb data of the present invention gathers, read back in first group of described SDRAM data
And second group of SDRAM unit and first group of SDRAM are filled with between judging unit and there is also first group of SDRAM and put
Bit location, is filled with mark for first group of SDRAM of set；Read back in first group of described SDRAM data and
Second group of SDRAM unit and second group of SDRAM are filled with between judging unit and there is also first group of clear position of SDRAM
Unit, is filled with mark for removing first group of SDRAM.
In the device that usb data of the present invention gathers, it is single that second group of described SDRAM is filled with judgement
Unit and second group of SDRAM data are read back and be there is also second group of SDRAM set unit between unit, for set
Second group of SDRAM is filled with mark, there is also second after second group of described SDRAM data read back unit
The group clear bit location of SDRAM, is filled with mark and to be back to first group of SDRAM mono-for removing second group of SDRAM
Unit.
The invention discloses the system that a kind of usb data gathers, including USB controller, for controlling data
Gather, the usb data controller that stores and transmit, first group of SDRAM, second group of SDRAM, for electricity
The signal conditioning circuit that flat turn is changed, described USB controller, first group of SDRAM, second group of SDRAM, letter
Number modulate circuit is all connected with usb data controller, and described usb data controller has claim 6
The device that described usb data gathers.
In the system that usb data of the present invention gathers, first group of described SDRAM, second group of SDRAM
At least include a piece of SDRAM chip.
Implement method, Apparatus and system that a kind of usb data of the present invention gathers, there is following useful skill
Art effect:
Two groups of SDRAM can alternately store data, it is ensured that when the transmission of data acquisition and data is carried out simultaneously
Do not produce the read/write conflict of SDRAM, it is possible to complete continuous data collection very easily, more effectively utilize PC
The storage resource of machine, it is achieved data record for a long time.Owing to employing SDRAM is as data buffer storage, a side
Face ensure that the bandwidth and the degree of depth of data storage that data store, and on the other hand greatly reduces the cost of hardware.
Accompanying drawing explanation
Fig. 1 is the method flow diagram that embodiment of the present invention usb data gathers；
Fig. 2 is the device block diagram that embodiment of the present invention usb data gathers；
Fig. 3 is the system block diagram that embodiment of the present invention usb data gathers；
Fig. 4 is the functional block diagram of FPGA of the present invention.
Detailed description of the invention
By describing the technology contents of the present invention, structural feature in detail, being realized purpose and effect, below in conjunction with reality
Execute mode and coordinate accompanying drawing to be explained in detail.
SDRAM: i.e.: Synchronous Dynamic Random Access Memory, synchronous dynamic random is deposited
Reservoir, synchronizes to refer to Memory job demand synchronised clock, and the transmission of internal order is with the transmission of data all
On the basis of it；Dynamically refer to that storage array needs constantly refreshing to ensure that data are not lost；Refer at random
Data are not linearly to store successively, but freely specify address to carry out reading and writing data.
The structure of this programme is fpga chip+high speed USB 2.0 controller+two group SDRAM, additionally includes signal
Modulate circuit, wherein FPGA be used for the collection of data, storage and with USB2.0 controller transmission
Bridge joint, high speed USB 2.0 controller is for realizing the USB high-speed data between PC and data collecting system
Transmission, two groups of SDRAM for alternately caching the data collected, direct defeated with outside of signal conditioning circuit
Enter signal to be connected, on the one hand for protecting the IO of fpga chip, on the other hand for level conversion.
Refer to Fig. 1, the method for a kind of usb data collection, including:
S1. the data constantly collected are stored in first group of SDRAM；
S2. judge whether described first group SDRAM is filled with, if so, enter step S3, if it is not, return
Step S1；
S3. first group of described SDRAM data are read back, meanwhile, the new data storage that will constantly collect
In second group of SDRAM；
S4. judge whether described second group SDRAM is filled with, if so, enter step S5, if it is not, return
Step S3；
S5. second group of described SDRAM data are read back.
It is filled with it is preferred that further comprise the steps of: first group of SDRAM of S21. set between described step S2 and S3
Mark, further comprises the steps of: S31. and removes first group of SDRAM and be filled with mark between described step S3 and S4.
It is filled with it is preferred that further comprise the steps of: second group of SDRAM of S41. set between described step S4 and S5
Mark, further comprise the steps of: after described step S5 S6. remove second group of SDRAM be filled with mark and return
Step S1.
The operation of system is controlled by USB by PC, and PC can read the fortune of acquisition system by USB
Row status information and collect data, meanwhile, PC can also send instruction by USB to acquisition system.
In data acquisition, first PC sends to acquisition system and starts order, and acquisition system receives startup
The data collected can be stored in first group of SDRAM after order, after first group of SDRAM is filled with, gather
System can set " first group of SDRAM is filled with mark ", in second group of SDRAM, then store data, the
After two groups of SDRAM are filled with, acquisition system can set " second group of SDRAM is filled with mark ".Meanwhile, PC
Data in first group of SDRAM can be read back, so after inquiring " first group of SDRAM is filled with mark " by machine
Rear removing " first group of SDRAM is filled with mark ", PC after inquiring " second group of SDRAM is filled with mark ",
Data in second group of SDRAM can be read back, then remove " second group of SDRAM is filled with mark ".The most anti-
Carry out, if PC inquires " first group of SDRAM is filled with mark " and " second group of SDRAM deposits simultaneously again
Full scale will ", then it represents that the storage speed of the data transmission speed more than USB, PC now can be given to make mistake and carry
Show.By reasonably design, as appropriately selected sample frequency, improve the means such as USB transmission efficiency, permissible
Avoid the generation of this kind of situation.
In this programme, the collection of data, storage, the control of SDRAM and system are connect by high speed USB 2.0
Mouthful and PC between the logical process work such as mutual completed by FPGA, therefore FPGA is whole system
Core.
Refer to Fig. 2, the device of a kind of usb data collection, including:
10, first group of SDRAM of first group of SDRAM unit is filled with 20, first group of SDRAM data of judging unit
Read back and 30, second group of SDRAM of second group of SDRAM unit is filled with 40, second group of SDRAM number of judging unit
According to the unit 50 that reads back.
First group of SDRAM unit 10: for the data constantly collected are stored in first group of SDRAM；
First group of SDRAM is filled with judging unit 20: be connected with first group of SDRAM unit 10, is used for judging institute
Whether the first group of SDRAM stated is filled with；
First group of SDRAM data is read back and second group of SDRAM unit 30, is filled with judgement with first group of SDRAM
Unit 20 is connected, for first group of described SDRAM data being read back, meanwhile, new by constantly collect
Data are stored in second group of SDRAM；
Second group of SDRAM is filled with judging unit 40, reads back with first group of SDRAM and second group of SDRAM unit
30 are connected, for judging whether described second group SDRAM is filled with；
Second group of SDRAM data is read back unit 50, is filled with judging unit 40 with second group of SDRAM and is connected, and uses
In second group of described SDRAM data are read back.
It is preferred that read back and second group of SDRAM unit 30 and first group of SDRAM first group of SDRAM data
It is filled with between judging unit 20 and there is also first group of SDRAM set unit 25, for first group of SDRAM of set
It is filled with mark；First group of SDRAM data are read back and second group of SDRAM unit 30 and second group of SDRAM are filled with
There is also first group of clear bit location of SDRAM 35 between judging unit 40, be filled with for removing first group of SDRAM
Mark.
It is preferred that second group of SDRAM is filled with judging unit 40 and second group of SDRAM data is read back unit 50
Between there is also second group of SDRAM set unit 45, be filled with mark for second group of SDRAM of set,
Two groups of SDRAM data are read back and be there is also second group of clear bit location of SDRAM 60 after unit 50, for removing the
Two groups of SDRAM are filled with mark and are back to first group of SDRAM unit.
Refer to Fig. 3, the system of a kind of usb data collection, including USB controller 100, for controlling number
According to gathering, 200, first group of SDRAM300 of usb data controller of storing and transmitting, second group
SDRAM400, signal conditioning circuit 500 for level conversion, USB controller 100, first group
SDRAM300, second group of SDRAM400, signal conditioning circuit 500 are all connected with usb data controller 200,
Usb data controller 200 has the device that above-mentioned usb data gathers.
Wherein, usb data controller 200 is fpga chip, the collection of data, storage, the control of SDRAM
System and system are worked by FPGA by the logical process such as mutual between high speed USB 2.0 interface and PC
Completing, therefore FPGA is the core of whole system, shown in functional block diagram Fig. 4 of FPGA.
Wherein the effect of USB interface bridge module 201 is by the inside of high speed USB 2.0 controller Yu FPGA
Logic bridges together, thus the instruction sent by host computer is converted into corresponding logical signal, controls
The state of the internal modules of FPGA.The effect of waveform sampling module 202 is to input with specific sample rate
Signal is sampled, and data sampling obtained deliver to waveform memory module 203.Waveform memory module 203
For controlling the storage of sampled data.First group of sdram controller 204 and second group of sdram controller 205
For controlling the sequential such as the refreshing of two groups of independences SDRAM of off-chip, precharge, reading and writing.
To sum up, this programme is the structure of fpga chip+high speed USB 2.0 controller+two group SDRAM, FPGA
Various digital units circuit can be realized efficiently, flexibly, and fpga chip can reconfigure, system upgrade
Very convenient.The data transmission that high speed USB 2.0 controller will be able to collect with the transfer rate of 480Mbps
To PC, two groups of SDRAM can alternately store data, it is ensured that the transmission of data acquisition and data is entered simultaneously
The read/write conflict of SDRAM is not produced, it is possible to complete consecutive data set very easily, more effectively utilize during row
The storage resource of PC, it is achieved data record for a long time.Owing to employing SDRAM is as data buffer storage, one
Aspect ensure that the bandwidth and the degree of depth of data storage that data store, and on the other hand greatly reduces the hard of scheme
Part cost.
The feature of the technical program design is:
1, notebook data acquisition scheme structure is " fpga chip+high speed USB 2.0 controller+two group SDRAM "
The feature of two groups of SDRAM is that the address bus of these two groups of SDRAM, data/address bus and control signal are all only
Stand, often group SDRAM can be independent control and access, one group of SDRAM is probably a piece of SDRAM core
Sheet, it is also possible to multi-disc SDRAM chip.
2, the working method of data acquisition system is, two groups of SDRAM alternately data storages and reading,
Data collecting system is marked by " first group of SDRAM is filled with mark " and " second group of SDRAM is filled with mark "
The data known in which group SDRAM can be read by PC, and PC judges to need which reads by the two mark
Data in group SDRAM, after the data in PC has read SDRAM, will can indicate removing accordingly.
3, the operation of data acquisition system controls to be completed by high speed USB 2.0 interface by PC, collects
Data read by high speed USB 2.0 interface by PC, the data collected are analyzed work further
Completed by PC.
Implement method, Apparatus and system that a kind of usb data of the present invention gathers, there is following useful skill
Art effect:
Two groups of SDRAM can alternately store data, it is ensured that when the transmission of data acquisition and data is carried out simultaneously
Do not produce the read/write conflict of SDRAM, it is possible to complete consecutive data set very easily, more effectively utilize PC
Storage resource, it is achieved for a long time data record.Owing to employing SDRAM is as data buffer storage, on the one hand
Ensure that bandwidth and the degree of depth of data storage, the hardware cost on the other hand greatly reduced that data store.
Above in conjunction with accompanying drawing, embodiments of the invention are described, but the invention is not limited in above-mentioned
Detailed description of the invention, above-mentioned detailed description of the invention is only schematic rather than restrictive, this
The those of ordinary skill in field, under the enlightenment of the present invention, is being protected without departing from present inventive concept and claim
Under the ambit protected, it may also be made that a lot of form, within these belong to protection scope of the present invention.
Claims (6)
1. the method that a usb data gathers, it is characterised in that including:
S1.PC machine sends to acquisition system and starts order, and described acquisition system receives described after starting order
The data constantly collected are stored in first group of SDRAM；
S2. judge whether described first group SDRAM is filled with, if so, enter step S3, if it is not, return
Step S1；
S3. first group of described SDRAM data are read back, meanwhile, the new data storage that will constantly collect
In second group of SDRAM；
S4. judge whether described second group SDRAM is filled with, if so, enter step S5, if it is not, return
Step S3；
S5. second group of described SDRAM data are read back；
Further comprise the steps of: first group of SDRAM of S21. set between described step S2 and S3 and be filled with mark；
Further comprise the steps of: second group of SDRAM of S41. set between described step S4 and S5 and be filled with mark；
If described PC inquires described first group of SDRAM and is filled with mark and described second group of SDRAM simultaneously
Being filled with mark, then it represents that the storage speed of the data transmission speed more than USB, described PC is given to make mistake and is carried
Show；The data collected are transferred to described PC with the transfer rate of 480Mbps by USB2.0 controller；Institute
State first group of SDRAM and the address bus of second group of SDRAM, data/address bus and control signal be all independent,
Can carry out independent control and access, described first group of SDRAM or second group of SDRAM is a piece of SDRAM core
Sheet or multi-disc SDRAM chip.
The method that usb data the most according to claim 1 gathers, it is characterised in that described step
Further comprise the steps of: S31. between S3 and S4 to remove first group of SDRAM and be filled with mark.
The method that usb data the most according to claim 2 gathers, it is characterised in that described step
Further comprise the steps of: after S5 S6. remove second group of SDRAM be filled with mark and return step S1.
4. the device that a usb data gathers, it is characterised in that including:
First group of SDRAM unit: be used for making PC send to acquisition system and start order, described acquisition system
After receiving described startup order, the data constantly collected are stored in first group of SDRAM；
First group of SDRAM is filled with judging unit: is connected with first group of described SDRAM unit, is used for judging
Whether first group of described SDRAM is filled with；
First group of SDRAM data is read back and second group of SDRAM unit, is filled with first group of described SDRAM
Judging unit is connected, for reading back, first group of described SDRAM data meanwhile, by constantly collect
New data is stored in second group of SDRAM；
Second group of SDRAM is filled with judging unit, reads back and second group of SDRAM with first group of described SDRAM
Unit is connected, for judging whether described second group SDRAM is filled with；
Second group of SDRAM data is read back unit, is filled with judging unit with second group of described SDRAM and is connected,
For second group of described SDRAM data are read back；
Read back and second group of SDRAM unit and first group of SDRAM are filled with in first group of described SDRAM data
There is also first group of SDRAM set unit between judging unit, be filled with mark for first group of SDRAM of set；
Read back and second group of SDRAM unit and second group of SDRAM are filled with judgement in first group of described SDRAM data
There is also first group of clear bit location of SDRAM between unit, be filled with mark for removing first group of SDRAM；
Second group of described SDRAM is filled with judging unit and second group of SDRAM data is read back and also deposited between unit
At second group of SDRAM set unit, it is filled with mark for second group of SDRAM of set, at described second group
SDRAM data are read back and be there is also second group of clear bit location of SDRAM after unit, for removing second group of SDRAM
It is filled with mark and is back to first group of SDRAM unit；
If described PC inquires described first group of SDRAM and is filled with mark and described second group of SDRAM simultaneously
Being filled with mark, then it represents that the storage speed of the data transmission speed more than USB, described PC is given to make mistake and is carried
Show；The data collected are transferred to described PC with the transfer rate of 480Mbps by USB2.0 controller；Institute
State first group of SDRAM and the address bus of second group of SDRAM, data/address bus and control signal be all independent,
Can carry out independent control and access, described first group of SDRAM or second group of SDRAM is a piece of SDRAM core
Sheet or multi-disc SDRAM chip.
5. the system that usb data gathers, including USB controller, for controlling data acquisition, storage
And the usb data controller of transmission, first group of SDRAM, second group of SDRAM, letter for level conversion
Number modulate circuit, described USB controller, first group of SDRAM, second group of SDRAM, signal conditioning circuit
All it is connected with usb data controller, it is characterised in that described usb data controller has claim 4
The device that described usb data gathers.
The system that usb data the most according to claim 5 gathers, it is characterised in that described first
Group SDRAM, second group of SDRAM at least include a piece of SDRAM chip.
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| CN101185580A (en) * | 2006-11-15 | 2008-05-28 | 深圳迈瑞生物医疗电子股份有限公司 | Method and apparatus for gathering ultrasonic diagnosis system high-speed radio-frequency echo wave data |
| CN101404760A (en) * | 2008-10-28 | 2009-04-08 | 大连理工大学 | Self-perception portable image wireless monitoring equipment and use method thereof |
| CN101408902A (en) * | 2008-10-06 | 2009-04-15 | 南京大学 | Method for acquiring and transporting high speed data based on FPGA and USB bus |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101185580A (en) * | 2006-11-15 | 2008-05-28 | 深圳迈瑞生物医疗电子股份有限公司 | Method and apparatus for gathering ultrasonic diagnosis system high-speed radio-frequency echo wave data |
| CN101408902A (en) * | 2008-10-06 | 2009-04-15 | 南京大学 | Method for acquiring and transporting high speed data based on FPGA and USB bus |
| CN101404760A (en) * | 2008-10-28 | 2009-04-08 | 大连理工大学 | Self-perception portable image wireless monitoring equipment and use method thereof |
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Effective date of registration: 20160726 Address after: 510000 Guangdong Province, Guangzhou high tech Industrial Development Zone, No. 31 Southern China Science City Ke Feng Lu new materials innovation park building G4 502 Patentee after: GUANGZHOU XIAOWEI ELECTRONIC TECHNOLOGY Co.,Ltd. Address before: 1115 building 11, 1117, 1118, Longkou East Road, No. 5, Longkou East Road, Guangzhou, Guangdong, Tianhe District 518000, China Patentee before: Guangzhou Zhono Electronic Technology Co.,Ltd. |
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Address after: 510663 No. 202, G10 building, Southern China new material innovation park, No. 31, Ke Feng Road, Guangzhou hi tech Industrial Development Zone, Guangdong Patentee after: GUANGZHOU ZHONO ELECTRONIC TECHNOLOGY Co.,Ltd. Address before: 510000 Guangdong science and Technology Development Zone Guangzhou science and Technology City 31 new Southern China material innovation park G4 502 Patentee before: GUANGZHOU XIAOWEI ELECTRONIC TECHNOLOGY Co.,Ltd. |
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Address after: 510663 No. 202, G10 building, Southern China new material innovation park, No. 31, Ke Feng Road, Guangzhou hi tech Industrial Development Zone, Guangdong Patentee after: Guangzhou Zhongnuo Microelectronics Co.,Ltd. Address before: 510663 No. 202, G10 building, Southern China new material innovation park, No. 31, Ke Feng Road, Guangzhou hi tech Industrial Development Zone, Guangdong Patentee before: GUANGZHOU ZHONO ELECTRONIC TECHNOLOGY Co.,Ltd. |
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