CN103368663B - A kind of commissioning method for testing for radio frequency remote base station and system - Google Patents
A kind of commissioning method for testing for radio frequency remote base station and system Download PDFInfo
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- CN103368663B CN103368663B CN201210086995.9A CN201210086995A CN103368663B CN 103368663 B CN103368663 B CN 103368663B CN 201210086995 A CN201210086995 A CN 201210086995A CN 103368663 B CN103368663 B CN 103368663B
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Abstract
The invention provides a kind of commissioning method for testing and device, adopt optical interface and treat to carry out sending and receiving tune-up data between commissioning test plate (panel) card, and by controlling the transmitting-receiving moment, analog BBU function can be realized and provide data source to RRU and the data gathering RRU, also can realize simulation RRU function provide data source to BBU and gather the data of BBU, not only can debug BBU and RRU under single-board environment, also can debug under complete machine environment, flexibility is good, workable, in complete machine environment, also do not need extra Interference fit.
Description
Technical field
The present invention relates to moving communicating field, particularly relate to a kind of commissioning method for testing for radio frequency remote base station and system.
Background technology
Existing LTE (Long term Evolution, Long Term Evolution) system and TD-SCDMA (TimeDivision-Synchronous Code Division Multiple Access, TD SDMA) base station many employings distributed frame of system, distributed base station refers to BBU (the Base Band Unit of base station, base station processing unit) and RRU (Remote RF Unit, Remote Radio Unit) separately as independently module is separated, and by a kind of base station mode that optical interface utilizes optical fiber to be connected.The capacity of distributed base station system is large, and integrated level is high, networking flexibility, is applicable to multiple covering scene, and its power consumption is little simultaneously, and reliability is high, and equipment cost is low, thus that network is sputtered is corresponding with the cost safeguarded greatly declines.
In mobile communication system, be subject to the impact of the objective factors such as cost, power consumption and networking flexibility, system requires more and more higher to the disposal ability of base station single-board, often not only require that base station single-board can complete the data processing of multi-cell multi-antenna, also very high requirement is proposed to the resource utilization, integrated level etc. of base station single-board.Especially in current TD and LTE system, owing to have employed Remote Radio Technique, base station processing unit BBU is separated with radio frequency remote unit RRU, by Fiber connection between BBU and RRU, the difficulty of test to base station is carried out is increased.Therefore, how to carry out the correctness testing to guarantee BBU and RRU function when the resource utilization of base station single-board is higher, become one of current urgent problem.
Existing in the method for testing of base station single-board, under the prerequisite not increasing peripheral hardware testing apparatus, by software program, in BBU and RRU, utilize built-in application program to add certain method of testing, carry out the correctness of testing authentication BBU and RRU, the method is tested BBU and RRU by software code, do not need extra board or equipment, but, owing to being subject to the factor controlling such as cost, power consumption, the software and hardware resources of BBU and RRU, outside the normal demand function of completion system itself, does not have the resource of extraneous to be used for testing substantially.Therefore, the method can only be used for simple test, and mass data of cannot satisfying the demand carries out the test analyzed.
Also usually adopt special equipment to realize certain RRU data acquisition and test in prior art, as utilized the testing equipment of special analog BBU, whether the uplink and downlink physical channel testing RRU is respectively normal.It comprises the data by antenna opening input signal source to the method for testing of uplink, be transferred in analog BBU equipment after each submodule of RRU is by optical fiber, by analysis result, analog BBU, by data analysis, then judges that whether uplink is normal; It is send downlink data by analog BBU to the method for testing of downlink, RRU is transferred to after optical fiber, these data are sent to antenna opening by downlink by RRU, by the output of apparatus measures antenna opening, judge that whether downlink is normal according to test structure.Although but adopt special equipment to test RRU uplink and downlink passage simultaneously, but the upstream data of RRU can not be gathered, and can not test BBU, moreover utilize special analog BBU testing equipment owing to limiting by conditions such as hardware environment, and be difficult to connect RRU to be tested in complete machine environment, only can test under single-board environment, if test under complete machine environment, need to increase extra Interference fit, thus make existing testing apparatus and method lack flexibility.
Summary of the invention
In view of the defect of prior art, the invention provides a kind of method of testing for radio frequency remote base station and device, solution prior art is tested and is needed additional interface to coordinate under complete machine environment, and can not gather RRU upstream data, and the problem can not tested BBU.
The technological means that the present invention adopts is as follows: a kind of commissioning electricity testing device for radio frequency remote base station, wherein, comprises commissioning test plate (panel) card and control PC; Wherein,
Described commissioning test plate (panel) card comprises CPU, FPGA, memory modules and optical module;
Wherein, described CPU is for receiving the debugging of described control PC or test instruction and the corresponding configuration information comprising the transmitting-receiving moment being sent to described FPGA;
Described FPGA comprises the functional modules such as configuration module, Ethernet processing module, optical interface processing module and control module; Wherein, described configuration module is for receiving the configuration information of described CPU and being configured; The tune-up data bag that described Ethernet processing module sends for receiving described control PC, extracts the tune-up data of described tune-up data bag, or sends to described control PC after the fractionation of the test data of collection is packaged as test packet; Described optical interface processing module is used for the test data in the described transmitting-receiving moment by the described board interface to be tested of described optical module reception, or reads tune-up data by described control module and send to described optical module; Described control module is for dispatching the inner each module work of FPGA;
Described optical module is connected with described BBU and RRU by optical fiber, for the conversion of photosignal, and realizes commissioning test plate (panel) card and treats the mutual of data between commissioning test plate (panel) card;
Memory modules is used for tune-up data or test data described in buffer memory;
Described control PC is used for sending debugging or test instruction to the CPU of described commissioning test plate (panel) card, and control the read operation of local tune-up data file, be send to described commissioning test plate (panel) card after continuous print multiple tune-up data bag by described local tune-up data file declustering, and receive described commissioning test plate (panel) card and gather and the test packet exported after packing, and be stored in local test data file.
Further, described configuration information, except comprising the described transmitting-receiving moment, also comprises the size of the MAC Address of described control PC, IP address, port numbers and the amount of transmitting and receive data.
Further, described optical interface processing module is also for repeatedly reading tune-up data according to the size of described transmission data volume; Described optical interface processing module is also for receiving test data according to the size receiving data volume.
Further, described CPU also receives and dispatches the moment for the RRU of the configuration FPGA when commissioning tries BBU board, and configures the BBU transmitting-receiving moment of FPGA when commissioning examination RRU board.
Further, described in treat that commissioning test plate (panel) card interface is IR interface, described tune-up data bag and test packet are UDP message bag.
Present invention also offers a kind of commissioning method for testing based on commissioning electricity testing device as above, comprise debugging step and testing procedure, wherein,
Described debugging step comprises:
Described control PC sends debug command to the CPU of described commissioning test plate (panel) card, reads local tune-up data file simultaneously, and is send to described FPGA after continuous print multiple tune-up data bag by described tune-up data file declustering;
The corresponding configuration information comprising delivery time is sent to described FPGA according to described debug command by described CPU;
The configuration module of described FPGA receives the configuration information of described CPU and is configured, and the Ethernet processing module of described FPGA receives described tune-up data bag, extracts the tune-up data of described tune-up data bag, and described tune-up data is write described memory modules;
Described optical interface processing module reads described tune-up data at described delivery time, and sends to described optical module;
Described optical module sends to board to be debugged after described tune-up data is carried out photoelectric signal transformation;
Described testing procedure comprises:
Described control PC sends test instruction to the CPU of described commissioning test plate (panel) card;
The corresponding configuration information comprising the time of reception is sent to described FPGA according to described test instruction by described CPU;
The configuration module of described FPGA receives the configuration information of described CPU and is configured;
The data that described optical interface processing module receives board interface to be tested in the described time of reception by optical module form test data, and are stored in described memory modules;
Described Ethernet processing module reads described test data, and packing forms test packet, sends to described control PC;
Described control PC receives described test packet, and is stored in local test data file.
Further, in described debugging step, described configuration information, except comprising described delivery time, also comprises the MAC Address of described control PC, IP address, port numbers and sends the size of data volume;
In described testing procedure, described configuration information, except comprising the described time of reception, also comprises the MAC Address of described control PC, IP address, port numbers and receives the size of data volume.
Further, in described debugging step, described optical interface processing module reads described tune-up data at described delivery time repeatedly according to the size sending data volume, and sends to described optical module;
In described testing procedure, described optical interface processing module receives test data according to the size of described reception data volume.
Further, when commissioning examination BBU board, the RRU of configuration FPGA receives and dispatches the moment, and the BBU of configuration FPGA receives and dispatches the moment when commissioning examination RRU board.
Further, described board interface to be tested is IR interface, and described tune-up data bag and test packet are UDP message bag.
A kind of commissioning method for testing provided by the invention and device, adopt optical interface and treat to carry out sending and receiving tune-up data between commissioning test plate (panel) card, and by controlling the transmitting-receiving moment, analog BBU function can be realized and provide data source to RRU and the data gathering RRU, also can realize simulation RRU function provide data source to BBU and gather the data of BBU, not only can debug BBU and RRU under single-board environment, also can debug under complete machine environment, flexibility is good, workable, in complete machine environment, also do not need extra Interference fit.
Accompanying drawing explanation
Fig. 1 is the structural representation of a kind of commissioning electricity testing device for radio frequency remote base station of the present invention;
Fig. 2 is the debugging step flow chart in a kind of commissioning method for testing of the present invention;
Fig. 3 is the testing procedure flow chart in a kind of commissioning method for testing of the present invention.
Embodiment
For making object of the present invention, technical scheme and advantage clearly understand, to develop simultaneously embodiment referring to accompanying drawing, the present invention is described in more detail.
A kind of commissioning electricity testing device for radio frequency remote base station of the present invention as described in Figure 1, comprises commissioning test plate (panel) card and control PC; Wherein,
Described commissioning test plate (panel) card comprises CPU, FPGA, memory modules and optical module;
Wherein, described CPU is for receiving the debugging of described control PC or test instruction and the corresponding configuration information comprising the transmitting-receiving moment being sent to described FPGA, and CPU also receives and dispatches the moment for the RRU of the configuration FPGA when commissioning tries BBU board, and configure the BBU transmitting-receiving moment of FPGA when commissioning examination RRU board; Described configuration information, except comprising the described transmitting-receiving moment, also comprises the size of the MAC Address of described control PC, IP address, port numbers and the amount of transmitting and receive data;
Described FPGA comprises the functional modules such as configuration module, Ethernet processing module, optical interface processing module and control module; Wherein, described configuration module is for receiving the configuration information of described CPU and being configured; The tune-up data bag that described Ethernet processing module sends for receiving described control PC, extract the tune-up data of described tune-up data bag, or control PC as described in sending to after the fractionation of the test data of collection is packaged as test packet (as UDP message) bag; Described optical interface processing module is used for receiving described board interface to be tested in the described transmitting-receiving moment by described optical module, as the test data of IR interface, or read tune-up data by described control module and send to described optical module, and it can read tune-up data repeatedly according to the size of described transmission data volume, or receive test data according to the size receiving data volume; Described control module is for dispatching the inner each module work of FPGA;
Described optical module is connected with described BBU and RRU by optical fiber, for the conversion of photosignal, and realizes commissioning test plate (panel) card and treats the mutual of data between commissioning test plate (panel) card;
Memory modules is used for tune-up data or test data described in buffer memory;
Described control PC is used for sending debugging or test instruction to the CPU of described commissioning test plate (panel) card, and control the read operation of local tune-up data file, be the multiple tune-up data bag of continuous print by described local tune-up data file declustering, as UDP message bag, after send to described commissioning test plate (panel) card, and receive described commissioning test plate (panel) card and gather and the test packet exported after packing, and be stored in local test data file.
Present invention also offers a kind of commissioning method for testing, comprise debugging step and testing procedure, wherein debugging step is as shown in Figure 2, comprising:
Described control PC sends debug command to the CPU of described commissioning test plate (panel) card, reads local tune-up data file simultaneously, and is send to described FPGA after continuous print multiple tune-up data bag by described tune-up data file declustering;
The corresponding configuration information comprising delivery time is sent to described FPGA according to described debug command by described CPU, wherein said configuration information, except comprising described delivery time, also comprises the MAC Address of described control PC, IP address, port numbers and sends the size of data volume;
The configuration module of described FPGA receives the configuration information of described CPU, and is configured, and the Ethernet processing module of described FPGA receives described tune-up data bag, extracts the tune-up data of described tune-up data bag, and described tune-up data is write described memory modules;
Described optical interface processing module reads described tune-up data at described delivery time repeatedly according to the size sending data volume, and sends to described optical module;
Described optical module sends to board to be debugged after described tune-up data is carried out photoelectric signal transformation;
Testing procedure as shown in Figure 3, comprising:
Described control PC sends test instruction to the CPU of described commissioning test plate (panel) card;
The corresponding configuration information comprising the time of reception is sent to described FPGA according to described test instruction by described CPU, described configuration information, except comprising the described time of reception, also comprises the MAC Address of described control PC, IP address, port numbers and receives the size of data volume;
The configuration module of described FPGA receives the configuration information of described CPU, and is configured;
Described optical interface processing module receives the data of board interface to be tested in the described time of reception by optical module, and receives test data formation test data according to the size of described reception data volume, and is stored in described memory modules;
Described Ethernet processing module reads described test data, and packing forms test packet, sends to described control PC;
Described control PC receives described test packet, and is stored in local test data file.
In debugging step and testing procedure, the RRU that described CPU configures FPGA receives and dispatches the moment, and described CPU configures the BBU transmitting-receiving moment of FPGA when commissioning examination RRU board.
In the present invention, adopt optical interface and treat to carry out sending and receiving tune-up data between commissioning test plate (panel) card, and by controlling the transmitting-receiving moment, analog BBU function can be realized and provide data source to RRU and the data gathering RRU, also can realize simulation RRU function provide data source to BBU and gather the data of BBU, not only can debug BBU and RRU under single-board environment, also can debug under complete machine environment, flexibility is good, workable, in complete machine environment, also do not need extra Interference fit.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within the scope of protection of the invention.
Claims (10)
1. for a commissioning electricity testing device for radio frequency remote base station, it is characterized in that, comprise commissioning test plate (panel) card and control PC; Wherein,
Described commissioning test plate (panel) card comprises CPU, FPGA, memory modules and optical module;
Wherein, described CPU is for receiving the debugging of described control PC or test instruction and the corresponding configuration information comprising the transmitting-receiving moment being sent to described FPGA;
Described FPGA comprises the functional modules such as configuration module, Ethernet processing module, optical interface processing module and control module; Wherein, described configuration module is for receiving the configuration information of described CPU and being configured; The tune-up data bag that described Ethernet processing module sends for receiving described control PC, extracts the tune-up data of described tune-up data bag, or sends to described control PC after the fractionation of the test data of collection is packaged as test packet; Described optical interface processing module is used for being received the test data of board interface to be tested by described optical module in the described transmitting-receiving moment, or reads tune-up data by described control module and send to described optical module; Described control module is for dispatching the inner each module work of FPGA;
Described optical module is connected with BBU and RRU by optical fiber, for the conversion of photosignal, and realizes commissioning test plate (panel) card and treats the mutual of data between commissioning test plate (panel) card;
Memory modules is used for tune-up data or test data described in buffer memory;
Described control PC is used for sending debugging or test instruction to the CPU of described commissioning test plate (panel) card, and control the read operation of local tune-up data file, be send to described commissioning test plate (panel) card after continuous print multiple tune-up data bag by described local tune-up data file declustering, and receive described commissioning test plate (panel) card and gather and the test packet exported after packing, and be stored in local test data file.
2. commissioning electricity testing device according to claim 1, is characterized in that, described configuration information, except comprising the described transmitting-receiving moment, also comprises the size of the MAC Address of described control PC, IP address, port numbers and the amount of transmitting and receive data.
3. commissioning electricity testing device according to claim 2, is characterized in that, described optical interface processing module is also for repeatedly reading tune-up data according to the size of described transmission data volume; Described optical interface processing module is also for receiving test data according to the size receiving data volume.
4. commissioning electricity testing device according to claim 3, is characterized in that, described CPU also receives and dispatches the moment for the RRU of the configuration FPGA when commissioning tries BBU board, and configures the BBU transmitting-receiving moment of FPGA when commissioning examination RRU board.
5. commissioning electricity testing device according to claim 1, is characterized in that, described in treat that commissioning test plate (panel) card interface is IR interface, described tune-up data bag and test packet are UDP message bag.
6., based on a commissioning method for testing for the commissioning electricity testing device as described in claim 1 to 5, comprise debugging step and testing procedure, wherein,
Described debugging step comprises:
Described control PC sends debug command to the CPU of described commissioning test plate (panel) card, reads local tune-up data file simultaneously, and is send to described FPGA after continuous print multiple tune-up data bag by described tune-up data file declustering;
The corresponding configuration information comprising delivery time is sent to described FPGA according to described debug command by described CPU;
The configuration module of described FPGA receives the configuration information of described CPU and is configured, and the Ethernet processing module of described FPGA receives described tune-up data bag, extracts the tune-up data of described tune-up data bag, and described tune-up data is write described memory modules;
Described optical interface processing module reads described tune-up data at described delivery time, and sends to described optical module;
Described optical module sends to board to be debugged after described tune-up data is carried out photoelectric signal transformation;
Described testing procedure comprises:
Described control PC sends test instruction to the CPU of described commissioning test plate (panel) card;
The corresponding configuration information comprising the time of reception is sent to described FPGA according to described test instruction by described CPU;
The configuration module of described FPGA receives the configuration information of described CPU and is configured;
The data that described optical interface processing module receives board interface to be tested in the described time of reception by optical module form test data, and are stored in described memory modules;
Described Ethernet processing module reads described test data, and packing forms test packet, sends to described control PC;
Described control PC receives described test packet, and is stored in local test data file.
7. method according to claim 6, is characterized in that, in described debugging step, described configuration information, except comprising described delivery time, also comprises the MAC Address of described control PC, IP address, port numbers and sends the size of data volume;
In described testing procedure, described configuration information, except comprising the described time of reception, also comprises the MAC Address of described control PC, IP address, port numbers and receives the size of data volume.
8. method according to claim 7, is characterized in that, in described debugging step, described optical interface processing module reads described tune-up data at described delivery time repeatedly according to the size sending data volume, and sends to described optical module;
In described testing procedure, described optical interface processing module receives test data according to the size of described reception data volume.
9. method according to claim 8, is characterized in that, when commissioning examination BBU board, described CPU configures the RRU transmitting-receiving moment of FPGA, and the BBU of described CPU configuration FPGA receives and dispatches the moment when commissioning examination RRU board.
10. method according to claim 6, is characterized in that, described board interface to be tested is IR interface, and described tune-up data bag and test packet are UDP message bag.
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CN106332116A (en) * | 2015-06-23 | 2017-01-11 | 中兴通讯股份有限公司 | Baseband unit test method and apparatus |
CN106937314B (en) * | 2015-12-29 | 2020-01-31 | 普天信息技术有限公司 | IR interface remote monitoring system and method for radio remote base stations |
CN107423027B (en) * | 2017-07-24 | 2021-11-23 | 杭州迪普科技股份有限公司 | Information reading method, device and system for optical module |
CN107453823B (en) * | 2017-07-31 | 2021-02-02 | 武汉虹信科技发展有限责任公司 | Single body test system and method for optical fiber distributed repeater |
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CN113726456B (en) * | 2020-05-26 | 2023-05-05 | 大唐移动通信设备有限公司 | Detection method of remote radio unit and remote radio unit |
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