CN103325839A - MOS super barrier rectifier device and manufacturing method thereof - Google Patents
MOS super barrier rectifier device and manufacturing method thereof Download PDFInfo
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Abstract
The invention discloses an MOS super barrier rectifier device which is provided with a groove, a second conduction type injection region wraps the groove, the structure can replace a protecting ring structure, a primary photomask is removed compared with the prior art, the depth of the second conduction type injection region is guaranteed, and good pressure proof functions are performed. In addition, the invention further discloses a manufacturing method. According to the method, after the groove is formed, the second conduction type injection region is injected and formed by carrying out heat treatment on activator impurities, the photomask needed when a protecting ring is formed and the processes of long-time trap pushing are removed, cost is saved, the damage, caused by injection by using macro-energy, to the surfaces of devices is avoided, transverse diffusion distance of micro-energy injection region is small, and the control over the length of a channel region and the distance between adjacent second conduction type injection regions is better.
Description
Technical field
The present invention relates to a kind of power semiconductor, refer to especially the manufacture method of a kind of MOS superpotential base rectifying device and this device.
Background technology
Existing power semiconductor rectifier is divided into two kinds, and a kind of is Schottky barrier rectifier, and another kind is that integrated MOS passage superpotential is built rectifier.
Wherein Schottky rectifier is to contact with semiconductor with noble metal (such as gold, silver, platinum, titanium, nickel, molybdenum etc.), the rectifying device of making to form Schottky barrier.Schottky barrier rectifier has been integrated gradually MOS passage superpotential base rectifier and has substituted because high, the reverse withstand voltage level of its forward voltage drop is low, reverse leakage is large, technical process can cause many shortcomings such as heavy metal pollution.
Chinese patent ZL01143693.X discloses a kind of " making method and the obtained device of semiconductor rectifier ", this patent is given out the now Design and manufacture method of main flow integrated MOS passage superpotential base rectifier, its invention basic thought is: vertical semiconductor rectifying device, its effective rectification unit comprise PN junction structure and MOS structure in parallel; Be example during take the first conduction type as N-type, the MOS structural equivalents of device is the barrier MOS pipe of N-type raceway groove; Device is when forward bias, the drain electrode of this N-type channel barrier metal-oxide-semiconductor becomes equipotential with gate short, the grid of metal-oxide-semiconductor and the electrical potential difference between the source electrode equal the drain electrode of metal-oxide-semiconductor and the electrical potential difference between the source electrode, and the barrier MOS pipe is opened under low forward bias and formed conductive channel; During reverse biased, because source electrode and grid short circuit, the barrier MOS pipe is in again cut-off state, and the PN junction of integrated MOS pipe exhausts fast, bears reversed bias voltage.Guard ring 28 and connector 30 needs an independent light shield to form among this ZL01143693.X, and whole manufacture process needs at least four light shields, and need the long period push away trap technique, the technique manufacturing cost is higher.Increasingly mature along with the semiconductor rectifier device technology, market competition is growing more intense, and how to reduce manufacturing cost and become semiconductor technology personnel question of common concern under the prerequisite that guarantees device performance.In manufacture of semiconductor, the number of times of light shield has determined manufacturing cost, and how the key point that reduces manufacturing cost is to reduce the number of times of light shield under the prerequisite that guarantees device performance as far as possible.The mode of injection is only adopted in the second conduction type injection region of existing patent ZL01143693.X in addition, the process that does not add high-temperature process, such injection wants to reach preferably effect, need higher Implantation Energy, and high-octane injection is serious to the damage of semiconductor surface, makes device reliability and reduces.
Summary of the invention
Technical problem to be solved by this invention is: provide a kind of MOS superpotential to build rectifying device; this rectifying device is provided with groove; the second conduction type injection region parcel groove; the alternative guard ring structure of this structure; thereby can save one time light shield when making this rectifier; and guaranteed the degree of depth of the second conduction type injection region, well played withstand voltage effect.
Another technical problem to be solved by this invention is: provide a kind of MOS superpotential to build the manufacture method of rectifying device; the method forms the second conduction type injection region again after groove forms; this structure has substituted the guard ring structure; saved light shield one time; can save required light shield when forming guard ring and push away for a long time the process of trap; saved cost; the damage of having avoided again using the injection of macro-energy that device surface caused; and the transverse diffusion distance of the injection region of little energy is less, and is better to the length of channel region and the distance control between adjacent the second conduction type injection region.
For solving the problems of the technologies described above, technical scheme of the present invention is: a kind of MOS superpotential is built rectifying device, comprise the semiconductor substrate in the cross section of rectifying device, the bottom of this semiconductor substrate is heavily doped the first conductivity type substrate, the top of semiconductor substrate is lightly doped the first conduction type drift region, the upper surface of described semiconductor substrate is defined as first surface, the lower surface of semiconductor substrate is defined as second surface, and the first surface edges cover of described semiconductor substrate has the first insulating oxide; The first insulating oxide is surrounded by the source region; Be provided with several grooves in this active area, this groove extends into the first conduction type drift region by first surface; Described the first conduction type drift region is provided with the first conduction type injection region at the lateral sulcus of groove along the place, top, described the first conduction type drift region is provided with the second conduction type injection region corresponding and separate with groove number, each groove of the second conduction type injection region parcel and first corresponding conduction type injection region; The described first surface that is in active area between the groove is coated with the second insulating oxide, is coated with the first electrode on the second insulating oxide, is coated with the 3rd insulating oxide above described the first electrode; Be provided with the first metal, the first metal and the first electrode, the first conduction type injection region, the second conduction type injection region ohmic contact on the described semiconductor substrate first surface and in the groove; Be provided with the second metal with the second surface ohmic contact on the described semiconductor second surface.
As a kind of preferred scheme, described the first conduction type injection region is injected horizontal proliferation by the first conductive type impurity and is formed.
As a kind of preferred scheme, the implantation dosage of described the second conduction type injection region is less than first conduction type injection region at least one order of magnitude of implantation dosage.
As a kind of preferred scheme, the MOS unit that described MOS superpotential is built rectifier by described the first conduction type injection region as source/drain, the second conduction type injection region near the first surface zone form channel region, the first conduction type drift region as drain/source, the second insulating oxide as gate oxide, the first electrode as grid.
As a kind of preferred scheme, described the first insulating oxide is by the heat growth or deposit forms, the second insulating oxide is formed by the heat growth; The 3rd insulating oxide is formed by deposit.
A kind of method of making MOS superpotential base rectifying device in the claim 1, it comprises
A., the first conductive type semiconductor substrate with two apparent surfaces is provided, this the first conductive type semiconductor substrate comprises heavily doped the first conductivity type substrate and lightly doped the first conduction type drift region, and described two apparent surfaces comprise the first surface that is positioned at semiconductor substrate top and the second surface of semiconductor substrate bottom;
B. the first surface at described semiconductor substrate forms the first insulating oxide;
C. selective etch the first insulating oxide keep the first insulating oxide of semiconductor-based panel edges, and the zone that is etched is formed with the source region;
D. in the active area of the first surface of semiconductor substrate, form the second insulating oxide;
E. at surface coverage first electrode of the first insulating oxide and the second insulating oxide;
F. form the 3rd insulating oxide on the surface of the first electrode;
G. the active area selectivity at the 3rd insulating oxide covers the photoresist masking body;
H. with the photoresist masking body for sheltering isotropic etching the 3rd insulating oxide;
I with the photoresist masking body for sheltering anisotropic etching the first electrode and the second insulating oxide;
J. with photoresist masking body, the first insulating oxide for stopping, inject the first conductive type impurity in the first surface of semiconductor substrate and form the first conduction type injection region;
K. with photoresist masking body, the first insulating oxide for sheltering, anisotropic etching groove, this groove vertically run through the first conduction type injection region until in the first conduction type drift region;
L. with photoresist masking body, the first insulating oxide for stopping, inject the second conductive type impurity in the first surface of semiconductor substrate and form the second conduction type injection region, the second conduction type injection region parcel groove and the first conduction type injection region;
M. remove the photoresist masking body;
N. in shallow injection second conductive type impurity of first surface of described semiconductor substrate jointly to form the channel region of MOS structure with described the second conduction type injection region;
O. in first surface deposit first metal of described semiconductor substrate;
P. in second surface deposit second metal of described semiconductor substrate.
Wherein, increase I ' between I and m step, this I ' step is: for stopping, inject second conductive type impurity in the bottom land surface of groove with photoresist masking body, the first insulating oxide.
Further the first insulating oxide is by the heat growth or deposit forms, the second insulating oxide is formed by the heat growth; The 3rd insulating oxide is formed by deposit.Described the first electrode is that deposit forms.
Further, the method of selective etch the first insulating oxide among the method step c is: the fringe region that is in semiconductor substrate at the first insulating oxide covers the photoresist masking body, thereby then utilize this photoresist masking body to be formed with the source region for shelter etching the first insulating oxide, remove at last this photoresist masking body.
After having adopted above-mentioned MOS superpotential to build the technical scheme of rectifying device; effect of the present invention is: the second conduction type injection region that this device has groove and is wrapped in groove; the alternative guard ring of this structure; saved light shield one time; and guaranteed the degree of depth of the second conduction type injection region; played good withstand voltage effect, the distance control between the length of raceway groove and adjacent the second conductivity type injection region is easier.
After having adopted above-mentioned MOS superpotential to build the technical scheme of rectifying device manufacture method, effect of the present invention is:
1. the method forms the second conduction type injection region again after groove forms, and alternative guard ring structure has been saved and formed the required light shield of guard ring and push away for a long time the trap process, has saved the cost of about 25-30%.And the degree of depth of the second conduction type injection region can guarantee, thereby play good withstand voltage effect.
2. the injection conductive type impurity that is formed on of the injection region of the method has carried out the heat treatment activator impurity again, thereby can use the method for implanting of little energy, and the injection of avoiding using macro-energy has improved the stability of product to the device surface injury.
The utilization of the method the second time conductive type impurity shallow injection, can improve raceway groove pattern in the MOS structure, reduce reverse leakage current, improve oppositely withstand voltage; And can reduce the turning-on voltage of MOS structure, and then reduce the forward voltage drop of device.
In addition, increase I ' between I and m step, this I ' step is: for stopping, inject second conductive type impurity in the bottom land surface of groove with photoresist masking body, the first insulating oxide.Like this, can make the second conduction type injection region of the first metal and bottom land form good ohmic contact, optimize the resistance of Schottky contacts herein.
Description of drawings
The present invention is further described below in conjunction with drawings and Examples.
Fig. 1 to Figure 12 is the profile of each step in the embodiment of the invention manufacture method;
Figure 13 is the structural representation that the MOS superpotential of the embodiment of the invention is built rectifying device;
In the accompanying drawing: 1. the first conductivity type substrate; 2. the first conduction type drift region; 3. the first insulating oxide; 4. the second insulating oxide; 5. the first electrode; 6. the 3rd insulating oxide; 7. photoresist masking body; 8. the first conduction type injection region; 9. groove; 10. the second conduction type injection region; 11. the first metal; 12. the second metal.
Embodiment
The present invention is described in further detail below by specific embodiment.
A kind of MOS superpotential is built rectifying device, as shown in figure 12, comprise the semiconductor substrate in the cross section of rectifying device, the bottom of this semiconductor substrate is heavily doped the first conductivity type substrate 1, the top of semiconductor substrate is lightly doped the first conduction type drift region 2, and the impurity of this first conduction type can be N-type impurity, corresponding, the second conductive type impurity of hereinafter mentioning then is p type impurity, and vice versa.And in the present embodiment, this first conductive type impurity selects N-type impurity, and the second conductive type impurity is P shape impurity.The upper surface of described semiconductor substrate is defined as first surface, and the lower surface of semiconductor substrate is defined as second surface, and the first surface edges cover of described semiconductor substrate has the first insulating oxide 3; The first insulating oxide 3 is surrounded by the source region; Be provided with several grooves 9 in this active area, this groove 9 extends into the first conduction type drift region 2 by first surface; Described the first conduction type drift region 2 is provided with the first conduction type injection region 8 at the lateral sulcus of groove 9 along the place, described the first conduction type injection region 8 is to form before groove 9 forms, and the first conduction type injection region 8 on lateral sulcus edge is that horizontal proliferation forms after injecting N-type impurity after-baking activation.The top of described the first conduction type drift region 2 is provided with the second conduction type injection region 10 corresponding and separate with number of grooves, each second conduction type injection region groove 9 of 10 parcels and first corresponding conduction type injection region 8, this the second conduction type injection region 10 is to form after groove 9 forms, this the second conduction type injection region 10 equally also will be activated through Overheating Treatment, thereby whole groove 9 and the first conduction injection region are wrapped up in the diffusion that utilizes p type impurity, and the implantation dosage of described the second conduction type injection region 10 is less than the first conduction type injection region at least one order of magnitude of 8 implantation dosages.In active area, be in described first surface between the groove 9 and be coated with on the second insulating oxide 4, the second insulating oxides 4 and be coated with the first electrode 5, be coated with the 3rd insulating oxide 6 above described the first electrode 5; Be provided with the first metal 11, the first metals 11 and the first electrode 5, the first conduction type injection region 8, the second conduction type injection region 10 ohmic contact in described semiconductor substrate first surface and the groove 9; Be provided with the second metal 12 with the second surface ohmic contact on the described semiconductor second surface.The MOS unit that described MOS superpotential is built rectifier by described the first conduction type injection region 8 as source/drain, the second conduction type injection region 10 near the first surfaces zone form channel regions, the first conduction type drift region 2 as drain/source, the second insulating oxide as gate oxide, the first electrode 5 as grid.And described the first insulating oxide 3 is grown by heat or deposit forms, the second insulating oxide 4 is formed by the heat growth; The 3rd insulating oxide 6 is formed by deposit, and described the first electrode 5 is that deposit forms.
The invention also discloses a kind of method that the MOS superpotential is built rectifying device in the claim 1 of making, it comprises
A. as shown in Figure 1, the first conductive type semiconductor substrate with two apparent surfaces is provided, this the first conductive type semiconductor substrate comprises heavily doped the first conductivity type substrate 1 and lightly doped the first conduction type drift region 2, the first conduction type selects N-type impurity, and described two apparent surfaces comprise the first surface that is positioned at semiconductor substrate top and the second surface of semiconductor substrate bottom;
B. as shown in Figure 2, the first surface at described semiconductor substrate forms the first insulating oxide 3; This first insulating oxide 3 can form in the heat growth, also can be that deposit forms;
C. as shown in Figure 3, selective etch the first insulating oxide 3, the first insulating oxide 3 that keeps semiconductor-based panel edges, and the zone that is etched is formed with the source region, the method of selective etch the first insulating oxide 3 among this step c is: the fringe region that is in semiconductor substrate at the first insulating oxide 3 covers the photoresist masking body, thereby then utilize this photoresist masking body to be formed with the source region for shelter etching the first insulating oxide 3, remove at last this photoresist masking body.
As shown in Figure 4, this figure has illustrated steps d, e, f, g.Wherein d. forms the second insulating oxide 4 in the active area of the first surface of semiconductor substrate, and the generation type of this second insulating oxide 4 is that the heat growth forms; After these the second insulating oxide 4 etchings as the gate oxide of MOS structure.
E. at surface coverage first electrode 5 of the first insulating oxide 3 and the second insulating oxide 4; This first electrode 5 is preferably conductive polycrystalline silicon.
F. forming the 3rd insulating oxide 6, the three insulating oxides 6 on the surface of the first electrode 5 is that deposit forms, and the first insulating oxide 3, the second insulating oxide 4 and the 3rd insulating oxide 6 all are silicon dioxide layers;
G. the active area selectivity at the 3rd insulating oxide 6 covers photoresist masking body 7, and this photoresist masking body 7 stops or masking function as subsequent step;
H. as shown in Figure 5, narrow for sheltering isotropic etching the 3rd insulating oxide 6, the three insulating oxides 6 formation upper ends with photoresist masking body 7, the shape that the lower end is wide;
I. as shown in Figure 6, with photoresist masking body 7 for sheltering anisotropic etching the first electrode 5 and the second insulating oxide 4, the first electrode 5 and the second insulating oxide 4 then are not etched by the position that photoresist masking body 7 covers, at this moment, the width of Width first electrode 5 of the 3rd insulating oxide 6 lower ends, the second insulating oxide 4 is narrow.；
J. as shown in Figure 7, with photoresist masking body 7, the first insulating oxide 3 for stopping, first surface in semiconductor substrate injects the first conductive type impurity formation first conduction type injection region 8 after heat treatment activates, the edge of the first conduction type injection region 8 has part to be covered by the first insulating oxide 3 and photoresist masking body 7, and the position of this covering is that the impurity horizontal proliferation forms.
K. as shown in Figure 8, for sheltering, anisotropic etching groove 9, this groove 9 vertically run through the first conduction type injection region 8 until in the first conduction type drift region 2 with photoresist masking body 7, the first insulating oxide 3; At this moment, 8 of the first conduction type injection regions that are in the first insulating oxide 3 and 7 coverings of photoresist masking body are retained, and this first conduction type injection region 8 has consisted of the source/drain of MOS structure.
L. as shown in Figure 9, with photoresist masking body 7, the first insulating oxide 3 for stopping, inject the second conductive type impurity in the first surface of semiconductor substrate and form the second conduction type injection region 10,10 parcel groove 9 and the first conduction type injection regions 8, the second conduction type injection region, the dosage that this second conduction type injects should be less than first at least one order of magnitude of conductive type impurity implantation dosage, and this second conductive type impurity selects p type impurity boron;
Can preferably increase step I ' this moment, as shown in figure 10, this I ' step is: with photoresist masking body 7, the first insulating oxide 3 for stopping, the second conductive type impurity is injected on bottom land surface in groove 9, this second conductive type impurity is the same also to be p type impurity boron, increasing step I ' can increase the amount of the P shape impurity of bottom land, makes bottom land and the first metal 11 better form ohmic contact, optimizes the resistance of Schottky contacts herein.
M. as shown in figure 11, remove photoresist masking body 7, the 3rd insulating oxide 6 is exposed;
N. as shown in figure 12, in shallow injection second conductive type impurity of first surface of described semiconductor substrate below the second insulating oxide 4, to form the channel region of MOS structure with the second conduction type injection region 10, this second conductive type impurity also is P shape boron impurities, because the shape that the 3rd insulating oxide 6 is up-narrow and down-wide, this second conductive type impurity can pass not the first electrode 5 of being covered by the 3rd insulating oxide 6 and the second insulating oxide 4 and enter into the first conduction type drift region 2 of below, certainly, the second conductive type impurity also can partly pass narrower position, the 3rd insulating oxide 6 both sides, like this, the second conductive type impurity then merges in the second conductivity type regions and the second conduction type injection region 10 that the second insulating oxide forms for 4 times, reaches the channel region pattern that improves the MOS structure.
O. as shown in figure 13, in first surface deposit first metal 11 of described semiconductor substrate; P. in second surface deposit second metal 12 of described semiconductor substrate.
The zone that above-mentioned the first conduction type injection region 8, the second conduction type injection region 10 and the shallow injection of the second conduction type form afterwards all forms after Overheating Treatment activates, this heat treatment activates to be carried out after step can be injected in each zone, also can in the end unify a heat treatment and activate.
Claims (9)
1. a MOS superpotential is built rectifying device, comprise the semiconductor substrate in the cross section of rectifying device, the bottom of this semiconductor substrate is heavily doped the first conductivity type substrate, the top of semiconductor substrate is lightly doped the first conduction type drift region, the upper surface of described semiconductor substrate is defined as first surface, the lower surface of semiconductor substrate is defined as second surface, it is characterized in that: the first surface edges cover of described semiconductor substrate has the first insulating oxide; The first insulating oxide is surrounded by the source region; Be provided with several grooves in this active area, this groove extends into the first conduction type drift region by first surface; Described the first conduction type drift region is provided with the first conduction type injection region at the lateral sulcus of groove along the place, top, described the first conduction type drift region is provided with the second conduction type injection region corresponding and separate with groove number, each groove of the second conduction type injection region parcel and first corresponding conduction type injection region; The described first surface that is in active area between the groove is coated with the second insulating oxide, is coated with the first electrode on the second insulating oxide, is coated with the 3rd insulating oxide above described the first electrode; Be provided with the first metal, the first metal and the first electrode, the first conduction type injection region, the second conduction type injection region ohmic contact on the described semiconductor substrate first surface and in the groove; Be provided with the second metal with the second surface ohmic contact on the described semiconductor second surface.
2. a kind of MOS superpotential as claimed in claim 1 is built rectifying device, it is characterized in that: described the first conduction type injection region is injected horizontal proliferation by the first conductive type impurity and is formed.
3. a kind of MOS superpotential as claimed in claim 2 is built rectifying device, and it is characterized in that: the implantation dosage of described the second conduction type injection region is less than first conduction type injection region at least one order of magnitude of implantation dosage.
4. a kind of MOS superpotential as claimed in claim 3 is built rectifying device, it is characterized in that: the MOS unit that described MOS superpotential is built rectifier by described the first conduction type injection region as source/drain, the second conduction type injection region near the first surface zone form channel region, the first conduction type drift region as drain/source, the second insulating oxide as gate oxide, the first electrode as grid.
5. a kind of MOS superpotential as claimed in claim 3 is built rectifying device, it is characterized in that: described the first insulating oxide is by the heat growth or deposit forms, the second insulating oxide is formed by the heat growth; The 3rd insulating oxide is formed by deposit.
6. make the method that the MOS superpotential is built rectifying device in the claim 1 for one kind, it comprises
A., the first conductive type semiconductor substrate with two apparent surfaces is provided, this the first conductive type semiconductor substrate comprises heavily doped the first conductivity type substrate and lightly doped the first conduction type drift region, and described two apparent surfaces comprise the first surface that is positioned at semiconductor substrate top and the second surface of semiconductor substrate bottom;
B. the first surface at described semiconductor substrate forms the first insulating oxide;
C. selective etch the first insulating oxide keep the first insulating oxide of semiconductor-based panel edges, and the zone that is etched is formed with the source region;
D. in the active area of the first surface of semiconductor substrate, form the second insulating oxide;
E is at surface coverage first electrode of the first insulating oxide and the second insulating oxide;
F. form the 3rd insulating oxide on the surface of the first electrode;
G. the active area selectivity at the 3rd insulating oxide covers the photoresist masking body;
H. with the photoresist masking body for sheltering isotropic etching the 3rd insulating oxide;
I with the photoresist masking body for sheltering anisotropic etching the first electrode and the second insulating oxide;
J. with photoresist masking body, the first insulating oxide for stopping, inject the first conductive type impurity in the first surface of semiconductor substrate and form the first conduction type injection region;
K. with photoresist masking body, the first insulating oxide for sheltering, anisotropic etching groove, this groove vertically run through the first conduction type injection region until in the first conduction type drift region;
L. with photoresist masking body, the first insulating oxide for stopping, inject the second conductive type impurity in the first surface of semiconductor substrate and form the second conduction type injection region, the second conduction type injection region parcel groove and the first conduction type injection region;
M. remove the photoresist masking body;
N. in shallow injection second conductive type impurity of first surface of described semiconductor substrate jointly to form the channel region of MOS structure with described the second conduction type injection region;
O. in first surface deposit first metal of described semiconductor substrate;
P. in second surface deposit second metal of described semiconductor substrate.
7. manufacturing as claimed in claim 6 MOS superpotential is built the method for rectifying device, it is characterized in that: between I and m step, increase I ', this I ' step is: for stopping, inject second conductive type impurity in the bottom land surface of groove with photoresist masking body, the first insulating oxide.
8. manufacturing as claimed in claim 6 MOS superpotential is built the method for rectifying device, it is characterized in that: described the first insulating oxide is by the heat growth or deposit forms, the second insulating oxide is grown by heat forms; The 3rd insulating oxide is formed by deposit.
9. manufacturing as claimed in claim 6 MOS superpotential is built the method for rectifying device, it is characterized in that: the method for selective etch the first insulating oxide among the method step c is: the fringe region that is in semiconductor substrate at the first insulating oxide covers the photoresist masking body, thereby then utilize this photoresist masking body to be formed with the source region for shelter etching the first insulating oxide, remove at last this photoresist masking body.
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| CN104600126A (en) * | 2013-10-31 | 2015-05-06 | 无锡华润华晶微电子有限公司 | Super-barrier self-bias rectifying diode |
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| CN107346735A (en) * | 2016-05-05 | 2017-11-14 | 北大方正集团有限公司 | The preparation method and diode of diode |
| CN107546277A (en) * | 2016-06-24 | 2018-01-05 | 北大方正集团有限公司 | The preparation method and super barrier diode of super barrier diode |
| CN108461547A (en) * | 2018-01-25 | 2018-08-28 | 江苏捷捷微电子股份有限公司 | A kind of MOS type super barrier rectifier and its manufacturing method |
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| CN107546277A (en) * | 2016-06-24 | 2018-01-05 | 北大方正集团有限公司 | The preparation method and super barrier diode of super barrier diode |
| CN107546277B (en) * | 2016-06-24 | 2019-08-30 | 北大方正集团有限公司 | The preparation method and super barrier diode of super barrier diode |
| CN108461547A (en) * | 2018-01-25 | 2018-08-28 | 江苏捷捷微电子股份有限公司 | A kind of MOS type super barrier rectifier and its manufacturing method |
| CN108461547B (en) * | 2018-01-25 | 2024-02-02 | 江苏捷捷微电子股份有限公司 | MOS type super barrier rectifier and manufacturing method thereof |
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Application publication date: 20130925 |