CN103312130B - A kind of Bidirectional thyristor trigger circuit and method - Google Patents

A kind of Bidirectional thyristor trigger circuit and method Download PDF

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CN103312130B
CN103312130B CN201310271300.9A CN201310271300A CN103312130B CN 103312130 B CN103312130 B CN 103312130B CN 201310271300 A CN201310271300 A CN 201310271300A CN 103312130 B CN103312130 B CN 103312130B
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input
output
phase
nand gate
counter
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CN103312130A (en
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凌云
郭艳杰
陈欢
李飞
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Hunan University of Technology
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Hunan University of Technology
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Abstract

The invention provides a kind of Bidirectional thyristor trigger circuit and method, this circuit is made up of full wave rectifying unit, D.C. regulated power supply unit, zero passage lock-out pulse generation unit, input signal Phototube Coupling unit, phase-shift trigger unit, bidirectional thyristor main circuit unit; The method uses counter directly to the mode phase shift of the phase shifting control frequency signal counting of input, and the phase shifting control frequency signal changing input gets final product phase shift; The phase-shifted control signal inputing to counter has carried out Phototube Coupling and Schmidt's shaping; Circuit cost is low, and volume is little, working stability, reliable, may be used on serving as AC voltage adjusting switch in automatic control system.

Description

A kind of Bidirectional thyristor trigger circuit and method
Technical field
The invention belongs to thyristor gating circuit technical field, particularly a kind of Bidirectional thyristor trigger circuit and method.
Background technology
In traditional analog trigger, device parameters is comparatively disperseed, debugging and use inconvenience, poor reliability, and power consumption is high, and price is high; Analog signal is used to carry out phase shifting control, control signal transmission poor anti jamming capability.
Conventional digital trigger adopts microcontroller as control core, and function is strong, but its price is high, easily causes program fleet out of control when running into strong jamming.
Application number is the patent " a kind of Bidirectional thyristor trigger circuit and method " of CN201010529936.5, adopt PWM as input phase-shifted control signal, circuit is simple, cost is low, but pwm signal needs to convert direct voltage to by filter circuit, conversion accuracy is not high, and this circuit uses diac as trigger comparator part, phase shifting angle hour minimum phase shifting angle is wayward, and when phase shifting angle is large, trigger stability is poor.
Summary of the invention
An object of the present invention is that the shortcoming overcoming above-mentioned prior art is with not enough, there is provided a kind of rational in infrastructure, price is low, debugging is simple, reliability is high, carry out the Bidirectional thyristor trigger circuit of phase shifting control by input different frequency signals, may be used in automatic control system, serving as AC voltage adjusting switch.
Another object of the present invention is to provide the bidirectional thyristor realized by above-mentioned Bidirectional thyristor trigger circuit triggering method.
Technical scheme of the present invention is: a kind of Bidirectional thyristor trigger circuit, is made up of full wave rectifying unit, D.C. regulated power supply unit, zero passage lock-out pulse generation unit, input signal Phototube Coupling unit, phase-shift trigger unit, bidirectional thyristor main circuit unit.
Described full wave rectifying unit is provided with the first ac input end, the second ac input end, full-wave direct current voltage output end, commutating voltage negative output terminal; Described commutating voltage negative output terminal is the common reference ground of described Bidirectional thyristor trigger circuit; Described first ac input end is connected to AC power phase line, and described second ac input end is connected to AC power zero line.
Described D.C. regulated power supply unit is provided with full-wave direct current voltage input end, DC power output end; Described full-wave direct current voltage input end is connected to the full-wave direct current voltage output end of described full wave rectifying unit.
Described zero passage lock-out pulse generation unit is provided with full-wave direct current voltage input end, zero passage lock-out pulse output; Described full-wave direct current voltage input end is connected to the full-wave direct current voltage output end of described full wave rectifying unit.
Described input signal Phototube Coupling unit is provided with phase shifting control frequency signal input end, DC supply input, phase shifting control frequency signal output; Described DC supply input is connected to the DC power output end of described D.C. regulated power supply unit.
Described phase-shift trigger unit is provided with zero passage clock terminal, phase shifting control frequency signal input end, DC supply input, the first triggering signal output, the second triggering signal output; Described zero passage clock terminal is connected to the zero passage lock-out pulse output of described zero passage lock-out pulse generation unit, and described DC supply input is connected to the DC power output end of described D.C. regulated power supply unit.
Described phase-shift trigger unit is made up of counter, the first NAND gate, the second NAND gate, the 3rd NAND gate, the 4th NAND gate, the first resistance, the second resistance, phase shift type Phototube Coupling trig driver.
Wherein,
Described phase shift type Phototube Coupling trig driver inside comprises the first light-emitting diode, optical controlled bidirectional thyrister, and outside comprises control electric current and flows into end, controls outflow of bus current end, the first phase shifting control output, the second phase shifting control output.
Described counter has frequency signal input end, carry signal output end, reset signal input, power supply positive input terminal, power-input; The power supply positive input terminal of described counter is connected to described DC supply input, and the power-input of described counter is connected to described common reference ground.
Be connected to the zero passage clock terminal of described phase-shift trigger unit after two input parallel connections of described first NAND gate, reset signal input that output is connected to described counter; An input of described second NAND gate is connected to the phase shifting control frequency signal input end of described phase-shift trigger unit, and another input is connected to the output of described 4th NAND gate; Be connected to the output of described second NAND gate after two input parallel connections of described 3rd NAND gate, the output of described 3rd NAND gate is connected to the frequency signal input end of described counter; The carry signal output end of described counter is connected to after two input parallel connections of described 4th NAND gate; The output of described 4th NAND gate, except the input being connected to described second NAND gate, is also connected to the control outflow of bus current end of described phase shift type Phototube Coupling trig driver; The control electric current of described phase shift type Phototube Coupling trig driver flows into one end that end is connected to described first resistance, and the other end of described first resistance is connected to described DC supply input; Be connected to described first triggering signal output after described first phase shifting control output and described second resistant series, described second phase shifting control output is connected to described second triggering signal output.
Described bidirectional thyristor main circuit unit is made up of bidirectional thyristor and load; First electrode of described bidirectional thyristor is connected to the phase line of AC power and the second triggering signal output of described phase-shift trigger unit simultaneously; The control pole of described bidirectional thyristor is connected to the first triggering signal output of described phase-shift trigger unit; After second electrode of described bidirectional thyristor and described load in series, be connected to the zero line of AC power.
Described full wave rectifying unit is made up of the first diode, the second diode, the 3rd diode, the 4th diode, described first ac input end is the tie-point of described first diode anode and described 3rd diode cathode, described second ac input end is the tie-point of described second diode anode and described 4th diode cathode, described full-wave direct current voltage output end is the tie-point of described first diode cathode and described second diode cathode, and described commutating voltage negative output terminal is the tie-point of described 3rd diode anode and described 4th diode anode.
Described D.C. regulated power supply unit is made up of the 5th diode, the first electric capacity, the 3rd resistance, the first voltage-stabiliser tube, described 5th diode anode is connected to described full-wave direct current voltage input end, described 5th diode cathode and described first capacitance cathode end, the 3rd resistance one end are bound up, described first electric capacity negative polarity end is connected to described common reference ground, be connected to described DC power output end after other one end of described 3rd resistance and described first voltage-stabiliser tube negative electrode connect, described first voltage-stabiliser tube anode is connected to described common reference ground.
Described zero passage lock-out pulse generation unit is made up of the 4th resistance, the 5th resistance, the second voltage-stabiliser tube, one end of described 4th resistance is connected to described full-wave direct current voltage input end, be connected to described zero passage lock-out pulse output after other one end of described 4th resistance, one end of described 5th resistance and described second voltage-stabiliser tube negative electrode connection, other one end of described 5th resistance and described second voltage-stabiliser tube anode are connected to described common reference ground.
Described input signal Phototube Coupling unit is made up of switching mode photoelectrical coupler, the 6th resistance, the 7th resistance; Described switching mode photoelectrical coupler inside comprises the second light-emitting diode, light-operated triode, and outside comprises reception input, receives output, exports collector terminal, exports emitter terminal; After described 7th resistance, switching mode photoelectrical coupler reception input, reception output are sequentially connected in series, be connected to the phase shifting control frequency signal input end of described input signal Phototube Coupling unit; Described output emitter terminal is connected to described common reference ground, be connected to the phase shifting control frequency signal output of described input signal Phototube Coupling unit after one client link of described output collector terminal and described 6th resistance, the other end of described 6th resistance is connected to described DC supply input.
Described first NAND gate, the second NAND gate, the 3rd NAND gate, the 4th NAND gate adopt with 4 the two independent NAND gate of input in the integrated NAND gate circuit of a slice CMOS, and the power supply positive input terminal of the integrated NAND gate circuit of described CMOS is connected to described DC supply input, is connected to described common reference ground power supply.
Described counter is use CD4040 to form nsystem up counter.
The bidirectional thyristor triggering method realized by foregoing circuit, comprising:
AC power is rectified into full-wave direct current voltage by the full wave rectifying unit be made up of the first diode, the second diode, the 3rd diode, the 4th diode; Full-wave direct current voltage through the bleeder circuit dividing potential drop of the 4th resistance, the 5th resistance composition, and by after the second voltage-stabiliser tube amplitude limit, obtains zero passage synchronization pulse; Described zero passage synchronization pulse is undersuing.
During AC power zero passage, on the one hand bidirectional thyristor end, makes zero passage synchronization pulse be low level on the other hand, this low level through the first NAND gate shaping and anti-phase after, output high level is to the reset signal input of counter; Reset signal is that high level is effective, counter is exported and resets; The carry signal output end of counter is low level, and this low level makes the 4th NAND gate export high level; The high level that 4th NAND gate exports controls the first light-emitting diode and the optical controlled bidirectional thyrister cut-off of phase shift type Phototube Coupling trig driver inside on the one hand, do not export triggering signal, control the second NAND gate on the other hand open, enable phase shifting control frequency signal after the second NAND gate, the 3rd NAND gate shaping, deliver to the frequency signal input end of counter.
After AC power zero passage, zero passage synchronization pulse becomes high level, and the first not gate output low level is to the reset signal input of counter, and it is invalid to reset when reset signal is low level, and counter starts to count the phase shifting control frequency signal of input; When the input of counter frequency signal input part nafter individual count pulse, the carry signal output end of counter becomes high level from low level, makes the output of the 4th NAND gate become low level from high level; The low level that 4th NAND gate exports is on the one hand after the first resistance current limliting, control the first lumination of light emitting diode of phase shift type Phototube Coupling trig driver inside, its inner optical controlled bidirectional thyrister conducting, after the second resistance current limliting, export triggering signal by the first triggering signal output, the second triggering signal output to bidirectional thyristor, control bidirectional thyristor conducting; The low level that 4th NAND gate exports blocks the second NAND gate on the other hand, make phase shifting control frequency signal can not be delivered to the frequency signal input end of counter by the second NAND gate, the frequency signal input end of counter keeps low level, and the output of counter temporarily remains unchanged and continues to export triggering signal to bidirectional thyristor by the first triggering signal output, the second triggering signal output; Until AC power zero passage next time, when zero passage synchronization pulse becomes low level again, bidirectional thyristor ends again, and counter exports and again resets, and removes triggering signal.
When described counter is nsystem up counter, the minimum value that described phase shifting angle phase shift range requires is α min, maximum is α maxtime, the frequency range of corresponding phase-shifted control signal is
The maximum phase-shifted control signal frequency of corresponding minimum phase shifting angle f max=( n× 180)/( α min × 10) kHz;
The minimum phase-shifted control signal frequency of corresponding maximum phase shifting angle f min=( n× 180)/( α max × 10) kHz.
Within maximum phase-shifted control signal frequency and minimum phase-shifted control signal frequency range, reduce the frequency of phase-shifted control signal, phase shifting angle increases; Increase the frequency of phase-shifted control signal, phase shifting angle reduces.
Described phase shifting control frequency signal delivers to phase-shift trigger unit after carrying out Phototube Coupling by input signal Phototube Coupling unit again.
Compared with prior art, tool of the present invention has the following advantages and beneficial effect:
The core devices of phase shifting control is CMOS counter, and use counter directly to the mode phase shift of the phase shifting control frequency signal counting of input, the phase shifting control frequency signal changing input gets final product phase shift, and principle is simple; The phase-shifted control signal inputing to counter has carried out Phototube Coupling and Schmidt's shaping, reset signal have carried out Schmidt's shaping, working stability, reliable; Cmos nand gate input impedance is high, and zero passage synchronizing signal can use 2 large resistance small-power resistance and a voltage-stabiliser tube, directly carries out dividing potential drop to the interchange full wave voltage after ac voltage rectifier and obtains, without the need to using synchrotrans; Circuit power consumption is low, and DC-stabilized circuit only uses 4 small-power elements such as 1 diode 1, individual electric capacity, 1 resistance, 1 voltage-stabiliser tube.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of circuit embodiments of the present invention.
Fig. 2 is the circuit diagram of circuit embodiments of the present invention.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
A structured flowchart for Bidirectional thyristor trigger circuit embodiment as shown in Figure 1, is made up of full wave rectifying unit 100, D.C. regulated power supply unit 200, zero passage lock-out pulse generation unit 300, input signal Phototube Coupling unit 400, phase-shift trigger unit 500, bidirectional thyristor main circuit unit 600.
The circuit diagram of circuit embodiments of the present invention as shown in Figure 2.
Described full wave rectifying unit 100 is provided with the first ac input end 1, second ac input end 2, full-wave direct current voltage output end U1, commutating voltage negative output terminal 0; Described commutating voltage negative output terminal 0 is the common reference ground GND of described Bidirectional thyristor trigger circuit.Described first ac input end 1 is connected to AC power phase line L, and described second ac input end 2 is connected to AC power zero line N.
The single phase alternating current power supply of described AC power to be voltage be 220V.
Described full wave rectifying unit 100 is made up of the first diode D1, the second diode D2, the 3rd diode D3, the 4th diode D4, described first ac input end 1 is the tie-point of the first diode D1 anode and the 3rd diode D3 negative electrode, described second ac input end 2 is the tie-point of the second diode D2 anode and the 4th diode D4 negative electrode, described full-wave direct current voltage output end U1 is the tie-point of the first diode D1 negative electrode and the second diode cathode D2, and described commutating voltage negative output terminal 0 is the tie-point of the 3rd diode D3 anode and the 4th diode anode D4.
Described D.C. regulated power supply unit 200 is provided with full-wave direct current voltage input end U1, DC power output end U2; Described full-wave direct current voltage input end U1 is connected to the full-wave direct current voltage output end U1 of full wave rectifying unit 100.
Described D.C. regulated power supply unit 200 is by the 5th diode D5, first electric capacity C1, 3rd resistance R3, first voltage-stabiliser tube DW1 forms, described 5th diode D5 anode is connected to full-wave direct current voltage input end U1, described 5th diode D5 negative electrode and described first electric capacity C1 positive ends, 3rd resistance R3 one end is bound up, described first electric capacity C1 negative polarity end is connected to described common reference ground GND, described DC power output end U2 is connected to after other one end of described 3rd resistance R3 and described first voltage-stabiliser tube DW1 negative electrode connect, described first voltage-stabiliser tube DW1 anode is connected to described common reference ground GND.
Described DC power output end U2 exports+5V direct voltage.
Described zero passage lock-out pulse generation unit 300 is provided with full-wave direct current voltage input end U1, zero passage lock-out pulse output P1; Described full-wave direct current voltage input end U1 is connected to the full-wave direct current voltage output end U1 of full wave rectifying unit 100.
Described zero passage lock-out pulse generation unit 300 is made up of the 4th resistance R4, the 5th resistance R5, the second voltage-stabiliser tube DW2, one end of described 4th resistance R4 is connected to full-wave direct current voltage input end U1, be connected to zero passage lock-out pulse output P1 after other one end of 4th resistance R4 and one end of the 5th resistance R5, the second voltage-stabiliser tube DW2 negative electrode connect, other one end of described 5th resistance R5, the second voltage-stabiliser tube DW2 anode are connected to common reference ground GND.
Described input signal Phototube Coupling unit 400 is provided with phase shifting control frequency signal input end P2, DC supply input U2, phase shifting control frequency signal output P3; Described DC supply input U2 is connected to the+5V DC power output end U2 of D.C. regulated power supply unit 200.
Described input signal Phototube Coupling unit 400 is made up of switching mode photoelectrical coupler M1, the 6th resistance R6, the 7th resistance R7.The present embodiment switching mode photoelectrical coupler M2 selects 4N25.
Described switching mode photoelectrical coupler M2 inside comprises the second LED 2, light-operated triode VT, and outside comprises reception input 12, receives output 13, exports collector terminal 14, exports emitter terminal 15.
After described 7th resistance R7, switching mode photoelectrical coupler reception input 12, reception output 13 are sequentially connected in series, be connected to phase shifting control frequency signal input end P2.
Described output emitter terminal 15 is connected to common reference ground GND, and be connected to phase shifting control frequency signal output P3 after a client link of described output collector terminal 14 and the 6th resistance R6, the other end of described 6th resistance R6 is connected to+5V DC power supply.
Described phase-shift trigger unit 500 is provided with zero passage clock terminal P1, phase shifting control frequency signal input end P3, DC supply input U2, the first triggering signal output G1, the second triggering signal output G2.
Described zero passage clock terminal P1 is connected to the zero passage lock-out pulse output P1 of zero passage lock-out pulse generation unit 300, and described DC supply input U2 is connected to the+5V DC power output end U2 of D.C. regulated power supply unit 200.
Described phase-shift trigger unit 500 is made up of counter, the first NAND gate F1, the second NAND gate F2, the 3rd NAND gate F3, the 4th NAND gate F4, the first resistance R1, the second resistance R2, phase shift type Phototube Coupling trig driver M1.
Described phase shift type Phototube Coupling trig driver M1 inside comprises the first LED 1, optical controlled bidirectional thyrister V1, and outside comprises control electric current and flows into end 8, controls outflow of bus current end 9, first phase shifting control output 11, second phase shifting control output 10; The present embodiment phase shift type Phototube Coupling trig driver M1 selects MOC3023.
Described counter has frequency signal input end CP, carry signal output end CO, reset signal input CR, power supply positive input terminal VDD, power-input VSS; The present embodiment counter is 12 binary system serial counter CD4040, carry signal output end CO is terminal count output Q6, and described power supply positive input terminal VDD is connected to+5V DC power supply, and described negative input end VSS is connected to common reference ground GND.
Described first NAND gate F1, the second NAND gate F2, the 3rd NAND gate F3, the 4th NAND gate F4 adopt with 4 the two independent NAND gate of input in the integrated NAND gate circuit of a slice CMOS, and the power supply positive input terminal of the integrated NAND gate circuit of described CMOS is connected to+5V DC power supply, is connected to common reference ground GND power supply.The integrated NAND gate circuit of the present embodiment CMOS is the 74HC132 of band Schmidt input.
Be connected to the zero passage clock terminal P1 of described phase-shift trigger unit after two input parallel connections of described first NAND gate F1, reset signal input CR that output is connected to counter; The output that an input of described second NAND gate F2 is connected to phase shifting control frequency signal input end P3, another input is connected to described 4th NAND gate F4; Be connected to the output of the second NAND gate F2 after two input parallel connections of described 3rd NAND gate F3, the output of described 3rd NAND gate F3 is connected to the frequency signal input end CP of counter; The carry signal output end CO of counter is connected to after two input parallel connections of described 4th NAND gate F4; The output of described 4th NAND gate F4, except an input of described second NAND gate F2, is also connected to the control outflow of bus current end 9 of described phase shift type Phototube Coupling trig driver M1; The control electric current of described phase shift type Phototube Coupling trig driver M1 flows into one end that end 8 is connected to the first resistance R1, and the other end of described first resistance R1 is connected to+5V DC power supply; Described first phase shifting control output 11 is connected to the first triggering signal output G1 after connecting with the second resistance R2, and described second phase shifting control output 10 is connected to the second triggering signal output G2.
Described bidirectional thyristor main circuit unit 600 is made up of bidirectional thyristor V and load.The first electrode T1 of described bidirectional thyristor V is connected to the phase line L of AC power and the second triggering signal output G2 of described phase-shift trigger unit 500 simultaneously; The control pole of described bidirectional thyristor V is connected to the first triggering signal output G1 of described phase-shift trigger unit 500; After the second electrode T2 of described bidirectional thyristor V and load in series, be connected to the zero line N of AC power.
The operation principle of the present embodiment Bidirectional thyristor trigger circuit is:
(1) zero passage synchronization pulse
220V AC power is rectified into full-wave direct current voltage U 1 by the full wave rectifying unit 100 be made up of the first diode D1, the second diode D2, the 3rd diode D3, the 4th diode D4, the bleeder circuit dividing potential drop that one tunnel the 4th resistance R4 of U1, the 5th resistance R5 form, and after being maximum+5V by the second voltage-stabiliser tube DW2 amplitude limit, obtain zero passage synchronization pulse P1, P1 is negative pulse synchronizing signal.
The minimum phase-shift control angle of circuits for triggering can be realized by the negative pulse width of modified zero pulse, such as, by increasing the 4th resistance R4 resistance or reducing the voltage ratio that the 5th resistance R5 resistance removes to reduce bleeder circuit, the negative pulse width of zero-crossing pulse broadens, and minimum phase-shift control angle becomes large; Otherwise increase the voltage ratio of described bleeder circuit, minimum phase-shift control angle reduces.
(2) D.C. regulated power supply
After another Lu Jing five diode D5 isolation of described full-wave direct current voltage U 1, deliver to the first electric capacity C1 filtering, after the 3rd resistance R3 current limliting, first voltage-stabiliser tube DW1 obtains stable+5V direct voltage, should power to input signal Phototube Coupling unit 400, phase-shift trigger unit 500 as D.C. regulated power supply by+5V direct voltage.
(3) input signal Phototube Coupling
After phase shifting control frequency signal P2 from other controllers is carried out Phototube Coupling by input signal Phototube Coupling unit 400, export from phase shifting control frequency signal output P3, deliver to phase-shift trigger unit 500.Between phase shifting control frequency signal P2 high period, after the 7th resistance R7 current limliting, inner second LED 2 luminescence of switching mode photoelectrical coupler M2 also controls light-operated triode VT saturation conduction, and phase shifting control frequency signal output P3 is low level; Between phase shifting control frequency signal P2 low period, inner second LED 2 of switching mode photoelectrical coupler M2 and light-operated triode VT all end, and phase shifting control frequency signal output P3 is high level.Phase shifting control frequency signal P3 is contrary with phase shifting control frequency signal P2 phase place, but frequency is identical.
(4) phase shifting control principle
During 220V AC power zero passage, on the one hand bidirectional thyristor V is ended, zero passage synchronization pulse P1 is made to be low level on the other hand, through the first NAND gate F1 shaping and anti-phase after export the reset signal input CR of high level to counter, now reset signal CR is effective, counter exports and resets, the carry signal output end CO(Q6 of counter) be low level, make the 4th NAND gate F4 export high level; First LED 1 and the optical controlled bidirectional thyrister V1 of the high level one side control phase shift type Phototube Coupling trig driver M1 inside that the 4th NAND gate F4 exports end, do not export triggering signal, control the second NAND gate F2 on the other hand open, enable phase shifting control frequency signal P3 after the second NAND gate F2, the 3rd NAND gate F3 shaping, deliver to the frequency signal input end CP of counter.
After 220V AC power zero passage, zero passage synchronization pulse P1 becomes high level, first not gate F1 output low level is to the reset signal input CR of counter, and now reset signal CR is invalid, and the phase shifting control frequency signal P3 that counter starts input CP inputs carries out plus coujnt; After counter frequency signal input part CP inputs 64 count pulses, the carry signal output end CO(Q6 of counter) become high level from low level, make the output of the 4th NAND gate F4 become low level from high level; The low level that 4th NAND gate F4 exports is on the one hand after the first resistance R1 current limliting, the first LED 1 controlling phase shift type Phototube Coupling trig driver M1 inside is luminous, its inner optical controlled bidirectional thyrister V1 conducting, after the second resistance R2 current limliting, export triggering signal by the first triggering signal output G1, the second triggering signal output G2 to bidirectional thyristor V, control bidirectional thyristor conducting; The low level that 4th NAND gate F4 exports blocks the second NAND gate F2 on the other hand, make phase shifting control frequency signal P3 can not be delivered to the frequency signal input end CP of counter by the second NAND gate F2, the frequency signal input end CP of counter keeps low level, the output of counter temporarily remains unchanged, and the first triggering signal output G1, the second triggering signal output G2 continue to export triggering signal to bidirectional thyristor V; Until 220V AC power zero passage next time, when zero passage synchronization pulse P1 becomes low level again, bidirectional thyristor V ends again, and counter exports and again resets, and removes triggering signal.
The frequency changing input phase-shifted control signal P2 can change triggering phase shifting angle, and when the phase-shifted control signal P2 frequency inputted increases, the corresponding cycle reduces, and the time of full 64 count pulses of meter reduces, and triggers phase shifting angle and reduces; When the phase-shifted control signal P2 frequency inputted reduces, the corresponding cycle increases, and the time of full 64 count pulses of meter increases, and triggers phase shifting angle and increases.If the minimum phase shifting angle required α min=30 °, maximum phase shifting angle α max=180 °, with minimum phase shifting angle α minthe frequency of corresponding maximum input phase-shifted control signal P2 is
f max=(64×180)/(30×10)=38.4kHz ;
With maximum phase shifting angle α maxthe frequency of corresponding minimum input phase-shifted control signal P2 is
f min=64/10=6.4kHz 。
When counter is nsystem up counter, namely mould is n, the minimum value that described phase shifting angle phase shift range requires is α min, maximum is α maxtime, the frequency range of corresponding phase-shifted control signal P2 is
f max=( N×180)/( α min ×10) kHz ;
f min=( N×180)/( α max ×10) kHz 。
(5) circuits for triggering feature
1. the core devices of phase shifting control is CMOS counter, and use counter directly to the mode phase shift of the phase shifting control frequency signal counting of input, the phase shifting control frequency signal changing input gets final product phase shift, and principle is simple; The phase-shifted control signal inputing to counter has carried out Phototube Coupling and Schmidt's shaping, reset signal have carried out Schmidt's shaping, working stability, reliable.
2. cmos nand gate input impedance is high, and zero passage synchronizing signal can use 2 large resistance small-power resistance and a voltage-stabiliser tube, directly carries out dividing potential drop to the interchange full wave voltage after the rectification of 220V phase voltage and obtains, without the need to using synchrotrans.Such as, the 4th resistance R4, the 5th resistance R5 all value 470k, the second voltage-stabiliser tube DW2 voltage stabilizing value 5V, the voltage effective value on the 4th resistance R4 is 215V, and its power consumption is 215 × 215 ÷ 470k=98mW; Voltage on 5th resistance R5 is by the second voltage-stabiliser tube DW2 amplitude limit, and power consumption is lower.
3. circuit power consumption is low.The maximum load of D.C. regulated power supply is the input control electric current of Phototube Coupling trig driver M1 and the saturation current of the light-operated triode VT of switching mode photoelectrical coupler M2, and the rated current of MOC3023 input side first LED 1 is 5mA; During the 6th resistance R6 selection 10k resistance, the saturation current of light-operated triode VT is 0.5mA; Therefore, the load current of whole D.C. regulated power supply is less than 6mA.

Claims (7)

1. a Bidirectional thyristor trigger circuit, is made up of full wave rectifying unit, D.C. regulated power supply unit, zero passage lock-out pulse generation unit, input signal Phototube Coupling unit, phase-shift trigger unit, bidirectional thyristor main circuit unit, it is characterized in that:
Described full wave rectifying unit is provided with the first ac input end, the second ac input end, full-wave direct current voltage output end, commutating voltage negative output terminal; Described commutating voltage negative output terminal is the common reference ground of described Bidirectional thyristor trigger circuit; Described first ac input end is connected to AC power phase line, and described second ac input end is connected to AC power zero line;
Described D.C. regulated power supply unit is provided with the first full-wave direct current voltage input end, DC power output end; Described first full-wave direct current voltage input end is connected to the full-wave direct current voltage output end of described full wave rectifying unit;
Described zero passage lock-out pulse generation unit is provided with the second full-wave direct current voltage input end, zero passage lock-out pulse output; Described second full-wave direct current voltage input end is connected to the full-wave direct current voltage output end of described full wave rectifying unit;
Described input signal Phototube Coupling unit is provided with the first phase shifting control frequency signal input end, the first DC supply input, phase shifting control frequency signal output; Described first DC supply input is connected to the DC power output end of described D.C. regulated power supply unit;
Described phase-shift trigger unit is provided with zero passage clock terminal, the second phase shifting control frequency signal input end, the second DC supply input, the first triggering signal output, the second triggering signal output; Described zero passage clock terminal is connected to the zero passage lock-out pulse output of described zero passage lock-out pulse generation unit, and described second DC supply input is connected to the DC power output end of described D.C. regulated power supply unit;
Described phase-shift trigger unit is made up of counter, the first NAND gate, the second NAND gate, the 3rd NAND gate, the 4th NAND gate, the first resistance, the second resistance, phase shift type Phototube Coupling trig driver; Wherein,
Described phase shift type Phototube Coupling trig driver inside comprises the first light-emitting diode, optical controlled bidirectional thyrister, and outside comprises control electric current and flows into end, controls outflow of bus current end, the first phase shifting control output, the second phase shifting control output;
Described counter has frequency signal input end, carry signal output end, reset signal input, power supply positive input terminal, power-input; The power supply positive input terminal of described counter is connected to described second DC supply input, and the power-input of described counter is connected to described common reference ground;
Be connected to the zero passage clock terminal of described phase-shift trigger unit after two input parallel connections of described first NAND gate, reset signal input that output is connected to described counter; An input of described second NAND gate is connected to the second phase shifting control frequency signal input end of described phase-shift trigger unit, and another input is connected to the output of described 4th NAND gate; Be connected to the output of described second NAND gate after two input parallel connections of described 3rd NAND gate, the output of described 3rd NAND gate is connected to the frequency signal input end of described counter; The carry signal output end of described counter is connected to after two input parallel connections of described 4th NAND gate; The output of described 4th NAND gate, except the input being connected to described second NAND gate, is also connected to the control outflow of bus current end of described phase shift type Phototube Coupling trig driver; The control electric current of described phase shift type Phototube Coupling trig driver flows into one end that end is connected to described first resistance, and the other end of described first resistance is connected to described second DC supply input; Be connected to described first triggering signal output after described first phase shifting control output and described second resistant series, described second phase shifting control output is connected to described second triggering signal output;
Described bidirectional thyristor main circuit unit is made up of bidirectional thyristor and load; First electrode of described bidirectional thyristor is connected to the phase line of AC power and the second triggering signal output of described phase-shift trigger unit simultaneously; The control pole of described bidirectional thyristor is connected to the first triggering signal output of described phase-shift trigger unit; After second electrode of described bidirectional thyristor and described load in series, be connected to the zero line of AC power;
Described first NAND gate, the second NAND gate, the 3rd NAND gate, the 4th NAND gate adopt with 4 the two independent NAND gate of input in the integrated NAND gate circuit of a slice CMOS, and the power supply positive input terminal of the integrated NAND gate circuit of described CMOS is connected to described second DC supply input, is connected to described common reference ground power supply;
Described counter is the N system up counter using CD4040 to form.
2. a kind of Bidirectional thyristor trigger circuit according to claim 1, it is characterized in that: described full wave rectifying unit is by the first diode, second diode, 3rd diode, 4th diode composition, described first ac input end is the tie-point of described first diode anode and described 3rd diode cathode, described second ac input end is the tie-point of described second diode anode and described 4th diode cathode, described full-wave direct current voltage output end is the tie-point of described first diode cathode and described second diode cathode, described commutating voltage negative output terminal is the tie-point of described 3rd diode anode and described 4th diode anode.
3. a kind of Bidirectional thyristor trigger circuit according to claim 2, it is characterized in that: described D.C. regulated power supply unit is by the 5th diode, first electric capacity, 3rd resistance, first voltage-stabiliser tube composition, described 5th diode anode is connected to described first full-wave direct current voltage input end, described 5th diode cathode and described first capacitance cathode end, 3rd resistance one end is bound up, described first electric capacity negative polarity end is connected to described common reference ground, described DC power output end is connected to after other one end of described 3rd resistance and described first voltage-stabiliser tube negative electrode connect, described first voltage-stabiliser tube anode is connected to described common reference ground.
4. a kind of Bidirectional thyristor trigger circuit according to claim 3, it is characterized in that: described zero passage lock-out pulse generation unit is made up of the 4th resistance, the 5th resistance, the second voltage-stabiliser tube, one end of described 4th resistance is connected to described second full-wave direct current voltage input end, be connected to described zero passage lock-out pulse output after other one end of described 4th resistance, one end of described 5th resistance and described second voltage-stabiliser tube negative electrode connection, other one end of described 5th resistance and described second voltage-stabiliser tube anode are connected to described common reference ground.
5. a kind of Bidirectional thyristor trigger circuit according to claim 4, is characterized in that: described input signal Phototube Coupling unit is made up of switching mode photoelectrical coupler, the 6th resistance, the 7th resistance; Described switching mode photoelectrical coupler inside comprises the second light-emitting diode, light-operated triode, and outside comprises reception input, receives output, exports collector terminal, exports emitter terminal; After described 7th resistance, switching mode photoelectrical coupler reception input, reception output are sequentially connected in series, be connected to the first phase shifting control frequency signal input end of described input signal Phototube Coupling unit; Described output emitter terminal is connected to described common reference ground, be connected to the phase shifting control frequency signal output of described input signal Phototube Coupling unit after one client link of described output collector terminal and described 6th resistance, the other end of described 6th resistance is connected to described first DC supply input.
6., by the bidirectional thyristor triggering method of circuit realiration described in any one of claim 1-5, it is characterized in that:
AC power is rectified into full-wave direct current voltage by the full wave rectifying unit be made up of the first diode, the second diode, the 3rd diode, the 4th diode; Full-wave direct current voltage through the bleeder circuit dividing potential drop of the 4th resistance, the 5th resistance composition, and by after the second voltage-stabiliser tube amplitude limit, obtains zero passage synchronization pulse; Described zero passage synchronization pulse is undersuing;
During AC power zero passage, on the one hand bidirectional thyristor end, makes zero passage synchronization pulse be low level on the other hand, this low level through the first NAND gate shaping and anti-phase after, output high level is to the reset signal input of counter; Reset signal is that high level is effective, counter is exported and resets; The carry signal output end of counter is low level, and this low level makes the 4th NAND gate export high level; The high level that 4th NAND gate exports controls the first light-emitting diode and the optical controlled bidirectional thyrister cut-off of phase shift type Phototube Coupling trig driver inside on the one hand, do not export triggering signal, control the second NAND gate on the other hand open, enable phase shifting control frequency signal after the second NAND gate, the 3rd NAND gate shaping, deliver to the frequency signal input end of counter;
After AC power zero passage, zero passage synchronization pulse becomes high level, and the first not gate output low level is to the reset signal input of counter, and it is invalid to reset when reset signal is low level, and counter starts to count the phase shifting control frequency signal of input; After counter frequency signal input part inputs N number of count pulse, the carry signal output end of counter becomes high level from low level, makes the output of the 4th NAND gate become low level from high level; The low level that 4th NAND gate exports is on the one hand after the first resistance current limliting, control the first lumination of light emitting diode of phase shift type Phototube Coupling trig driver inside, its inner optical controlled bidirectional thyrister conducting, after the second resistance current limliting, export triggering signal by the first triggering signal output, the second triggering signal output to bidirectional thyristor, control bidirectional thyristor conducting; The low level that 4th NAND gate exports blocks the second NAND gate on the other hand, make phase shifting control frequency signal can not be delivered to the frequency signal input end of counter by the second NAND gate, the frequency signal input end of counter keeps low level, and the output of counter temporarily remains unchanged and continues to export triggering signal to bidirectional thyristor by the first triggering signal output, the second triggering signal output; Until AC power zero passage next time, when zero passage synchronization pulse becomes low level again, bidirectional thyristor ends again, and counter exports and again resets, and removes triggering signal;
When described counter is N system up counter, the minimum value that described phase shifting angle phase shift range requires is α min, maximum is α maxtime, the frequency range of corresponding phase-shifted control signal is
The maximum phase-shifted control signal frequency f of corresponding minimum phase shifting angle max=(N × 180)/(α min× 10) kHz;
The minimum phase-shifted control signal frequency f of corresponding maximum phase shifting angle min=(N × 180)/(α max× 10) kHz;
Within maximum phase-shifted control signal frequency and minimum phase-shifted control signal frequency range, reduce the frequency of phase-shifted control signal, phase shifting angle increases; Increase the frequency of phase-shifted control signal, phase shifting angle reduces.
7. bidirectional thyristor triggering method according to claim 6, is characterized in that: described phase shifting control frequency signal delivers to phase-shift trigger unit after carrying out Phototube Coupling by input signal Phototube Coupling unit again.
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