CN103260125B - Chip-packaging structure and its manufacture method - Google Patents
Chip-packaging structure and its manufacture method Download PDFInfo
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- CN103260125B CN103260125B CN201310127767.6A CN201310127767A CN103260125B CN 103260125 B CN103260125 B CN 103260125B CN 201310127767 A CN201310127767 A CN 201310127767A CN 103260125 B CN103260125 B CN 103260125B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
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- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
- Electrostatic, Electromagnetic, Magneto- Strictive, And Variable-Resistance Transducers (AREA)
Abstract
A kind of chip-packaging structure and its manufacture method.Chip-packaging structure includes a substrate, an electro-acoustic wave chip, a lid structure and an adhesive body.Substrate has a relative first substrate surface, a second substrate surface and an acoustic aperture.There is a line layer on first substrate surface.Electro-acoustic wave chip is configured on the first substrate surface of substrate, and is electrically connected to line layer.One active surface of electro-acoustic wave chip is directed towards acoustic aperture.Lid structure is configured on the first substrate surface of substrate, and is used to accommodating electro-acoustic wave chip with an accommodation space.Line layer on the outside of adhesive body bag covered structure and lid structure.One of substrate and adhesive body have several conductive through holes.Conductive through holes are directly contacted with the line layer, and are electrically connected to electro-acoustic wave chip via line layer.
Description
Technical field
The invention relates to a kind of chip-packaging structure and its manufacture method, and in particular to a kind of silicon microelectromechanicgyroscope
Microphone (silicon MEMS microphone) chip-packaging structure and its manufacture method.
Background technology
General micro-electro-mechanical microphone packaging part is that MEMS microphone chip is integrated with other chips such as application-specific
The configurations such as circuit (ASIC), reading IC chip utilize the shade shelter with accommodation space in single substrate
Some chips.Wherein different chips is electrically connected to each other using routing (trace).However, this micro-electro-mechanical microphone is encapsulated
Part has big size, therefore is unfavorable for applying to micro device, and use value is restricted with elasticity.
The content of the invention
The present invention is related to a kind of chip-packaging structure and its manufacture method.Chip-packaging structure has small size.
According to an embodiment, a kind of chip-packaging structure is proposed, it includes a substrate, an electro-acoustic wave chip (acoustic
Transducer chip), a lid structure (cap) and an adhesive body.Substrate has a relative first substrate surface, one second
Substrate surface and an acoustic aperture.There is a line layer on first substrate surface.Electro-acoustic wave chip configures the first substrate table in substrate
On face, and it is electrically connected to line layer.One active surface of electro-acoustic wave chip is directed towards acoustic aperture.Lid structure is configured the first of substrate
On substrate surface, and it is used to accommodating electro-acoustic wave chip with an accommodation space.On the outside of adhesive body bag covered structure and lid structure
Line layer.One of substrate and adhesive body have several conductive through holes.Conductive through holes are directly contacted with line layer, and via line
Road floor is electrically connected to electro-acoustic wave chip.
According to an embodiment, a kind of chip-packaging structure is proposed, it includes a substrate, an electro-acoustic wave chip and a shade.
Substrate have a relative first substrate surface, a second substrate surface, an acoustic aperture with it is several extend in first substrate surface with
Conductive through holes between second substrate surface.There is a line layer to be electrically connected to conductive through holes on first substrate surface.Electroacoustic
Ripple chip is configured on the first substrate surface of substrate, and is electrically connected to line layer.One active surface of electro-acoustic wave chip is court
To acoustic aperture.Shade is configured on the first substrate surface of substrate, and is used to accommodating electro-acoustic wave chip with an accommodation space.
According to an embodiment, a kind of manufacture method of chip-packaging structure is proposed, it is comprised the following steps.One base is provided
Plate.Substrate has a relative first substrate surface, a second substrate surface and an acoustic aperture.There is a line on first substrate surface
Road floor.An electro-acoustic wave chip is configured on the first substrate surface of substrate, and is electrically connected to line layer.The one of electro-acoustic wave chip
Active surface is directed towards acoustic aperture.A lid structure is configured on the first substrate surface of substrate, and is used to house with an accommodation space
Electro-acoustic wave chip.Using the line layer on the outside of an adhesive body bag covered structure and lid structure.In one of substrate and adhesive body
It is middle to form several conductive through holes.Conductive through holes are directly contacted with line layer, and are electrically connected to electro-acoustic wave chip via line layer.
More preferably understand to have to above-mentioned and other aspect of the invention, preferred embodiment cited below particularly, and coordinate attached
Figure, is described in detail below：
Brief description of the drawings
Fig. 1 illustrates the chip-packaging structure in an embodiment.
Fig. 2 illustrates the upper schematic diagram according to an embodiment SMIS chip package.
Fig. 3 illustrates the chip-packaging structure in an embodiment.
Fig. 4 illustrates the upper schematic diagram according to an embodiment SMIS chip package.
Fig. 5 illustrates the upper schematic diagram according to an embodiment SMIS chip package.
Fig. 6 illustrates the chip-packaging structure in an embodiment.
Fig. 7 illustrates the chip-packaging structure in an embodiment.
Fig. 8 illustrates the chip-packaging structure in an embodiment.
Fig. 9 A to Fig. 9 J illustrate the manufacture method of the chip-packaging structure according to an embodiment.
Figure 10 A to Figure 10 F illustrate the manufacture method of the chip-packaging structure according to an embodiment.
Figure 11 A to Figure 11 D illustrate the manufacture method of the chip-packaging structure according to an embodiment.
Figure 12 A to Figure 12 D illustrate the manufacture method of the chip-packaging structure according to an embodiment.
Symbol description：
102nd, 202,302,402,502~chip-packaging structure；104~substrate；106~electro-acoustic wave chip；108~lid knot
Structure；110~adhesive body；112~first substrate surface；114~second substrate surface；116~line layer；118~insulating barrier；
120th, 121~opening；122~acoustic aperture；124~active surface；126~conductive pad；128~conductive projection；130~vibrating diaphragm；132~
Resonator chamber；134th, 134A~conducting resinl；138th, 138A~accommodation space；140th, 140A, 140B~conductive through holes；142~table
Face；144th, 144A~conductive pad；146th, 146A~solder ball；147~upper surface；148th, 150,150A, 150B~wire；152
~shade；154~accommodation space；156th, 156A, 156B~perforation.
Specific embodiment
Fig. 1 is refer to, it is illustrated according to an embodiment SMIS chip package 102, including a substrate 104, an electroacoustic wave
The lid structure (cap) 108 of chip (acoustic transducer chip) 106, one and an adhesive body 110.
Substrate 104 has relative a first substrate surface 112 and a second substrate surface 114.First substrate surface 112
It is upper that there is a line layer 116.Insulating barrier 118 is configured on line layer 116, and with 120,121 exposed division separated times of several openings
Road floor 116.Substrate 104 has an acoustic aperture 122, may be used to the sound wave outside receiving.
Electro-acoustic wave chip 106 can be configured on the first substrate surface 112 of substrate 104 via Flip Chip, and by master
Conductive pad 126 on dynamic face 124 is electrically connected to line layer 116, wherein electroacoustic wave with the conductive projection 128 of filling opening 120
The active surface 124 of chip 106 is directed towards the acoustic aperture 122 of substrate 104.Electro-acoustic wave chip 106 includes MEMS microphone chip
(MEMS microphone die).The active surface 124 of electro-acoustic wave chip 106 has vibrating diaphragm 130.Electro-acoustic wave chip 106 has altogether
Shake chamber 132.Conductive projection 128 may include solder material, copper, or other suitable conductive materials.
Several conducting resinls 134 separated from each other are configured in the opening 121 of insulating barrier 118, and are electrically connected to opening 121
The line layer 116 for exposing.
Lid structure 108 is configured on the first substrate surface 112 of substrate 104, and is used to house with an accommodation space 138
Single electro-acoustic wave chip 106.The accommodation space 138 connected with acoustic aperture 122 can be used as the resonator chamber of electro-acoustic wave chip 106.
In an embodiment, lid structure 108 is via conducting resinl 134 to be pasted to substrate 104 and be electrically connected to line layer 116.Gai Jie
The material of structure 108 includes metal or other suitable conductive materials.
The cap structure 108 of adhesive body 110 and the line layer 116 and insulating barrier 118 in the outside of lid structure 108.For example,
Adhesive body 110 includes organic resin epoxy, or other suitable insulating materials.Adhesive body 110 has several leading with insulating barrier 118
Electroporation 140, therefore conductive through holes 140 and the directly contact of line layer 116, and conductive through holes 140 just can be via line layer 116
Electro-acoustic wave chip 106 and lid structure 108 are electrically connected to, effectively to reach structure slimming and the purpose for reducing electrically loss.
Other contact structures being electrically connected with conductive through holes 140 can be configured on the surface 142 of adhesive body 110, for example
Conductive pad 144 shown in Fig. 1 and solder ball 146, chip-packaging structure 102 by its physical connection and can be electrically connected to other letters
Number end or apparatus structure.In an embodiment, for example, lid structure 108 is by conducting resinl 134, line layer 116, conduction
Perforation 140, conductive pad 144 is electrically connected to the earth terminal outside with solder ball 146, and lid structure 108 can be used as electromagnetic wave
Interference (Electromagnetic Interference, EMI) protective action.
Fig. 2 is refer to, its upper schematic diagram for illustrating chip-packaging structure 102 as shown in Figure 1.Line layer 116 includes
Several wires 148 and wire 150.Conductive projection 128 in electro-acoustic wave chip 106 is to be electrically connected to conduction via wire 148
Perforation 140.Position in the opening 121 of insulating barrier 118 and in the conducting resinl 134 of spot distribution is electrically connected with via wire 150
To conductive through holes 140, lid structure 108 because directly being contacted with conducting resinl 134, just can via conducting resinl 134 and wire 150 and it is electrical
Conductive through holes 140 are connected to, conductive through holes 140 are for example electrically connected to an external ground power supply, and make lid structure 108 with outside
Earthing power supply is electrically connected with.
Fig. 3 is refer to, it is illustrated according to an embodiment SMIS chip package 202.The chip-packaging structure 202 of Fig. 3 with
Difference between the chip-packaging structure 102 of Fig. 1 is that a part of conducting resinl 134A is disposed on the upper surface of insulating barrier 118
147, and the conducting resinl 134A of another part is filled in the opening 121 of insulating barrier 118, lid structure 108 is electrically connected
It is connected to the line layer 116 and conductive through holes 140 for exposing opening 121.
Fig. 4 is refer to, it illustrates the upper schematic diagram of chip-packaging structure 202 as shown in Figure 3 in an embodiment.Line
Road floor 116 includes several wires 148 and wire 150A.Conductive projection 128 in electro-acoustic wave chip 106 is via the electricity of wire 148
Property is connected to conductive through holes 140.The conducting resinl 134A of strip is via the upper surface 147 (Fig. 3) for being arranged at insulating barrier 118
Part, with filling insulating barrier 118 opening 121 in part and be electrically connected on the first substrate surface 112 of substrate 104
Wire 150A and conductive through holes 140.Because conducting resinl 134A is a L-type structure in the present embodiment, via increase lid structure 108 with
The contact area of conducting resinl 134A, reaches the purpose of the physics of stable lid structure 108 and electrical characteristic.
Fig. 5 is refer to, it illustrates the upper schematic diagram of chip-packaging structure 202 as shown in Figure 3 in an embodiment.Figure
Difference between 5 and Fig. 4 is that conducting resinl 134A is arranged to ring-type, and is via the upper surface for being arranged at insulating barrier 118
Part in the part of 147 (Fig. 3), with the opening 121 of filling insulating barrier 118 is being electrically connected to wire 150B and conductive through holes
140, via the contact area for increasing lid structure 108 and conducting resinl 134A, the physics of stable lid structure 108 is reached with electrical characteristic
Purpose.
The configuration of the conducting resinl of embodiment is not limited to the mode such as Fig. 2, Fig. 4 and Fig. 5, and can be according to other physical conditions
Demand (for example the shape of lid structure 108, manufacturing cost etc. are considered) suitably modulation.
Fig. 6 is refer to, it is illustrated according to an embodiment SMIS chip package 302.The chip-packaging structure 302 of Fig. 6 with
Difference between the chip-packaging structure 202 of Fig. 3 is that substrate 104 has several conductive through holes 140A, and conductive through holes 140A
Electro-acoustic wave chip 106 and conducting resinl 134A are electrically connected to via line layer 116.Conductive through holes 140A may include solder material.
In some embodiments, conducting resinl 134A has the configuration as shown in Fig. 4 or Fig. 5.Conducting resinl 134A is not limited to different piece
Configuration is on insulating barrier 118 and fill opening 121, and corresponding opening 121 that can be as shown in Figure 1 is configured, and with such as Fig. 2 institutes
The distribution shown.
Fig. 7 is refer to, it is illustrated according to an embodiment SMIS chip package 402.The chip-packaging structure 402 of Fig. 7 with
Difference between the chip-packaging structure 102 of Fig. 1 is to eliminate insulating barrier 118 and conducting resinl 134.Furthermore, lid structure 108
It is disposed on line layer 116, and is directly electrically connected with line layer 116.
Fig. 8 is refer to, it is illustrated according to an embodiment SMIS chip package 502.Fig. 8 chip-packaging structures 502 and Fig. 1
Chip-packaging structure 102 between difference be to eliminate insulating barrier 118 and conducting resinl 134.Furthermore, shade (lid) 152
Configuration is used to house single electro-acoustic wave chip on the first substrate surface 112 of substrate 104 with an accommodation space 154
106 with line layer 116.The accommodation space 154 connected with acoustic aperture 122 can be used as the resonator chamber of electro-acoustic wave chip 106.Yu Yishi
In applying example, for example, the material of shade 152 includes metal or other suitable conductive materials, and can be electrically connected to outside one
The earth terminal in portion, as Electromagnetic Interference protective action.Substrate 104 has several conductive through holes 140B, and conductive through holes 140B
Electro-acoustic wave chip 106 is electrically connected to via line layer 116.Can be configured on the second substrate surface 114 of substrate 104 and conduction
Other contact structures that perforation 140B is electrically connected with, such as conductive pad 144A shown in Fig. 8 and solder ball 146A, by it by chip
The physical connection of encapsulating structure 502 is simultaneously electrically connected to other signal ends or apparatus structure.In other embodiment, conductive through holes
140B is replaceable into as shown in Figure 6 by the structure that solder material filling perforation is formed, and omits conductive pad 144A and solder ball
146A, anti-is as the same.
In embodiment, chip-packaging structure is the encapsulating structure of chip-scale (chip-scale), with small size
And can apply to various apparatus systems, therefore value is high.
Fig. 9 A to Fig. 9 J illustrate the manufacture method of the chip-packaging structure according to an embodiment.
Fig. 9 A are refer to, line layer 116 is formed on the first substrate surface 112 of substrate 104.Substrate 104 may include glass
Glass substrate, it has preferably insulation effect and low cost.Substrate 104 can be manufactured with the technique of wafer scale.In an embodiment,
The forming method of line layer 116 is included on first substrate surface 112 and forms conductive layer (including metal such as copper or other are suitable
Conductive material), then patterned conductive layer is forming line layer 116.Line layer 116 may include wire, conductive pad etc..
Fig. 9 B are refer to, insulating barrier 118 is formed on the first substrate surface 112 of substrate 104 and line layer 116.Yu Yi
In embodiment, the forming method of insulating barrier 118 is included on first substrate surface 112 and line layer 116 and forms insulation film, so
Insulation film is patterned afterwards to form opening 120, the opening 121 of exposed portion line layer 116.In certain embodiments, can be through
The conductive pad of line layer 116 is defined by the opening 120 of insulating barrier 118, opening 121.
Fig. 9 C are refer to, acoustic aperture 122 is formed in substrate 104 and insulating barrier 118.Acoustic aperture 122 can drill or etch
Mode is formed, such as the mode such as deep reactive ion etching, laser-induced thermal etching, wet chemical etch.In an embodiment, substrate
104 include silicon substrate, its process is simple for forming acoustic aperture 122 (perforation).Substrate 104 can be manufactured with the technique of wafer scale.
Fig. 9 D are refer to, can be configured on the first substrate surface of substrate 104 electro-acoustic wave chip 106 via Flip Chip
On 112, and line layer is electrically connected to the conductive projection 128 of filling opening 120 by the conductive pad 126 on active surface 124
116。
Refer to Fig. 9 E, using mode for dispensing glue, by conducting resinl 134 configure in the opening 121 of insulating barrier 118 with it is exhausted
In edge layer 118.Lid structure 108 is configured on the first substrate surface 112 of substrate 104, wherein electro-acoustic wave chip 106 is accommodating
In the accommodation space 138 of lid structure 108.In an embodiment, lid structure 108 is to be pasted to substrate 104 via conducting resinl 134
And it is electrically connected to line layer 116.
Fig. 9 F are refer to, the line layer 116 with the outside of lid structure 108 and insulation using the cap structure 108 of adhesive body 110
Layer 118.
Fig. 9 G are refer to, the perforation 156 for exposing line layer 116 is formed in adhesive body 110 and insulating barrier 118.Perforation 156
The mode that can be drilled or etch is formed, such as the mode such as deep reactive ion etching, laser-induced thermal etching, wet chemical etch.
Fig. 9 H are refer to, using conductive material filling perforation 156 to form conductive through holes 140, makes conductive through holes 140 and line
The directly contact of road floor 116.
Fig. 9 I are refer to, the conductive pad being electrically connected with conductive through holes 140 can be configured on the surface 142 of adhesive body 110
144 with solder ball 146.
Fig. 9 J are refer to, cutting step is carried out, the unit of several chip-packaging structures 102 is separated.
Figure 10 A to Figure 10 F illustrate the manufacture method of the chip-packaging structure according to an embodiment.Previous step and Fig. 9 A
It is similar to 9B figures, no longer described in this.
Figure 10 A are refer to, acoustic aperture 122 is formed in substrate 104 and insulating barrier 118.Additionally, from second substrate surface 114
The perforation 156A for exposing line layer 116 is formed toward substrate 104.Perforation 156A can drill or the mode that etches is formed, for example
The modes such as deep reactive ion etching, laser-induced thermal etching, wet chemical etch.In an embodiment, substrate 104 includes silicon substrate,
It forms acoustic aperture 122, the process is simple of perforation 156A.In another embodiment, substrate 104 include glass substrate, its have compared with
Good insulation effect and low cost.Substrate 104 is not limited to silicon substrate and glass substrate, and may include other suitable substrates.
Substrate 104 can be manufactured with the technique of wafer scale.
Figure 10 B are refer to, can be configured on the first substrate surface of substrate 104 electro-acoustic wave chip 106 via Flip Chip
It is on 112 and electrical with the conductive projection 128 of filling opening 120 by the conductive pad 126 on the active surface 124 of electro-acoustic wave chip 106
It is connected to line layer 116.
Refer to Figure 10 C, using mode for dispensing glue, by conducting resinl 134A configurations in the opening 121 of insulating barrier 118 with
On insulating barrier 118.Lid structure 108 is configured on the first substrate surface 112 of substrate 104, wherein electro-acoustic wave chip 106 is to hold
Put in the accommodation space 138 of lid structure 108.In an embodiment, lid structure 108 is to be pasted to substrate via conducting resinl 134A
104 and it is electrically connected to line layer 116.
Refer to Figure 10 D, using the outside of the cap structure 108 of adhesive body 110 and lid structure 108 line layer 116 with it is exhausted
Edge layer 118.
Figure 10 E are refer to, using solder material filling perforation 156A, to form conductive through holes 140A.In other embodiment
In, solder material can be replaced with other suitable conductive materials, such as copper, aluminium etc..
Figure 10 F are refer to, cutting step is carried out, the unit of several chip-packaging structures 202 is separated.
Figure 11 A to Figure 11 D illustrate the manufacture method of the chip-packaging structure according to an embodiment.
Figure 11 A are refer to, line layer 116 is formed on the first substrate surface 112 of substrate 104.Formed in substrate 104
Acoustic aperture 122.Electro-acoustic wave chip 106 can be configured on the first substrate surface 112 of substrate 104, and passed through via Flip Chip
Conductive pad 126 on the active surface 124 of electro-acoustic wave chip 106 is electrically connected to line layer 116 with conductive projection 128.By lid structure
On the first substrate surface 112 of substrate 104, wherein electro-acoustic wave chip 106 is to be contained in housing for lid structure 108 for 108 configurations
In the 138A of space.
Figure 11 B are refer to, using the cap structure 108 of adhesive body 110 and the line layer 116 in the outside of lid structure 108.
Figure 11 C are refer to, the perforation 156 for exposing line layer 116 is formed in adhesive body 110.Furthermore, using conductive material
Filling perforates 156 to form conductive through holes 140.Can be configured on the surface 142 of adhesive body 110 and electrically connected with conductive through holes 140
The conductive pad 144 for connecing and solder ball 146.
Figure 11 D are refer to, cutting step is carried out, the unit of several chip-packaging structures 402 is separated.
Figure 12 A to Figure 12 D illustrate the manufacture method of the chip-packaging structure according to an embodiment.
Figure 12 A are refer to, line layer 116 is formed on the first substrate surface 112 of substrate 104.Formed in substrate 104
Acoustic aperture 122.Electro-acoustic wave chip 106 can be configured on the first substrate surface 112 of substrate 104, and passed through via Flip Chip
Conductive pad 126 on the active surface 124 of electro-acoustic wave chip 106 is electrically connected to line layer 116 with conductive projection 128.
Figure 12 B are refer to, the perforation 156B for exposing line layer 116 is formed in substrate 104.Perforation 156B can drill or
The mode of etching is formed, such as the mode such as deep reactive ion etching, laser-induced thermal etching, wet chemical etch.Furthermore, using conduction
Material filling perforates 156B to form conductive through holes 140B.Can be configured on the second substrate surface 114 of substrate 104 and be worn with conduction
The conductive pad 144A that hole 140B is electrically connected with and solder ball 146A.
Figure 12 C are refer to, cutting step is carried out, several cellular constructions are separated.
Figure 12 D are refer to, the shade 152 with accommodation space 154 is configured on the first substrate surface 112 of substrate 104
On, wherein electro-acoustic wave chip 106 and line layer 116 is contained in accommodation space 154.In another embodiment, also can first by
Shade 152 with accommodation space 154 is configured on the first substrate surface 112 of substrate 104, then carries out cutting step.
The chip-packaging structure and its manufacture method of embodiment can be applied to the encapsulation of wafer scale (wafer level).
In sum, although the present invention is disclosed above with preferred embodiment, so it is not limited to the present invention.This hair
Bright those of ordinary skill in the art, without departing from the spirit and scope of the present invention, when various changes can be made
With retouching.Therefore, protection scope of the present invention is worked as and is defined depending on those as defined in claim.
Claims (10)
1. a kind of chip-packaging structure, including：
One substrate, with a relative first substrate surface, a second substrate surface and an acoustic aperture, has on the first substrate surface
There is a line layer；
One electro-acoustic wave chip, configures on the first substrate surface of the substrate and electrical by conductive pad and conductive projection
The line layer is connected to, an active surface of the electro-acoustic wave chip is directed towards the acoustic aperture；
One conductive cover structure, configures on the first substrate surface of the substrate, and is used to house the electricity with an accommodation space
Sound wave chip；And
One adhesive body, coats the line layer on the outside of the lid structure and the lid structure, with configuring one on a surface and the surface
Contact structures,
Wherein the adhesive body has several conductive through holes, and those conductive through holes are directly contacted with the line layer, and via the circuit
Layer is electrically connected to the electro-acoustic wave chip, and is electrically connected with the contact structures.
2. chip-packaging structure as claimed in claim 1, further includes an insulating barrier, configures on the line layer, the insulating barrier
With several opening exposed portion line layers.
3. chip-packaging structure as claimed in claim 2, further includes several conducting resinls separated from each other, configures in the insulating barrier
Those openings in, and be electrically connected to those line layers for exposing of opening, the wherein lid structure is via those conducting resinls
It is pasted to the substrate and is electrically connected to the line layer.
4. chip-packaging structure as claimed in claim 2, further includes an at least conducting resinl, and configuration on which insulating layer, and is somebody's turn to do
A part for an at least conducting resinl is position at least one those openings, and is electrically connected at least one opening and exposes
The line layer, the wherein lid structure is via an at least conducting resinl to be pasted to the substrate and be electrically connected to the line layer.
5. chip-packaging structure as claimed in claim 1, wherein lid structure is electrically connected to an earth terminal.
6. a kind of chip-packaging structure, including：
One substrate, first base is extended in a relative first substrate surface, a second substrate surface, an acoustic aperture with several
Conductive through holes between plate surface and the second substrate surface, there is a line layer to be electrically connected to this on the first substrate surface
A little conductive through holes；
One electro-acoustic wave chip, configures on the first substrate surface of the substrate and electrical by conductive pad and conductive projection
The line layer is connected to, an active surface of the electro-acoustic wave chip is directed towards the acoustic aperture；And
One shade, it is made up of a kind of conductive material, configures on the first substrate surface of the substrate, and with an accommodating sky
Between be used to house the electro-acoustic wave chip,
Wherein the acoustic aperture connects the resonator chamber for use as the electro-acoustic wave chip with the accommodation space.
7. the chip-packaging structure as described in claim 1 or the 6th, the substrate includes silicon substrate or glass substrate.
8. a kind of manufacture method of chip-packaging structure, including：
A substrate is provided, the substrate has a relative first substrate surface, a second substrate surface and an acoustic aperture, first base
There is a line layer in plate surface；
An electro-acoustic wave chip is configured on the first substrate surface of the substrate, and is electrically connected by conductive pad and conductive projection
The line layer is connected to, an active surface of the wherein electro-acoustic wave chip is directed towards the acoustic aperture；
A conductive cover structure is configured on the first substrate surface of the substrate, and is used to house the electroacoustic with an accommodation space
Ripple chip；
The line layer on the outside of the lid structure and the lid structure is coated using an adhesive body, the adhesive body has a surface and the table
A contact structures are configured on face；And
Several conductive through holes are formed in the adhesive body, those conductive through holes are directly contacted with the line layer, and via the circuit
Layer is electrically connected to the electro-acoustic wave chip, and is electrically connected with the contact structures.
9. the manufacture method of chip-packaging structure as claimed in claim 8, further includes to form an insulating barrier on the line layer,
Wherein the insulating barrier has several opening exposed portion line layers.
10. the manufacture method of chip-packaging structure as claimed in claim 9, further includes one conducting resinl of configuration, and the conducting resinl is extremely
A few part is disposed in those openings at least one of the insulating barrier, and is electrically connected to the line layer, and the lid structure is
The substrate is pasted to via those conducting resinls and be electrically connected to the line layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310127767.6A CN103260125B (en) | 2013-04-12 | 2013-04-12 | Chip-packaging structure and its manufacture method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310127767.6A CN103260125B (en) | 2013-04-12 | 2013-04-12 | Chip-packaging structure and its manufacture method |
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| Publication Number | Publication Date |
|---|---|
| CN103260125A CN103260125A (en) | 2013-08-21 |
| CN103260125B true CN103260125B (en) | 2017-06-06 |
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| CN201310127767.6A Active CN103260125B (en) | 2013-04-12 | 2013-04-12 | Chip-packaging structure and its manufacture method |
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| CN104979298B (en) * | 2015-06-26 | 2017-11-21 | 江西芯创光电有限公司 | A kind of package substrate and its manufacture craft |
| CN106608613A (en) * | 2015-10-24 | 2017-05-03 | 美律电子(深圳)有限公司 | Chip package of micro-electro-mechanical system and manufacturing method of chip package |
| CN110759311A (en) * | 2019-10-29 | 2020-02-07 | 太极半导体（苏州）有限公司 | Leadless MEMS chip packaging structure based on window type substrate and process thereof |
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| CN201846474U (en) * | 2010-10-12 | 2011-05-25 | 歌尔声学股份有限公司 | Silicon microphone |
| CN101325823B (en) * | 2007-06-11 | 2011-08-17 | 美律实业股份有限公司 | Encapsulation construction for silicon crystal microphone |
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| US9215519B2 (en) * | 2010-07-30 | 2015-12-15 | Invensense, Inc. | Reduced footprint microphone system with spacer member having through-hole |
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| CN101325823B (en) * | 2007-06-11 | 2011-08-17 | 美律实业股份有限公司 | Encapsulation construction for silicon crystal microphone |
| CN101534465A (en) * | 2008-03-11 | 2009-09-16 | 佳世达科技股份有限公司 | Micro electronmechanical microphone and packaging method thereof |
| CN201846474U (en) * | 2010-10-12 | 2011-05-25 | 歌尔声学股份有限公司 | Silicon microphone |
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