CN103218003B - Low-dropout voltage stabilizer with multiple power sources input - Google Patents
Low-dropout voltage stabilizer with multiple power sources input Download PDFInfo
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- CN103218003B CN103218003B CN201310149589.7A CN201310149589A CN103218003B CN 103218003 B CN103218003 B CN 103218003B CN 201310149589 A CN201310149589 A CN 201310149589A CN 103218003 B CN103218003 B CN 103218003B
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Abstract
The invention provides a low-dropout voltage stabilizer with multiple power sources input. The low-dropout voltage stabilizer with the multiple power sources input comprises a first power source input end, a second power source input end, an output end, an error amplifying circuit, a first adjustment tube and a second adjustment tube, wherein the first adjustment tube is connected between the first power source input end and the output end, the second adjustment tube is connected between the second power source input end and the output end, and the error amplifying circuit is used for generating control signals according to feedback voltage and reference voltage. When the first power source input end is connected with a first power source, the second adjustment tube is stopped, and an output end of an error amplifier is connected with a control end of the first adjustment tube. When the second power source input end is connected with a second power source, the first adjustment tube is stopped, and the output end of the error amplifier is connected with a control end of the second adjustment tube. Therefore, at least two input power sources are supported, the area of a chip is small, and the cost of the chip is low.
Description
[technical field]
The present invention relates to a kind of low-dropout regulator, the low-dropout regulator of particularly a kind of many power supply inputs.
[background technology]
Nowadays, mancarried electronic aid (such as, panel computer, smart mobile phone, notebook computer etc.) substantially adopt multiple power supply to power to it, described power supply can be the lithium battery of device interior, also can for can be connect the external power source that the interface units such as charger, adapter or USB interface are connected with mancarried electronic aid by outside.Usually, when external power source is not connected with described mancarried electronic aid, by lithium battery, mancarried electronic aid is powered; When external power source is connected with described mancarried electronic aid, lithium battery power supply circuit is cut off, and external power source charges on the one hand inner lithium battery, powers, to ensure that this equipment can normally work on the other hand to mancarried electronic aid.In mancarried electronic aid, after the supply voltage that the supply voltage provided by lithium battery usually through voltage stabilizer or external power source provide carries out voltage stabilizing process, reoffer to its built-in system, to ensure system high efficiency rate, high performance operation, wherein, low-dropout regulator (LDO) is widely used in above-mentioned mancarried electronic aid with advantages such as its low cost, the suppression of high power-supply ripple, low noise outputs.
Please refer to shown in Fig. 1, it is the circuit diagram of the low-dropout regulator of single supply input in prior art.This low-dropout regulator comprises reference voltage generating circuit 110, error discharger 120, Correctional tube (or being called efferent duct) MPASS, feedback circuit 130, current foldback circuit 140, compensating circuit 150 and enable circuits ENA.
Described reference voltage generating circuit 110 is connected between power input Vin and earth terminal G, and it is for output reference voltage VREF.Described Correctional tube MPASS(its be PMOS transistor) source electrode with lining body be connected with power input Vin, its drain electrode is connected with output end vo ut.Described feedback circuit 130 is according to the voltage output feedack voltage VFB of output end vo ut.Be specially, described feedback circuit comprises and is series at resistance RF1 between output end vo ut and earth terminal G and resistance RF2, and wherein, the voltage of the connected node between resistance RF1 and resistance RF2 is its feedback voltage V FB exported.
Described error amplifier 120 for amplifying the difference of feedback voltage V FB and reference voltage V REF, to produce control signal MPG.The normal phase input end of the error amplifier 120 in Fig. 1 is connected with feedback voltage V FB, and its negative-phase input is connected with reference voltage V REF, its output terminal and described Correctional tube MPASS(its be PMOS transistor) grid be connected.The control signal MPG that described error amplifier 120 exports by controlling the grid of described Correctional tube MPASS to adjust the pressure drop of described Correctional tube MPASS, thus makes the voltage of described output end vo ut stable output.Concrete adjustment process is: when the voltage Vout of described output terminal is lower than its target voltage, it is reflected as feedback voltage V FB and is less than reference voltage V REF, the control signal MPG that described error amplifier 120 exports makes the pressure drop on described Correctional tube MPASS reduce, thus output voltage Vout is increased, and then make output voltage Vout close to described target voltage; When the voltage of described output voltage Vout is higher than its target voltage, it is reflected as feedback voltage V FB and is greater than reference voltage V REF, the control signal MPG that described error amplifier 120 exports makes the pressure drop on described Correctional tube MPASS increase, thus output voltage Vout is reduced, and then make output voltage Vout close to described target voltage.
In sum, described feedback circuit 130 produces feedback voltage V FB according to output voltage Vout, the difference of described error amplifier 120 couples of feedback voltage V FB and reference voltage V REF is amplified, to produce control signal MPG, this control signal MPG controls the grid of Correctional tube MPASS, to adjust the pressure drop of described Correctional tube MPASS, thus make the voltage of described output end vo ut stable output.Like this, just form a close loop negative feedback loop, when the voltage stabilization that described output end vo ut exports, feedback voltage V FB equals reference voltage V REF, now, the voltage that described output end vo ut exports equals target voltage, and this target voltage equals VREF (1+RF1/RF2).
Described current foldback circuit 140 for carrying out overcurrent protection to Correctional tube MPASS, between its source electrode being connected to Correctional tube MPASS and grid.Described compensating circuit 150 for compensating the negative feedback loop be made up of described feedback circuit 130 and error amplifier 120, to improve the stability of system.
The enable described error discharger 120 of signal that described enable circuits ENA inputs according to its input end EN.The output terminal of the described enable circuits ENA in Fig. 1 is connected with the Enable Pin of described error amplifier 120.In one embodiment, when EN signal is low level, described enable circuits ENA makes described error amplifier 120 be in off position (i.e. the low-dropout regulator of this single supply input does not work); When EN signal is high level, described enable circuits ENA makes described error amplifier 120 in running order (i.e. the low-dropout regulator work of this single supply input).
In the low-dropout regulator that many power supplys input, one of them input power is lithium battery (such as its voltage range is 3.6V ~ 4.2V), another input power is external power source (such as its voltage range is 5V ~ 8V), the low-dropout regulator of many power supply inputs of the prior art, need two low-dropout regulator unit, the circuit structure voltage stabilizer as shown in Figure 1 of each low-dropout regulator unit, the input power of one of them low-dropout regulator unit is lithium battery, the input power of another low-dropout regulator unit is external power source, the output terminal of two low-dropout regulator unit is connected, to export identical voltage of voltage regulation Vout.But, so just need the function elements such as two cover reference voltage generating circuits, two cover error dischargers, two cover Correctional tube, two cover feedback circuits, the corresponding offset voltage calibration circuit of two covers, cause chip area to increase, add the cost of chip; Simultaneously, power when power supply is converted to Vin2 by Vin1, or power supply by Vin2 be converted to Vin1 power time, unavoidably there is powering on of related circuit and set up time delay, cause exporting when heavy duty, export and have lower comparatively greatly phenomenon of jumping, this lower voltage of jumping can cause load circuit works appearance abnormal, such as causing load circuit power down to be shut down, there is short time noise in audio frequency apparatus.
Therefore, be necessary to provide a kind of technical scheme of improvement to overcome the problems referred to above.
[summary of the invention]
The object of the present invention is to provide a kind of low-dropout regulator of many power supply inputs, it can support at least two input powers, and has lower chip area and cost.
In order to solve the problem, the invention provides a kind of low-dropout regulator of many power supply inputs, it comprises the first power input Vin1, second source input end Vin2, output end vo ut, reference voltage generating circuit, error amplifying circuit, feedback circuit, the first Correctional tube and the second Correctional tube, described first Correctional tube is connected between the first power input Vin1 and output end vo ut, and described second Correctional tube is connected between second source input end Vin2 and output end vo ut; Described reference voltage generating circuit is used for output reference voltage VREF; Described feedback circuit is according to the voltage output feedack voltage VFB of output end vo ut; Described error amplifier is used for amplifying to produce control signal MPG to the difference of feedback voltage V FB and reference voltage V REF; When the first power input Vin1 is connected with the first power supply, described second Correctional tube cut-off, the output terminal MPG of described error amplifier is connected with the control end of described first Correctional tube; When second source input end Vin2 is connected with second source, described first Correctional tube cut-off, the output terminal MPG of described error amplifier is connected with the control end of described second Correctional tube.
As a preferred embodiment of the present invention, described first Correctional tube comprises PMOS transistor MPASS1, and described PMOS transistor MPASS1 comprises the grid of lining body end, the first link be connected with the first power input Vin1, the second link be connected with output end vo ut and the control end as described first Correctional tube; Described second Correctional tube comprises PMOS transistor MPASS2, and described PMOS transistor MPASS2 comprises the grid of lining body end, the first link be connected with second source input end Vin2, the second link be connected with output end vo ut and the control end as described second Correctional tube.
As a preferred embodiment of the present invention, low-dropout regulator also comprises logic control circuit, when the first power input Vin1 is connected with the first power supply, described logic control circuit makes described PMOS transistor MPASS2 end, PMOS transistor MPASS2 is connected with the first power input Vin1 with the lining body end of MPASS1, the output terminal MPG of described error amplifier is connected with the grid MPG1 of PMOS transistor MPASS1; When second source input end Vin2 is connected with second source, described logic control circuit makes described PMOS transistor MPASS1 end, PMOS transistor MPASS1 is connected with second source input end Vin2 with the lining body end of MPASS2, the output terminal MPG of described error amplifier 220 is connected with the grid MPG2 of PMOS transistor MPASS2.
As a preferred embodiment of the present invention, described logic control circuit comprises biased selection circuit, the first switch S 1 and second switch S2, described biased selection circuit is for comparing the voltage levels of the first power input Vin1 and second source input end Vin2, its first output terminal VMAX output voltage is the voltage of higher power input, and its second output terminal Body_s exports control signal Body_s according to the voltage levels of the first power input Vin1 and second source input end Vin2; Described first switch S 1 comprises three links, its first link is connected with the output terminal MPG of error amplifier, second link is connected with the grid MPG2 of PMOS transistor MPASS2,3rd link is connected with the grid MPG1 of PMOS transistor MPASS1, and the first link that described control signal Body_s controls described first switch S 1 is optionally connected with its second link or the 3rd link; Described second switch S2 comprises three links, its first link is connected with the first output terminal VMAX of biased selection circuit, its second link is connected with the grid MPG1 of PMOS transistor MPASS1, its the 3rd link is connected with the grid MPG2 of PMOS transistor MPASS2, and optionally its second link or the 3rd link are connected the first link of described first switch S 2 of described control signal Body_s control.
As a preferred embodiment of the present invention, when the first power input Vin1 is connected with the first power supply, described biased selection circuit 260 makes the lining body end of PMOS transistor MPASS1 all be connected with the first power input Vin1 with the lining body end of PMOS transistor MPASS2 by its first output terminal VMAX, the control signal of the second output terminal Body_s output of described biased selection circuit 260 controls the first switch S 1 and is communicated with the output terminal MPG of the error amplifier 220 and grid MPG1 of PMOS transistor MPASS1, control the grid MPG2 that second switch S2 is communicated with the first output terminal VMAX and PMOS transistor MPASS2 of described biased selection circuit 260, thus PMOS transistor MPASS2 is ended, when second source input end Vin2 is connected with external power source, described biased selection circuit 260 makes the lining body end of PMOS transistor MPASS1 all be connected with second source input end Vin2 with the lining body end of PMOS transistor MPASS2 by its first output terminal, the control signal of the second output terminal Body_s output of described biased selection circuit 260 controls the first switch S 1 and is communicated with the output terminal MPG of the error amplifier 220 and grid MPG2 of PMOS transistor MPASS2, control the grid MPG1 that second switch S2 is communicated with the first output terminal VMAX and PMOS transistor MPASS1 of described biased selection circuit, thus PMOS transistor MPASS1 is ended.
As a preferred embodiment of the present invention, described low-dropout regulator also comprises current foldback circuit, and described current foldback circuit is used for carrying out overcurrent protection to the first Correctional tube and the second Correctional tube.
As a preferred embodiment of the present invention, described low-dropout regulator also comprises compensating circuit, and described compensating circuit is used for compensating the negative feedback loop be made up of described error amplifier and feedback circuit, to improve the stability of system.
As a preferred embodiment of the present invention, described low-dropout regulator also comprises enable circuits, the low-dropout regulator of the enable described many power supply inputs of signal that described enable circuits inputs according to its input end EN.
As a preferred embodiment of the present invention, the output terminal of described enable circuits is connected with the Enable Pin of reference voltage generating circuit with error discharger, when EN signal is the first logic level, the enable described error amplifier of described enable circuits and reference voltage generating circuit work; When EN signal is the second logic level, described enable circuits makes described error amplifier and reference voltage generating circuit not work.
As a preferred embodiment of the present invention, described reference voltage generating circuit, error amplifying circuit, feedback circuit, current foldback circuit, compensating circuit are all connected with the first output terminal VMAX of described biased selection circuit with the power end of enable circuits ENA, thus realize when the first power input Vin1 is connected with the first power supply, by the first power supply for each internal module is powered; When second source input end Vin2 is connected with second source, by second source for each internal module is powered.
Compared with prior art, the low-dropout regulator of the many power supply inputs in the present invention, it comprises with the first power supply (such as lithium battery) for input power, export voltage of voltage regulation Vout the first low-dropout regulator unit and with second source (such as external power source) for input power, export the second low-dropout regulator unit of voltage of voltage regulation Vout, and the first low-dropout regulator unit and the second low-dropout regulator units shared part of devices, not only save chip area, the cost of the chip simultaneously also reduced.
[accompanying drawing explanation]
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.Wherein:
Fig. 1 is the circuit diagram of the low-dropout regulator of single supply input in prior art;
Fig. 2 is the circuit diagram in one embodiment of the low-dropout regulator that the many power supplys in the present invention input.
[embodiment]
For enabling above-mentioned purpose of the present invention, feature and advantage become apparent more, and below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation.
Alleged herein " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention.Different local in this manual " in one embodiment " occurred not all refers to same embodiment, neither be independent or optionally mutually exclusive with other embodiments embodiment.Unless stated otherwise, connection herein, be connected, word that the expression that connects is electrically connected all represents and is directly or indirectly electrical connected.
The low-dropout regulator of the many power supply inputs in the present invention, comprise with the first power supply (such as lithium battery) for input power, export voltage of voltage regulation Vout the first low-dropout regulator unit and with second source (such as external power source) for input power, export the second low-dropout regulator unit of voltage of voltage regulation Vout, and the first low-dropout regulator unit and the second low-dropout regulator units shared part of devices, not only save chip area, also reduce the cost of chip simultaneously.
Please refer to shown in Fig. 2, it is the low-dropout regulator schematic diagram in one embodiment of the many power supply inputs in the present invention.The low-dropout regulator of described many power supply inputs comprises the first power input Vin1, second source input end Vin2, output end vo ut, reference voltage generating circuit 210, error amplifying circuit 220, feedback circuit 230, first Correctional tube 240 and the second Correctional tube 250.
Described first Correctional tube 240 is connected between the first power input Vin1 and output end vo ut, and described second Correctional tube 250 is connected between second source input end Vin2 and output end vo ut.Described reference voltage generating circuit 210 is for output reference voltage VREF.Described feedback circuit 230 is according to the voltage output feedack voltage VFB of output end vo ut.In fig. 2, described feedback circuit 230 comprises and is series at resistance RF1 between output end vo ut and earth terminal G and resistance RF2, and wherein, the voltage of the connected node between resistance RF1 and resistance RF2 is described feedback voltage V FB.Described error amplifier 220 for amplifying the difference of feedback voltage V FB and reference voltage V REF, to produce control signal MPG.
When the first power input Vin1 is connected (namely lithium battery is input power) with the first power supply (such as lithium battery), described second Correctional tube 250 ends, and the output terminal MPG of described error amplifier 220 is connected with the control end of described first Correctional tube 240; When second source input end Vin2 is connected (namely external power source is input power) with second source (such as external power source), described first Correctional tube 240 ends, and the output terminal MPG of described error amplifier 220 is connected with the control end of described second Correctional tube 250.
Below, the principle of work of the low-dropout regulator of the many power supply inputs shown in Fig. 2 is briefly introduced.
When the first power input Vin1 is connected (namely lithium battery is input power) with lithium battery, described second Correctional tube 250 ends, and the output terminal MPG of described error amplifier 220 is connected with the control end of described first Correctional tube 240.Now, the first low drop voltage regulator unit is formed by reference voltage generating circuit 210, error amplifier 220, feedback circuit 230 and the first Correctional tube 240.Described feedback circuit 230 produces feedback voltage V FB according to output voltage Vout, the difference of described error amplifier 220 couples of feedback voltage V FB and reference voltage V REF is amplified, to produce control signal MPG, this control signal MPG controls the control end of the first Correctional tube 240, to adjust the pressure drop of the first Correctional tube 240, thus make the voltage of described output end vo ut stable output, like this, just form a close loop negative feedback loop.
Concrete adjustment process is: when the voltage Vout of described output terminal is lower than its target voltage VOUT, it is reflected as feedback voltage V FB and is less than reference voltage V REF, the control signal MPG that described error amplifier 220 exports makes the pressure drop on described first Correctional tube 240 reduce, thus the voltage of output voltage Vout is increased, and then make output voltage Vout close to described target voltage VOUT; When the voltage of described output voltage Vout is higher than its target voltage VOUT, it is reflected as feedback voltage V FB and is greater than reference voltage V REF, the control signal MPG that described first Correctional tube 240 exports makes the pressure drop on described first Correctional tube 240 increase, thus output voltage Vout is reduced, and then make output voltage Vout close to described target voltage VOUT.When the voltage stabilization that described output end vo ut exports, feedback voltage V FB equals reference voltage V REF, and now, the voltage that described output end vo ut exports equals target voltage VOUT, this target voltage VOUT=VREF (1+RF1/RF2).
When second source input end Vin2 is connected (namely external power source is input power) with external power source, described first Correctional tube 240 ends, and the output terminal of described error amplifier 220 is connected with the control end of described second Correctional tube 250.Now, the second low drop voltage regulator unit is formed by reference voltage generating circuit 210, error amplifier 220, feedback circuit 230 and the second Correctional tube 250.Described feedback circuit 230 produces feedback voltage V FB according to output voltage Vout, the difference of described error amplifier 220 couples of feedback voltage V FB and reference voltage V REF is amplified, to produce control signal MPG, this control signal MPG controls the control end of the second Correctional tube 250, to adjust the pressure drop of the second Correctional tube 250, thus make the voltage of described output end vo ut stable output, like this, just form a close loop negative feedback loop.It is identical with the adjustment process of above-mentioned first low drop voltage regulator unit to the concrete adjustment process of the voltage of described output end vo ut, at this, repeats no more.When the voltage stabilization that described output end vo ut exports, feedback voltage V FB equals reference voltage V REF, and now, the voltage that described output end vo ut exports equals target voltage VOUT, this target voltage VOUT=VREF (1+RF1/RF2).
In sum, when the first power input Vin1 is connected with lithium battery, described second Correctional tube 250 ends, and the output terminal of described error amplifier 220 is connected with the control end of described first Correctional tube 240.Now, form the first low drop voltage regulator unit by reference voltage generating circuit 210, error amplifier 220, feedback circuit 230 and the first Correctional tube 240, it makes the voltage VOUT of described output terminal stable output.When second source input end Vin1 is connected with external power source, described first Correctional tube 240 ends, and the output terminal of described error amplifier 220 is connected with the control end of described second Correctional tube 250.Now, form the second low drop voltage regulator unit by reference voltage generating circuit 210, error amplifier 220, feedback circuit 230 and the second Correctional tube 250, it makes the voltage VOUT of described output terminal stable output.The function elements such as described first low-dropout regulator unit and the second low-dropout regulator units shared reference voltage generating circuit 210, error amplifier 220, feedback circuit 230, not only save chip area, the cost of the chip simultaneously also reduced.
Shown in Fig. 2, described first Correctional tube 240 is PMOS transistor MPASS1, and it comprises the grid of lining body end, the first link be connected with the first power input Vin1, the second link be connected with output end vo ut and the control end as described first Correctional tube 240.Described second Correctional tube 250 is PMOS transistor MPASS2, and it comprises the grid of lining body end, the first link be connected with second source input end Vin2, the second link be connected with output end vo ut and the control end as described second Correctional tube 250.
The low-dropout regulator of described many power supply inputs also comprises logic control circuit (unmarked).When the first power input Vin1 is connected with lithium battery, described logic control circuit makes described PMOS transistor MPASS2 cut-off, the lining body end of PMOS transistor MPASS2 is connected with the first power input Vin1, namely described second Correctional tube 250 ends, and make the control end of the output terminal MPG of described error amplifier 220 and the grid MPG1(of PMOS transistor MPASS1 and described first Correctional tube 240) be connected, the lining body end of described PMOS transistor MPASS1 is connected with the first power input Vin1; When second source input end Vin2 is connected with external power source, described logic control circuit makes described PMOS transistor MPASS1 cut-off, the lining body end of PMOS transistor MPASS1 is connected with second source input end Vin2, namely the output terminal MPG of described error amplifier 220 is connected with the grid MPG2 of PMOS transistor MPASS2, and the lining body end of described PMOS transistor MPASS2 is connected with second source input end Vin2.
Lining body end is set respectively in PMOS transistor MPASS1 and MPASS2, and when the first power input Vin1 is connected with lithium battery, PMOS transistor MPASS1 is connected with the first power input Vin1 with the lining body end of MPASS2; When second source input end Vin2 is connected with external power source, PMOS transistor MPASS1 is connected with second source input end Vin2 with the lining body end of MPASS2.(namely the first power input Vin1 connection power supply then meets the first power input Vin1 to the lining body end connection voltage VMAX of PMOS transistor MPASS1 or MPASS2, second source input end Vin2 connects power supply and then meets second source input end Vin2,) reason be, prevent when this corresponding PMOS transistor MPASS1 or MPASS2 turns off, it drains and serves as a contrast the forward diode conducting of body end generation and leak electricity; When the voltage that the negative electrode of diode connects is higher than anode voltage, there is not reverse leakage phenomenon in diode not conducting.
In one embodiment, described logic control circuit comprises biased selection circuit 260, first switch S 1 and second switch S2.
Described biased selection circuit 260 is for comparing the voltage levels of the first power input Vin1 and second source input end Vin2, the voltage of the power input that its first output terminal VMAX output voltage is higher, its second output terminal Body_s exports control signal Body_s according to the voltage levels of the first power input Vin1 and second source input end Vin2.
Described first switch S 1 comprises three links, wherein, first link 1 is connected with the output terminal MPG of error amplifier 220, second link 2 is connected with the grid MPG2 of PMOS transistor MPASS2,3rd link 3 is connected with the grid MPG1 of PMOS transistor MPASS1, and the first link 1 that described control signal Body_s controls described first switch S 1 is optionally connected with its second link 2 or the 3rd link 3.Described second switch S2 comprises three links, wherein, first link 1 is connected with the first output terminal VMAX of biased selection circuit 260, its second link 2 is connected with the grid MPG1 of PMOS transistor MPASS1, its the 3rd link 3 is connected with the grid MPG2 of PMOS transistor MPASS2, and first link 1 of second switch S2 described in described control signal Body_s is optionally connected with its second link 2 or the 3rd link 3.
Below the course of work of described biased selection circuit 260, first switch S 1 and second switch S2 is specifically introduced.When the first power input Vin1 is connected with lithium battery, first output terminal VMAX of described biased selection circuit 260 exports lithium battery voltage, and namely the lining body end of PMOS transistor MPASS1 is all connected with the first power input Vin1 with the lining body end of PMOS transistor MPASS2, the control signal that second output terminal Body_s of described biased selection circuit 260 exports is the first logic level (high level or low level), its first link 1 and the 3rd link 3 is communicated with to make the first switch S 1, thus the output terminal MPG of error amplifier 220 is connected with the grid MPG1 of PMOS transistor MPASS1, second switch S2 is made to be communicated with its first link 1 and the 3rd link 3, thus the first output terminal VMAX of described biased selection circuit 260 is connected with the grid MPG2 of PMOS transistor MPASS2, because the first output terminal VMAX of now described biased selection circuit 260 exports lithium battery voltage, therefore, PMOS transistor MPASS2 is ended.When second source input end Vin2 is connected with external power source, first output terminal VMAX of described biased selection circuit 260 exports outer power voltage, and namely the lining body end of PMOS transistor MPASS1 is all connected with second source input end Vin2 with the lining body end of PMOS transistor MPASS2, the control signal Body_s that second output terminal of described biased selection circuit 260 exports is the second logic level (low level or high level), its the first link 1 and the second link 2 is communicated with to make the first switch S 1, thus the output terminal MPG of error amplifier 220 is connected with the grid MPG2 of PMOS transistor MPASS2, second switch S2 is made to be communicated with its first link 1 and the second link 2, thus the first output terminal VMAX of described biased selection circuit 260 is connected with the grid MPG1 of PMOS transistor MPASS1, because the first output terminal VMAX of now described biased selection circuit 260 exports outer power voltage, therefore, PMOS transistor MPASS1 is ended.
In other embodiments, first link 1 of described second switch S2 also can be connected with other high level signal, as long as realize when this high level signal is connected with the grid of PMOS transistor MPASS1 or the grid of PMOS transistor MPASS2, PMOS transistor MPASS1 or PMOS transistor MPASS2 is ended.
Shown in Fig. 2, the low-dropout regulator of described many power supply inputs also comprises current foldback circuit 270, compensating circuit 280 and enable circuits ENA.
Described current foldback circuit 270 is for carrying out overcurrent protection to the first Correctional tube 240 and the second Correctional tube 250.In the present embodiment, described current foldback circuit 270 is connected between error amplifier 220 and the first Correctional tube 240, second Correctional tube 250.
Described compensating circuit 280 for compensating the negative feedback loop be made up of described error amplifier 220 and feedback circuit 230, to improve the stability of system.In the present embodiment, described compensating circuit 280 is connected between error amplifier 220 and feedback circuit 230.
The low-dropout regulator of the enable described many power supply inputs of signal that described enable circuits ENA inputs according to its input end EN.In the present embodiment, the output terminal of described enable circuits ENA is connected with the Enable Pin of error discharger 220 with reference voltage generating circuit 210.When EN signal is the first logic level, the enable described error amplifier 220 of described enable circuits ENA and reference voltage generating circuit 210 work, thus the low-dropout regulator work of enable described many power supply inputs; When EN signal is the second logic level, described enable circuits ENA makes described error amplifier 220 and reference voltage generating circuit 210 not work, thus the low-dropout regulator of described many power supply inputs is not worked.
In the embodiment shown in Figure 2, described reference voltage generating circuit 210, error amplifying circuit 220, feedback circuit 230, current foldback circuit 270, compensating circuit 280 are all connected with the first output terminal VMAX of described biased selection circuit 260 with the power end of enable circuits ENA, thus realize when the first power input Vin1 is connected with lithium battery, by lithium battery for each internal module is powered; When second source input end Vin2 is connected with external power source, by external power source for each internal module is powered.
For the ease of understanding the present invention, again introduce the principle of work of the low-dropout regulator of the many power supply inputs shown in Fig. 2 below in detail.
When the first power input Vin1 is connected with lithium battery, described biased selection circuit 260 makes the lining body end of PMOS transistor MPASS1 all be connected with the first power input Vin1 with the lining body end of PMOS transistor MPASS2; The first switch S 1 is made to be communicated with the output terminal MPG of the error amplifier 220 and grid MPG1 of PMOS transistor MPASS1; Make second switch S2 be communicated with the grid MPG2 of the first power input Vin1 and PMOS transistor MPASS2, thus PMOS transistor MPASS2 is ended.Now; form the first low-dropout regulator unit by described reference voltage generating circuit 210, error amplifying circuit 220, feedback circuit 230, PMOS transistor MPASS1, biased selection circuit 260, current foldback circuit 270, compensating circuit 280, make output terminal stable output voltage Vout.
When second source input end Vin2 is connected with external power source, described biased selection circuit 260 makes the lining body end of PMOS transistor MPASS1 all be connected with second source input end Vin2 with the lining body end of PMOS transistor MPASS2; The first switch S 1 is made to be communicated with the output terminal MPG of the error amplifier 220 and grid MPG2 of PMOS transistor MPASS2, make second switch S2 be communicated with the grid MPG1 of second source input end Vin2 and PMOS transistor MPASS1, thus PMOS transistor MPASS1 is ended.Now; form the second low-dropout regulator unit by described reference voltage generating circuit 210, error amplifying circuit 220, feedback circuit 230, PMOS transistor MPASS2, biased selection circuit 260, current foldback circuit 270, compensating circuit 280, make output terminal stable output voltage Vout.
Compared with the low-dropout regulator inputted with many power supplys of the prior art, the low-dropout regulator of the many power supply inputs in Fig. 2 increase only an adjustable pipe and logic control circuit on the basis of the low-dropout regulator of the single supply input shown in Fig. 1, thus greatly save the area of chip, reduce the cost of chip.
In the present invention, " connection ", be connected, word that " companys ", the expression such as " connecing " are electrical connected, if no special instructions, then represent direct or indirect electric connection.
It is pointed out that the scope be familiar with person skilled in art and any change that the specific embodiment of the present invention is done all do not departed to claims of the present invention.Correspondingly, the scope of claim of the present invention is also not limited only to previous embodiment.
Claims (7)
1. the low-dropout regulator of the input of power supply more than a kind, it is characterized in that, it comprises the first power input Vin1, second source input end Vin2, output end vo ut, reference voltage generating circuit, error amplifier, feedback circuit, the first Correctional tube and the second Correctional tube
Described first Correctional tube is connected between the first power input Vin1 and output end vo ut, and described second Correctional tube is connected between second source input end Vin2 and output end vo ut;
Described reference voltage generating circuit is used for output reference voltage VREF;
Described feedback circuit is according to the voltage output feedack voltage VFB of output end vo ut;
Described error amplifier is used for amplifying to produce control signal MPG to the difference of feedback voltage V FB and reference voltage V REF;
When the first power input Vin1 is connected with the first power supply, described second Correctional tube cut-off, the output terminal MPG of described error amplifier is connected with the control end of described first Correctional tube; When second source input end Vin2 is connected with second source, described first Correctional tube cut-off, the output terminal MPG of described error amplifier is connected with the control end of described second Correctional tube,
Described first Correctional tube comprises PMOS transistor MPASS1, and described PMOS transistor MPASS1 comprises the grid of lining body end, the first link be connected with the first power input Vin1, the second link be connected with output end vo ut and the control end as described first Correctional tube;
Described second Correctional tube comprises PMOS transistor MPASS2, described PMOS transistor MPASS2 comprises the grid of lining body end, the first link be connected with second source input end Vin2, the second link be connected with output end vo ut and the control end as described second Correctional tube
Described low-dropout regulator also comprises logic control circuit, when the first power input Vin1 is connected with the first power supply, described logic control circuit makes described PMOS transistor MPASS2 end, and the output terminal MPG of described error amplifier is connected with the grid MPG1 of PMOS transistor MPASS1; When second source input end Vin2 is connected with second source, described logic control circuit makes described PMOS transistor MPASS1 end, and the output terminal MPG of described error amplifier 220 is connected with the grid MPG2 of PMOS transistor MPASS2,
Described logic control circuit comprises biased selection circuit, the first switch S 1 and second switch S2,
Described biased selection circuit is for comparing the voltage levels of the first power input Vin1 and second source input end Vin2, the output voltage of its first output terminal VMAX is the voltage of higher power input, the lining body end that its second output terminal Body_s exports control signal Body_s, PMOS transistor MPASS1 and MPASS2 according to the voltage levels of the first power input Vin1 and second source input end Vin2 is connected with the first output terminal VMAX;
Described first switch S 1 comprises three links, its first link is connected with the output terminal MPG of error amplifier, second link is connected with the grid MPG2 of PMOS transistor MPASS2,3rd link is connected with the grid MPG1 of PMOS transistor MPASS1, and the first link that described control signal Body_s controls described first switch S 1 is optionally connected with its second link or the 3rd link;
Described second switch S2 comprises three links, its first link is connected with the first output terminal VMAX of biased selection circuit, its second link is connected with the grid MPG1 of PMOS transistor MPASS1, its the 3rd link is connected with the grid MPG2 of PMOS transistor MPASS2, and the first link that described control signal Body_s controls described second switch S2 is optionally connected with its second link or the 3rd link.
2. the low-dropout regulator of many power supply inputs according to claim 1, is characterized in that,
When the first power input Vin1 is connected with the first power supply, described biased selection circuit makes the lining body end of PMOS transistor MPASS1 all be connected with the first power input Vin1 with the lining body end of PMOS transistor MPASS2 by its first output terminal VMAX; The control signal of the second output terminal Body_s output of described biased selection circuit 260 controls the first switch S 1 and is communicated with the output terminal MPG of the error amplifier 220 and grid MPG1 of PMOS transistor MPASS1, control the grid MPG2 that second switch S2 is communicated with the first output terminal VMAX and PMOS transistor MPASS2 of described biased selection circuit, thus PMOS transistor MPASS2 is ended
When second source input end Vin2 is connected with external power source, described biased selection circuit 260 makes the lining body end of PMOS transistor MPASS1 all be connected with second source input end Vin2 with the lining body end of PMOS transistor MPASS2 by its first output terminal; The control signal of the second output terminal Body_s output of described biased selection circuit 260 controls the first switch S 1 and is communicated with the output terminal MPG of the error amplifier 220 and grid MPG2 of PMOS transistor MPASS2, control the grid MPG1 that second switch S2 is communicated with the first output terminal VMAX and PMOS transistor MPASS1 of described biased selection circuit, thus PMOS transistor MPASS1 is ended.
3. the low-dropout regulator of many power supply inputs according to claim 2, it is characterized in that, it also comprises current foldback circuit, and described current foldback circuit is used for carrying out overcurrent protection to the first Correctional tube and the second Correctional tube.
4. the low-dropout regulator of many power supply inputs according to claim 3, it is characterized in that, it also comprises compensating circuit, and described compensating circuit is used for compensating the negative feedback loop be made up of described error amplifier and feedback circuit, to improve the stability of system.
5. the low-dropout regulator of many power supply inputs according to claim 4, it is characterized in that, it also comprises enable circuits, the low-dropout regulator of the enable described many power supply inputs of signal that described enable circuits inputs according to its input end EN.
6. the low-dropout regulator of many power supply inputs according to claim 5, it is characterized in that, the output terminal of described enable circuits is connected with the Enable Pin of reference voltage generating circuit with error amplifier,
When EN signal is the first logic level, the enable described error amplifier of described enable circuits and reference voltage generating circuit work;
When EN signal is the second logic level, described enable circuits makes described error amplifier and reference voltage generating circuit not work.
7. the low-dropout regulator of the many power supply inputs according to claim 5 or 6, it is characterized in that, described reference voltage generating circuit, error amplifier, feedback circuit, current foldback circuit, compensating circuit are all connected with the first output terminal VMAX of described biased selection circuit with the power end of enable circuits ENA, thus realize when the first power input Vin1 is connected with the first power supply, by the first power supply for each internal module is powered; When second source input end Vin2 is connected with second source, by second source for each internal module is powered.
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| CN103488221B (en) * | 2013-09-06 | 2015-05-13 | 天脉聚源(北京)传媒科技有限公司 | Output voltage control circuit |
| CN103488222B (en) * | 2013-09-06 | 2015-06-10 | 天脉聚源(北京)传媒科技有限公司 | Output voltage control circuit |
| CN103488226B (en) * | 2013-09-09 | 2015-06-10 | 天脉聚源(北京)传媒科技有限公司 | Output voltage control circuit |
| CN103488223B (en) * | 2013-09-11 | 2015-11-25 | 天脉聚源(北京)传媒科技有限公司 | A kind of output voltage controlling circuit |
| CN103488228B (en) * | 2013-09-12 | 2015-06-10 | 天脉聚源(北京)传媒科技有限公司 | Output voltage control circuit |
| CN104656732B (en) * | 2014-12-31 | 2016-05-18 | 格科微电子（上海）有限公司 | Voltage reference circuit |
| KR102365143B1 (en) | 2015-09-22 | 2022-02-18 | 삼성전자주식회사 | Voltage regulator using multi-power and gain-boosting technique, and mobile device having the same |
| CN107272795B (en) * | 2016-04-07 | 2019-03-15 | 瑞昱半导体股份有限公司 | Voltage-stablizer |
| CN108776501B (en) * | 2018-06-15 | 2020-12-29 | 莫冰 | Multiplexing circuit of LDO and POR |
| CN109254641B (en) * | 2018-08-14 | 2020-04-28 | 珠海格力电器股份有限公司 | Power-off management system and working method thereof |
| WO2020113402A1 (en) * | 2018-12-04 | 2020-06-11 | 华为技术有限公司 | Combined soft-start circuit, combined soft-start chip and electronic device |
| CN112702681B (en) * | 2019-10-23 | 2022-04-08 | 北京小米移动软件有限公司 | Stereo audio equipment, power supply control method and device thereof, and mobile terminal |
| CN112218513B (en) * | 2020-10-13 | 2023-08-22 | Oppo广东移动通信有限公司 | Chip, antenna module and terminal |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4779037A (en) * | 1987-11-17 | 1988-10-18 | National Semiconductor Corporation | Dual input low dropout voltage regulator |
| US5103157A (en) * | 1990-07-10 | 1992-04-07 | National Semiconductor Corp. | Common emitter amplifiers operating from a multiplicity of power supplies |
| JPH09128080A (en) * | 1995-08-30 | 1997-05-16 | Sgs Thomson Microelectron Inc | Voltage regulator circuit |
| US8866341B2 (en) * | 2011-01-10 | 2014-10-21 | Infineon Technologies Ag | Voltage regulator |
| CN203204489U (en) * | 2013-04-26 | 2013-09-18 | 无锡中星微电子有限公司 | Low-dropout regulator with multi-power input |
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