CN103131885A - 用于半导体器件的接合线 - Google Patents

用于半导体器件的接合线 Download PDF

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CN103131885A
CN103131885A CN2012104754297A CN201210475429A CN103131885A CN 103131885 A CN103131885 A CN 103131885A CN 2012104754297 A CN2012104754297 A CN 2012104754297A CN 201210475429 A CN201210475429 A CN 201210475429A CN 103131885 A CN103131885 A CN 103131885A
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silver
bonding wire
group
alloy
atom
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E-K·郑
J-S·柳
Y-D·卓
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Heraeus Deutschland GmbH and Co KG
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Abstract

本发明涉及用于半导体器件的接合线。公开了一种用于半导体器件的接合线及其制造方法。根据本发明的用于半导体器件的接合线包括5ppm到10wt%的选自锌(Zn)、锡(Sn)和镍(Ni)组成的组中的至少一种;以及剩余物,包括银(Ag)和其他不可避免的杂质。

Description

用于半导体器件的接合线
技术领域
本发明涉及接合线,更具体地,涉及用于半导体器件的接合线以及使用接合线的发光二极管(LED)封装,其中用银(Ag)作主要成分。
背景技术
接合线是用于电连接IC芯片或者LED芯片和引线框的金属线,并且一般地由金(Au)构成。
为了减少制造接合线时的成本,因为最近世界范围内金(Au)价的突然升高,尝试使用铜(Cu)线或者其上涂敷钯(Pd)的铜(Cu)线用于接合线。一些制造商大量生产铜(Cu)线,但是对基于金(Au)的合金线进行了持续研究,因为铜(Cu)的特性与金(Au)的特性不相近。对作为基于金(Au)的合金线的金(Au)-银(Ag)合金线进行了研究。金(Au)-银(Ag)合金线具有可以降低成本的优点,因为银(Ag)(即,合金元素)具有极好的电导率并和金(Au)形成完全固溶体。
然而,在减少成本上有限制,因为在金(Au)-银(Ag)合金线中包含了大量的金(Au)。另外,铜线和涂敷有钯(Pd)的铜线不能用于LED封装,因为反射率即LED的最重要的功能被劣化。
因此,迫切需要发展由具有优良可靠性和反射率特性同时具有降低成本效果的新材料构成的接合线。
发明内容
本发明努力提供用于半导体器件的接合线以及使用其的LED封装,其中银(Ag)被用作主要成分,具有提供可靠的并且能够替代常规金(Au)合金线的合金接合线的优点。本发明的另一个实施例提供一种LED封装,对其应用了能够防止在银(Au)合金线中固有的表面污染(discoloration)以及在制造后的高亏空比(short ratio)的银(Ag)合金接合线。
本发明的示范性实施例提供了种用于半导体器件的接合线,包括5ppm到10wt%的选自锌(Zn)、锡(Sn)和镍(Ni)组成的组中的至少一种;以及剩余物,包括银(Ag)和其他不可避免的杂质。
接合线还包括0.03wt%到10wt%的选自铜(Cu)、铂(Pt)、铑(Rh)、锇(Os)、金(Au)和钯(Pd)组成的组中的至少一种。
接合线还包括3ppm到5wt%的选自铍(Be)、钙(Ca)、镁(Mg)、钡(Ba)、镧(La)、铈(Ce)和钇(Y)组成的组中的至少一种。
根据本发明的另一个示范性实施例的一种发光二极管(LED)封装,包括LED芯片、用于向所述LED芯片提供功率的引线框以及用于连接所述LED芯片和所述引线框的接合线,其中所述接合线是所述用于半导体器件的接合线。
根据本发明的另一个示范性实施例的一种制造用于半导体器件的接合线的方法,包括以下步骤:将银(Ag)合金浇铸到模中并且熔化所述银(Ag)合金,所述银(Ag)合金包括5ppm到10wt%的选自锌(Zn)、锡(Sn)和镍(Ni)组成的组中的至少一种和包括银(Ag)和其它不可避免的杂质的剩余物;连续铸造所述熔化的银(Ag)合金;以及拉拔连续铸造的银(Ag)合金。
在该制造用于半导体器件的接合线的方法中,银(Ag)合金还包括0.03wt%到10wt%的选自铜(Cu)、铂(Pt)、铑(Rh)、锇(Os)、金(Au)和钯(Pd)组成的组中的至少一种。
在该制造用于半导体器件的接合线的方法中,银(Ag)合金还包括3ppm到5wt%的选自铍(Be)、钙(Ca)、镁(Mg)、钡(Ba)、镧(La)、铈(Ce)和钇(Y)组成的组中的至少一种。
在该制造用于半导体器件的接合线的方法中,还包括对拉拔的银(Ag)合金进行软化热处理的步骤。根据如上所述的本发明的用于半导体器件的接合线,可以提供这样的银(Au)合金接合线,其使用比金(Au)便宜的银(Ag)作为主要成分并且能够提供高生产率的银(Ag),防止了表面污染并且通过向银(Ag)添加合金原子而具有极好的可靠性和机械特性。
附图说明
图1示出了其中使用了根据本发明的示范性实施例的银(Ag)合金接合线的LED封装结构的示意图。
具体实施方式
根据联结合图的随后的实施例,本发明的优点和特性及获得它们的方法将更加显而易见。然而,本发明不限于公开的实施例并且可以以各种方法是实施。提供实施例以完成本发明的公开并且允许本领域的技术人员完全理解本发明的范围。本发明由权利要求限定。在整个附图中相同的标号指相同或者类似的部分。
下面参考附图详细描述根据本发明的示范性实施例的半导体器件的接合线。为了参考,在本发明的描述中,如果其被认为使得本发明的主旨不必要的模糊,那么将省略已公知的功能和结构的详细描述。
根据本发明的示范性实施例的用于半导体器件的接合线。包括5ppm到10wt%的选自锌(Zn)、锡(Sn)和镍(Ni)组成的组中的至少一种;并且剩余物包括银(Ag)和其它不可避免的杂质。
用于半导体器件的接合线还包括0.03wt%到10wt%的选自铜(Cu)、铂(Pt)、铑(Rh)、锇(Os)、金(Au)和钯(Pd)组成的组中的至少一种:。
用于半导体器件的接合线还包括3ppm到5wt%的选自铍(Be)、钙(Ca)、镁(Mg)、钡(Ba)、镧(La)、铈(Ce)和钇(Y)组成的组中的至少一种:。
银(Ag)是形成根据本发明的接合线的基础材料,并且其可以具有99.99wt%(四个九量级)或者更高的纯度等级。银(Ag)具有极好的电导率以及面心立方(FCC)结构。银(Ag)可以导致制造接合线时的成本降低效果,因为其可以替代通常在常规接合线中使用的金(Au)。
根据本发明的使用银(Ag)作为主要成分的接合线的合金原子的合金比率以及原子的特性如下。
第一组原子
第一组原子包括锌(Zn)、锡(Sn)和镍(Ni)。在半导体器件中,银(Ag)接合线或者银(Ag)合金接合线被连接到半导体芯片的衬垫。在接合时,因为外部环境的影响,银(Ag)接合线或者银(Ag)合金接合线可以被容易地被污染(discolor)。根据本发明的第一组原子具有防止表面污染的功能。
各种实验显示,当包括小于5ppm的第一组原子时,第一组原子具有表面污染、低拉伸性和低可靠性并且当包括在0.01到10wt%的第一组原子时,没有表面污染并且具有极好的拉伸性和可靠性。因此,第一元素的合适的含量是5ppm到10wt%。
第二组原子
第二组原子包括铜(Cu)、铂(Pt)、铑(Rh)、锇(Os)、金(Au)和钯(Pd)。
第二组原子用于改善室温和高温下的拉张强度并且在回路(loop)形成后,防止回路的如下垂或者倾斜的弯曲或者变形。另外,第二组原子用于改善可拉伸性,从而改善生产率。当形成超低回路时,第二组原子用于通过改善球颈部分处的屈服强度而改善韧性。因此,存在减少或者消除球颈部分处的损坏的效果。特别是,虽然接合线具有小的直径,还是可以抑制球颈的破坏。
铜(Cu)具有与银(Ag)相同的FCC晶体结构并且用于改善室温和高温下的强度以及特别是剪切强度并且改善重结晶结构。
另外,铜(Cu)在高温度和高湿度下具有比铑(Ru)和钯(Pd)更高的可靠性并且少量的铜(Cu)可以改善铑(Ru)和钯(Pd)的效果。然而,如果添加大量的铜(Cu),就会产生氧化问题并因接合线变强而破坏衬垫。
添加铑(Ru)和钯(Pd)以改善接合线的可靠性和MTBA。如果添加大量的铑(Ru)和钯(Pd),那么电阻会增加,衬垫会因接合线变强而被破坏,并且MTBA被缩短。
铂(Pt)和银(Ag)一起形成完全固溶体并且可以防止压缩球和铝衬垫的粘接强度的劣化。
如果添加的第二组原子小于0.03wt%,那么没有效果。如果添加的第二组原子超过10wt%,当形成无空气球(free air ball)时会产生表面凹陷现象,使得难以形成完美的球。因此,第二组原子的适宜含量为0.03wt%到10wt%。
第三组原子
第三组原子包括铍(Be)、钙(Ca)、镁(Mg)、钡(Ba)、镧(La)、铈(Ce)和钇(Y)
第三组原子均匀分布在银(Ag)上并且在其中固溶并且在晶格中产生应力的相互作用,从而改善室温下的强度。因此,第三组原子用于改善接合线的拉张强度并且在稳定回路的形状和减少回路高度的偏离上具有极好的效果。
钡(Ba)和钙(Ca)通过增强的固溶体使银(Ag)晶格变形。因此,钡(Ba)和钙(Ca)可以增加接合线的机械强度、降低接合线的重结晶温度并且增加回路的高度。
如果添加的第三组原子小于3ppm,就很难获得上述效果。如果添加的第三组原子超过5wt%,因为降低了拉张强度,就有在球颈部分出现破裂的危险。因此,第三组原子的适宜含量为3ppm到5wt%。
根据本发明的用于半导体器件的接合线可以包括除了银(Ag)和合金元素之外的不可避免的杂质。然而,杂质不限制本发明的范围。
使用包括第一组原子到第三组原子的接合线可以制造根据本发明的另一个示范性实施例的LED封装。
即,根据本发明的LED封装100包括LED芯片10、用于向LED芯片提供功率的引线框20以及用于连接LED芯片10和引线框20的接合线50。
更具体地,参考图1,根据本发明的LED封装100包括引线框20和安装到在引线框20中形成的腔30的底部上的LED芯片10。在LED芯片10的顶表面上的电极40和电极衬垫通过接合线50接合。荧光物质60涂敷在腔30的内部上并且硬化以完成LED封装100。
根据本发明的使用银(Ag)做主要成分的银(Au)接合线被用作接合线50。
一种根据本发明的另一个示范性实施例的制造用于半导体器件的接合线的方法包括步骤:将银(Ag)合金浇铸到模中并且熔化所述银(Ag)合金,所述银合金包括5ppm到10wt%的选自由锌(Zn)、锡(Sn)和镍(Ni)组成的组中的至少一种以及包括银(Ag)和其它不可避免的杂质的剩余物,连续铸造所述熔化的银(Ag)合金并且随后拉拔连续铸造的银(Ag)合金。
银(Ag)合金还包括0.03wt%到10wt%的选自铜(Cu)、铂(Pt)、铑(Rh)、锇(Os)、金(Au)和钯(Pd)组成的组中的至少一种。
银(Ag)合金还包括3ppm到5wt%的选自铍(Be)、钙(Ca)、镁(Mg)、钡(Ba)、镧(La)、铈(Ce)和钇(Y)组成的组中的至少一种。
一种用于制造半导体器件的接合线的方法还包括对拉出的银(Ag)合金进行软化热处理的步骤。
参考根据本发明的制造接合线的方法和制造的接合线的物理特性的评价结果更详细的描述了本发明
<制造银(Ag)合金接合线的方法>
银(Au)合金,包括0.01wt%的锌(Zn)(即,第一组原子)、0.5wt%的金(Au)(即,第二组原子)、0.5wt%的钯(Pd)(即,第二组原子)、0.005wt%的钙(Ca)(即,第三组原子)和包括银(Ag)和其它不可避免的杂质的剩余物,被浇铸到模中并且随后熔化。
熔化的银(Au)合金被连续铸造、拉出并且随后进行软化热处理,以软化通过拉拔的硬化接合线。
为了评价本发明的接合线的可靠性使用压力室测试,室条件包括在85℃的温度、2大气压的压力、85%的相对湿度以及5V下504小时或者更多。
在此条件下,在接合线材料被保持之后并且随后通过进行球拉测试(BPT)评价。在BPT时,用于确定抬升(lift)的标准是在球颈处没有产生破裂并且球粘接部分从衬垫抬升。
作为测试结果,当球抬升率是0%时,其被评价为很好。当球抬升率是高于0%到2%或更少时,其被评价为好,当球抬升率是高于2%到5%或更少时,其被评价为一般并且当球抬升率是高于5%时,其被评价为有缺陷。
表1示出了根据本发明的接合线的部件的成分。
在下面的表1中,No.1到No.7显示了根据本发明制造的接合线的实验实例,并且在表中示出了每个接合线的部件的成分。每个部件的成分的含量是重量百分比并且银(Ag)的含量指剩余平衡物(Bal.)。
[表1]
Figure BDA00002441152300071
Figure BDA00002441152300081
Figure BDA00002441152300091
Figure BDA00002441152300101
Figure BDA00002441152300111
Figure BDA00002441152300121
在表1中,实验实例1到8显示通过改变锌(Zn)(即,第一组原子)含量制造的接合线,实验实例9到16显示通过改变锡(Sn)(即,第一组原子)的含量制造的接合线,并且实验实例17到24显示通过改变镍(Ni)制造的接合线。
另外,实验实例25到31显示通过改变铜(Cu)(即,第二组原子)含量制造的接合线,实验实例32到33显示通过改变铂(Pt)(即,第二组原子)含量制造的接合线,实验实例34到35显示通过添加铑(Rh)和锇(Os)(即,第二组原子)制造的接合线,分别地,实验实例36到38显示通过改变金(Au)(即,第二组原子)含量制造的接合线,以及实验实例39到45显示通过改变钯(Pd)(即,第二组原子)含量制造的接合线。
实验实例46显示通过添加铍(Be)(即,第三组原子)制造的接合线,实验实例47到50显示通过改变钙(Ca)(即,第三组原子)含量制造的接合线,并且实验实例51到55分别显示通过添加镁(Mg)、钡(Ba)、镧(La)、铈(Ce)和钇(Y)(即,第三组原子)制造的接合线。
实验实例56到60显示通过改变锌(Zn)(即,第一组原子)含量和铜(Cu)(即,第二组原子)含量制造的接合线,验实例61到64显示通过改变锡(Sn)(即,第一组原子)含量和金(Au)(即,第二组原子)含量制造的接合线,并且实验实例65到68显示通过改变镍(Ni)(即,第一组原子)含量和钯(Pd)(即,第二组原子)含量制造的接合线。
实验实例69显示包括锌(Zn)(即,第一组原子)含量和金(Au)和钯(Pd)(即,第二组原子)以及钙(Ca)(即,第三组原子)的接合线。实验实例70显示包括镍(Ni)(即,第一组原子)和金(Au)和钯(Pd)(即,第二组原子)以及钇(Y)(即,第三组原子)的接合线。实验实例71显示包括锡(Sn)(即,第一组原子)、铜(Cu)金(Au)和钯(Pd)(即,第二组原子)以及铈(Ce)(即,第三组原子)的接合线。
下面的表2示出了根据表1中示出的本发明的接合线的物理特性的评价结果。
[表2]
Figure BDA00002441152300131
Figure BDA00002441152300161
在表2中,表面污染比率是基于线的反射率测量的结果,其中◎表示极好的状态,○表示好的状态,△表示一般的状态,x表示坏的状态。
FAB是无空气球的缩写。可以在二级接合后通过使用EFO放电在毛细尖端处的线尾部形成用于进行球接合的圆形FAB。这里,对于形成的FAB的形状,完美的球表示极好的状态。形成的FAB外形具有完美的球形但是具有轻微偏离线的中心的情况表示好的状态。形成的FAB外形轻微偏离完美的球和线的中心的情况表示一般的状态。倾斜的球(FAB严重偏离线的中心)并且对形成的FAB的形状不能接合的情况表示坏的状态。
还通过与表面污染标记相同的方式表示FAB的形状特性。
通过在压力炉测试(PCT)中的粘合强度(BPT值)表示高湿度可靠性。
银(Ag)合金线具有30μm的直径并且在121℃下进行PCT约96小时。
在粘合强度的可靠性中,◎表示极好的状态,○表示好的状态,△表示一般的状态,x表示坏的状态。
通过每1km银(Ag)合金线的多个断开的线测量加工性能。根据值的减少,加工性能具有很好的特性。
在存放期测试中,在银(Ag)合金线中形成100nm厚的氧化物层需要的时间由日期表示。根据值的增加,存放期测试具有很好的特性。
根据表1到2,在实验实例1到24中可以看出锌(Zn)、锡(Sn)和镍(Ni)含量(即,第一添加成分)影响银(Ag)合金线的表面污染。
在实验实例1到24中,可以看出,在0.01到10wt%的锌(Zn)、锡(Sn)和镍(Ni)含量处,银(Ag)合金线具有极好的表面污染、可拉伸性和可靠性并且在锌(Zn)、锡(Sn)和镍(Ni)含量是5wt%或更高,影响了FAB形状特性。
在实验实例25到31中,可以看出,铜(Cu)含量(即,第二组原子)影响银(Ag)合金线的表面污染。当铜(Cu)含量小于1%时,银(Ag)合金线的表面污染具有极好的特性。当铜(Cu)含量是0.1%或更高时,开始显示极好的可加工特性。
另一方面,可以看出银(Ag)合金线的可靠性和FAB形状受相反影响。
在实验实例36到45中,可以看出,金(Au)和Pd(钯)含量(即,第二组元素)对银(Ag)合金线的可靠性和表面污染具有好的影响,Pd(钯)含量可产生较佳的可加工性。
在实验实例51到55中,可以看出,镁(Mg)、钡(Ba)、镧(La)、铈(Ce)和钇(Y)(即,第三组元素)显示银(Ag)合金线的粘合强度和拉拔特性。
在实验实例56到60中,可知包括锌(Zn)和铜(Cu)的合金的特性。可以看出,随着锌(Zn)和铜(Cu)含量的增加,粘合强度被增加并且拉拔特性变的更好。
在实验实例61到64中,可知包括锡(Sn)和金(Au)的合金的特性。可以看出,随着锡(Sn)和金(Au)含量的减少,拉拔特性极好并且随着锡(Sn)和金(Au)的增加,粘合强度和存放期增加。
在实验实例65到68中,可知包括镍(Ni)和钯(Pd)的合金的特性。可以看出,随着镍(Ni)和钯(Pd)含量的增加,强度改善,并且钯(Pd)的拉拔特性和强度增加。
在实验实例69到71中,可知由包括金(Au)和钯(Pd)的三元合金或更多元合金构成的银(Ag)合金线的特性。如果金(Au)和钯(Pd)含量增加,粘合强度和拉拔特性变好,但是电特性倾向于下降。如果包括金(Au)和钯(Pd),可靠性是极好的特性并且存在有效期增加的极好特性。
虽然基于本发明的示范性实施例描述了本发明,但是本发明涉及的本领域的技术人员应该明白可以在不脱离本发明的技术精神或者必要的特性下以不同的方法执行本发明。
因此,应该明白上面描述的实施例是示范性的并且没有限制任何方面。本发明的范围由所附权利要求而不是详细的说明书限定,并且本发明应该被认为覆盖源于所附权利要求及其等价物的意义和范围的所有修改和变化。
<标号描述>
10:LED芯片
20:引线框
30:腔
40:电极
50:接合线
60:荧光材料
100:LED封装

Claims (8)

1.一种用于半导体器件的接合线,包括:
5ppm到10wt%的选自锌(Zn)、锡(Sn)和镍(Ni)组成的组中的至少一种;以及
剩余物,包括银(Ag)和其他不可避免的杂质。
2.根据权利要求1的接合线,还包括0.03wt%到10wt%的选自铜(Cu)、铂(Pt)、铑(Rh)、锇(Os)、金(Au)和钯(Pd)组成的组中的至少一种。
3.根据权利要求1或2的接合线,还包括3ppm到5wt%的选自铍(Be)、钙(Ca)、镁(Mg)、钡(Ba)、镧(La)、铈(Ce)和钇(Y)组成的组中的至少一种。
4.一种发光二极管(LED)封装,包括LED芯片、用于向所述LED芯片提供功率的引线框以及用于连接所述LED芯片和所述引线框的接合线,其中所述接合线是根据权利要求1到3中任意一个的用于半导体器件的接合线。
5.一种制造用于半导体器件的接合线的方法,包括以下步骤:
将银(Ag)合金浇铸到模中并且熔化所述银(Ag)合金,所述银(Ag)合金包括5ppm到10wt%的选自锌(Zn)、锡(Sn)和镍(Ni)组成的组中的至少一种和包括银(Ag)和其它不可避免的杂质的剩余物;
连续铸造所述熔化的银(Ag)合金;以及
拉拔连续铸造的银(Ag)合金。
6.根据权利要求5的方法,其中所述银(Ag)合金还包括0.03wt%到10wt%的选自铜(Cu)、铂(Pt)、铑(Rh)、锇(Os)、金(Au)和钯(Pd)组成的组中的至少一种。
7.根据权利要求5或6的方法,其中所述银(Ag)合金还包括3ppm到5wt%的选自铍(Be)、钙(Ca)、镁(Mg)、钡(Ba)、镧(La)、铈(Ce)和钇(Y)组成的组中的至少一种。
8.根据权利要求7的方法,还包括对所述拉拔的银(Ag)合金进行软化热处理的步骤。
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