CN103105883A - Linear voltage regulator with load detection circuit and dynamic zero compensation circuit - Google Patents
Linear voltage regulator with load detection circuit and dynamic zero compensation circuit Download PDFInfo
- Publication number
- CN103105883A CN103105883A CN2011103567034A CN201110356703A CN103105883A CN 103105883 A CN103105883 A CN 103105883A CN 2011103567034 A CN2011103567034 A CN 2011103567034A CN 201110356703 A CN201110356703 A CN 201110356703A CN 103105883 A CN103105883 A CN 103105883A
- Authority
- CN
- China
- Prior art keywords
- voltage regulator
- linear voltage
- zero point
- dynamic zero
- load detecting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
The invention discloses a linear voltage regulator with a load detection circuit and a dynamic zero compensation circuit. The linear voltage regulator comprises an error amplifier, a voltage bumper, a power tube P-channel metal oxide semiconductor (PMOS), a first feedback resistance Rf1, a second feedback resistance Rf2, a load detection circuit and a dynamic zero compensation circuit, the load detection circuit is connected between an output end of the low-dropout linear voltage regulator and the voltage bumper, and the dynamic zero compensation circuit is connected between the output end of the low-dropout linear voltage regulator and the error amplifier. The load detection circuit is used for detecting the change of the load current, and then the load detection circuit controls the dynamic zero compensation circuit to produce dynamic zero zD to track and compensate a first non-dominant pole pEA of the linear voltage regulator. The dynamic compensation technology enables the low-dropout linear voltage regulator to have a better transient response performance and a smaller voltage spike for the load change compared with conventional structures. The load detection circuit and the dynamic zero compensation circuit have no static power consumption and no influence for the current efficiency of the whole low-dropout linear voltage regulator.
Description
Technical field
The present invention relates to the low pressure difference linear voltage regulator technical field, more specifically refer to a kind of have load detecting circuit and dynamic zero point compensating circuit the fast transient response low pressure difference linear voltage regulator.
Background technology
Low pressure difference linear voltage regulator is the important component part in the on-chip power supply management system module, and to have the input and output of needs pressure reduction little due to it, and area is little, and current utilization rate is high, is easy to the advantage such as integrated and is used widely.Yet when extraneous load changes, will there be spike pulse in output voltage and need a transient response time t
rJust can get back to steady state (SS).The existence of these spike pulses will be on the particularly fatal impact of analog module performance generation of institute's supply module.In addition, for guaranteeing the low pressure difference linear voltage regulator normal operation, usually need the external special parameter (C that has
outAnd effective series resistance R
ESR) the outer coupling capacitance of sheet.
Shown in Fig. 1 is the circuit diagram of conventional low difference linear constant voltage regulator, and the conventional low difference linear constant voltage regulator is by error amplifier, voltage buffer, power tube PMOS, the first feedback resistance R
flWith the second feedback resistance R
f2Consist of.Error amplifier is used for benchmark voltage V
REFAnd the output feedback voltage V of linear voltage regulator
fAnd generation control signal regulating power pipe PMOS; Voltage buffer is added between error amplifier and power tube PMOS in order to the large gate capacitance of driving power PMOS, fast reaction speed; Feedback resistance R
f1And R
f2Be used for producing for error amplifier suitable feedback voltage V relatively
b
The design and optimization of at present a lot of low pressure difference linear voltage regulators all is being devoted to improve the linear voltage regulator transient response performance, as adding other loop gain regulating circuit or voltage buffer is optimized between error amplifier and voltage buffer, but these designs often cause circuit structure complicated and cause power consumption to strengthen because introduce adjunct circuit.
Summary of the invention
The technical matters that (one) will solve
In view of this, fundamental purpose of the present invention is to provide a kind of method of simple and effective raising linear voltage regulator transient response performance, high performancely simplifies simultaneously circuit structure and reduces power consumption obtaining.
(2) technical scheme
For achieving the above object, the invention provides a kind of have load detecting circuit and dynamic zero point compensating circuit linear voltage regulator, comprise error amplifier, voltage buffer, power tube PMOS, the first feedback resistance R
f1With the second feedback resistance R
f2, this error amplifier is in order to benchmark voltage V
REFAnd the feedback voltage V of this linear voltage regulator input
f, and the generation control signal is regulated this power tube PMOS; Voltage buffer is connected between this error amplifier and power tube PMOS, in order to the large gate capacitance of driving power PMOS, fast reaction speed; Feedback resistance R
f1And R
f2Be connected between the output terminal and error amplifier of this linear voltage regulator, in order to produce feedback voltage V
f, for error amplifier; This linear voltage regulator also comprises: be connected in the load detecting circuit between this low pressure difference linear voltage regulator output terminal and this voltage buffer, and be connected between this low pressure difference linear voltage regulator output terminal and this error amplifier one dynamic zero point compensating circuit; Wherein, this load detecting circuit is for detection of the variation of load current, and then this dynamic compensating circuit generation at zero point z at dynamic zero point of control
DFollow the tracks of and compensate the first non-dominant pole p of this linear voltage regulator
EA
In such scheme, this load detecting circuit is further used for detecting the output terminal V of this power tube PMOS and this linear voltage regulator
outBetween pressure reduction, thereby the judgement load.Two input ends of this load detecting circuit are connected to the output terminal of this voltage buffer and the output terminal V of this linear voltage regulator
out, the output terminal of this load detecting circuit is connected in compensating circuit at this at dynamic zero point.
In such scheme, this, compensating circuit was made of the resistance with fixed value and VVC voltage variable capacitance series connection at dynamic zero point, perhaps was made of the electric capacity with fixed value and the series connection of voltage-controlled variable resistance.This, compensating circuit was further used for adjusting null position according to the output signal of this load detecting circuit at dynamic zero point, compensated adjustment to being with interior zero limit.This, input end of compensating circuit was connected in the output terminal of this load detecting circuit at dynamic zero point, and this, output terminal of compensating circuit was connected in the input end of this voltage buffer at dynamic zero point.This, compensating circuit further provided signal to being with interior zero limit to compensate adjustment according to load detecting circuit at dynamic zero point, thereby reached this linear voltage regulator to the stable purpose of different loads situation, reduced the requirement to the outer coupling capacitance of sheet.
In such scheme, the second non-dominant pole p of this linear voltage regulator
VBZ at zero point by the external capacitor generation
eCompensation.Two input ends of this error amplifier are respectively reference voltage V
refAnd negative feedback voltage V
f, the output terminal of this error amplifier be connected to this voltage buffer input end and this at dynamic zero point compensating circuit; The input end of this voltage buffer is connected to the output terminal of this error amplifier, and the output terminal of this voltage buffer is connected to the grid of this power tube PMOS and the input end of this load detecting circuit; The grid of this power tube PMOS is connected in the output terminal of this voltage buffer, and the source electrode of this power tube PMOS is connected in power supply V
in, the drain electrode of this power tube PMOS is connected in this first feedback resistance R
f1An end.
(3) beneficial effect
Provided by the invention have load detecting circuit and dynamic zero point compensating circuit the fast transient response low pressure difference linear voltage regulator, be to increase cell frequency and reach and improve linear voltage regulator transient response performance purpose by increasing system's loop.The load detecting circuit of wherein introducing can detect load variations and regulate dynamic zero compensation circuit and produce the first non-dominant pole in a dynamic Zero-tracking and fine compensation band.The non-dominant pole of low pressure difference linear voltage regulator first can accurately be offset by this dynamic zero point, and the second non-dominant pole can be offset by the zero point that external capacitor produces.Therefore whole system is equivalent to one-pole system, and unit gain frequency is significantly improved, and also can keep well constant for different loads position gain frequency.This dynamic compensation technology makes low pressure difference linear voltage regulator have the faster transient response ability of load variations and little voltage spike than traditional structure.Load detecting circuit and dynamic zero point compensating circuit there is no quiescent dissipation, on the current efficiency of whole low pressure difference linear voltage regulator without impact.
Description of drawings
Shown in Fig. 1 is the circuit diagram of conventional low difference linear constant voltage regulator.
Shown in Fig. 2 be have load detecting circuit and dynamic zero point compensating circuit the circuit diagram of linear voltage regulator.
Shown in Fig. 3 is the poles and zeros assignment contrast Bode diagram of conventional low difference linear constant voltage regulator and low pressure difference linear voltage regulator of the present invention.
Shown in Fig. 4 is a kind of concrete circuit implementation.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
Hereinafter, by the reference accompanying drawing, example of the present invention will be described in detail.But the present invention can be implemented in many different forms, should not be defined in example given here, this example to provide in order to make the disclosure be thoroughly with complete, and pass on all sidedly thought of the present invention to those skilled in the art.
Shown in Fig. 1 is conventional low difference linear constant voltage regulator circuit diagram, and the conventional low difference linear constant voltage regulator is by error amplifier, voltage buffer, power tube PMOS, the first feedback resistance R
f1With the second feedback resistance R
f2Consist of.Error amplifier is used for benchmark voltage V
REFAnd the output feedback voltage V of linear voltage regulator
fAnd generation control signal regulating power pipe PMOS; Voltage buffer is added between error amplifier and power tube PMOS in order to the large gate capacitance of driving power PMOS, fast reaction speed; The first feedback resistance R
f1With the second feedback resistance R
f2Be used for producing suitable feedback voltage V
f, for error amplifier relatively.Wherein in endless belt, zero limit is respectively: be positioned at low pressure difference linear voltage regulator output terminal dominant pole p
D, be positioned at the non-dominant pole p of error amplifier output terminal first
EA, be positioned at the non-dominant pole p of voltage buffer output terminal second
VBAnd the z at zero point that is introduced by external capacitor
eWhen load current changes, in endless belt, zero pole location will change, and then cause loop gain and unity gain bandwidth to change.Because the null position that external capacitor is introduced is fixed, the pole location that load variations causes changes will be affected system's transient response and cause stability problem.
Shown in Fig. 2 be provided by the invention have load detecting circuit and dynamic zero point compensating circuit the low differential voltage linear voltage stabilizer circuit schematic diagram.Fig. 2 than Fig. 1 increased load detecting circuit and dynamic zero point compensating circuit: add load detecting circuit and add compensating circuit at dynamic zero point at error amplifier and low pressure difference linear voltage regulator output terminal at voltage buffer and low pressure difference linear voltage regulator output terminal.In the present invention, load detecting circuit will detect the variation of load current, and then control dynamic compensating circuit generation at zero point z at dynamic zero point
DFollow the tracks of and compensate the first non-dominant pole p
EA, the non-dominant pole p of another one
VBCan be by the z at zero point of external capacitor generation
eCompensation, thus make whole system be equivalent to single dominant pole system, and not existence and stability problem, and unity gain bandwidth is increased, and has accelerated the transient response of circuit.
Shown in Fig. 2 have load detecting circuit and dynamic zero point compensating circuit linear voltage regulator, comprise error amplifier, voltage buffer, power tube PMOS, the first feedback resistance R
f1With the second feedback resistance R
f2, this error amplifier is in order to benchmark voltage V
REFAnd the feedback voltage V of this linear voltage regulator input
f, and the generation control signal is regulated this power tube PMOS; Voltage buffer is connected between this error amplifier and power tube PMOS, in order to the large gate capacitance of driving power PMOS, fast reaction speed; Feedback resistance R
f1And R
f2Be connected between the output terminal and error amplifier of this linear voltage regulator, in order to produce feedback voltage V
f, for error amplifier; This linear voltage regulator also comprises: be connected in the load detecting circuit between this low pressure difference linear voltage regulator output terminal and this voltage buffer, and be connected between this low pressure difference linear voltage regulator output terminal and this error amplifier one dynamic zero point compensating circuit; Wherein, this load detecting circuit is for detection of the variation of load current, and then this dynamic compensating circuit generation at zero point z at dynamic zero point of control
DFollow the tracks of and compensate the first non-dominant pole p of this linear voltage regulator
EA, the second non-dominant pole p of this linear voltage regulator
VBZ at zero point by the external capacitor generation
eCompensation.
Wherein, this load detecting circuit is further used for detecting the output terminal V of this power tube PMOS and this linear voltage regulator
outBetween pressure reduction, thereby the judgement load.Two input ends of this load detecting circuit are connected to the output terminal of this voltage buffer and the output terminal V of this linear voltage regulator
out, the output terminal of this load detecting circuit is connected in compensating circuit at this at dynamic zero point.This, compensating circuit was made of the resistance with fixed value and VVC voltage variable capacitance series connection at dynamic zero point, perhaps was made of the electric capacity with fixed value and the series connection of voltage-controlled variable resistance.This, compensating circuit was further used for adjusting null position according to the output signal of this load detecting circuit at dynamic zero point, compensated adjustment to being with interior zero limit.This, input end of compensating circuit was connected in the output terminal of this load detecting circuit at dynamic zero point, and this, output terminal of compensating circuit was connected in the input end of this voltage buffer at dynamic zero point.This, compensating circuit further provided signal to being with interior zero limit to compensate adjustment according to load detecting circuit at dynamic zero point, thereby reached this linear voltage regulator to the stable purpose of different loads situation, reduced the requirement to the outer coupling capacitance of sheet.
Shown in Fig. 3 is conventional low difference linear constant voltage regulator and poles and zeros assignment of the present invention contrast Bode diagram.Schematically provided the distribution contrast that conventional low difference linear constant voltage regulator and zero limit of the present invention change along with load current in Fig. 3.Can see, along with load is changed from small to big, dominant pole p
DAnd non-dominant pole p
EATo will reduce to high-frequency mobile while loop gain.Because the null position that the outer electric capacity of sheet generates is fixed, limited to non-dominant pole compensation ability, therefore be easy to occur stability problem with load variations.Can see simultaneously, thereby unity gain bandwidth causes the transient response ability with the load variations marked change.
The load detecting that the present invention introduces and dynamic zero point compensating circuit can accurate tracking and compensate the first non-dominant pole p
EA, guaranteed Systems balanth.Because the loop unit gain frequency is directly related with the transient response ability, as can see from Figure 3, with the z at zero point of the outer electric capacity generation of sheet
eShift to low frequency, can greatly increase the unity gain bandwidth of loop, thereby significantly accelerated the transient response ability of circuit to load.
Shown in Fig. 4 is a kind of concrete circuit implementation.As shown in the figure, PMOS pipe M
DBe the load detecting pipe; NMOS manages M
ZAnd Cc formation compensating circuit at dynamic zero point.By regulation and control M
ZThereby grid voltage regulate its channel resistance and realize dynamic zero point.PMOS manages M
DReproducing power PMOS manages M take certain coefficient k (in this example as 1/200)
PElectric current, and manage M by PMOS
LSRegulate M
ZGrid voltage is to guarantee M
ZBe operated in the linear resistance district.
The present invention utilizes 0.2 μ m SOI CMOS technique to throw sheet and test.Test result shows: the present invention is having obvious improvement than the traditional structure low pressure difference linear voltage regulator aspect load transient response; The voltage spike that produces in load current abrupt change process also is far smaller than traditional structure.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of making, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (9)
- One kind have load detecting circuit and dynamic zero point compensating circuit linear voltage regulator, comprise error amplifier, voltage buffer, power tube PMOS, the first feedback resistance R f1With the second feedback resistance R f2, this error amplifier is in order to benchmark voltage V REFAnd the feedback voltage V of this linear voltage regulator input f, and the generation control signal is regulated this power tube PMOS; Voltage buffer is connected between this error amplifier and power tube PMOS, in order to the large gate capacitance of driving power PMOS, fast reaction speed; Feedback resistance R f1And R f2Be connected between the output terminal and error amplifier of this linear voltage regulator, in order to produce feedback voltage V f, for error amplifier; It is characterized in that, this linear voltage regulator also comprises:Be connected in the load detecting circuit between this low pressure difference linear voltage regulator output terminal and this voltage buffer, and be connected between this low pressure difference linear voltage regulator output terminal and this error amplifier one dynamic zero point compensating circuit; Wherein, this load detecting circuit is for detection of the variation of load current, and then this dynamic compensating circuit generation at zero point z at dynamic zero point of control DFollow the tracks of and compensate the first non-dominant pole p of this linear voltage regulator EA
- According to claim 1 have load detecting circuit and dynamic zero point compensating circuit linear voltage regulator, it is characterized in that, this load detecting circuit is further used for detecting the output terminal V of this power tube PMOS and this linear voltage regulator outBetween pressure reduction, thereby the judgement load.
- According to claim 2 have load detecting circuit and dynamic zero point compensating circuit linear voltage regulator, it is characterized in that, two input ends of this load detecting circuit are connected to the output terminal of this voltage buffer and the output terminal V of this linear voltage regulator out, the output terminal of this load detecting circuit is connected in compensating circuit at this at dynamic zero point.
- According to claim 1 have load detecting circuit and dynamic zero point compensating circuit linear voltage regulator, it is characterized in that, this, compensating circuit was made of the resistance with fixed value and VVC voltage variable capacitance series connection at dynamic zero point, perhaps was made of the electric capacity with fixed value and the series connection of voltage-controlled variable resistance.
- According to claim 1 have load detecting circuit and dynamic zero point compensating circuit linear voltage regulator, it is characterized in that, this, compensating circuit was further used for adjusting null position according to the output signal of this load detecting circuit at dynamic zero point, compensated adjustment to being with interior zero limit.
- According to claim 5 have load detecting circuit and dynamic zero point compensating circuit linear voltage regulator, it is characterized in that, this, input end of compensating circuit was connected in the output terminal of this load detecting circuit at dynamic zero point, and this, output terminal of compensating circuit was connected in the input end of this voltage buffer at dynamic zero point.
- According to claim 1 have load detecting circuit and dynamic zero point compensating circuit linear voltage regulator, it is characterized in that, this, compensating circuit further provided signal to being with interior zero limit to compensate adjustment according to load detecting circuit at dynamic zero point, thereby reach this linear voltage regulator to the stable purpose of different loads situation, reduce the requirement to the outer coupling capacitance of sheet.
- According to claim 1 have load detecting circuit and dynamic zero point compensating circuit linear voltage regulator, it is characterized in that the second non-dominant pole p of this linear voltage regulator VBZ at zero point by the external capacitor generation eCompensation.
- According to claim 1 have load detecting circuit and dynamic zero point compensating circuit linear voltage regulator, it is characterized in that,Two input ends of this error amplifier are respectively reference voltage V refAnd negative feedback voltage V f, the output terminal of this error amplifier be connected to this voltage buffer input end and this at dynamic zero point compensating circuit;The input end of this voltage buffer is connected to the output terminal of this error amplifier, and the output terminal of this voltage buffer is connected to the grid of this power tube PMOS and the input end of this load detecting circuit;The grid of this power tube PMOS is connected in the output terminal of this voltage buffer, and the source electrode of this power tube PMOS is connected in power supply V in, the drain electrode of this power tube PMOS is connected in this first feedback resistance R flAn end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103567034A CN103105883A (en) | 2011-11-11 | 2011-11-11 | Linear voltage regulator with load detection circuit and dynamic zero compensation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103567034A CN103105883A (en) | 2011-11-11 | 2011-11-11 | Linear voltage regulator with load detection circuit and dynamic zero compensation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103105883A true CN103105883A (en) | 2013-05-15 |
Family
ID=48313817
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011103567034A Pending CN103105883A (en) | 2011-11-11 | 2011-11-11 | Linear voltage regulator with load detection circuit and dynamic zero compensation circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103105883A (en) |
Cited By (30)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103513688A (en) * | 2013-08-29 | 2014-01-15 | 上海宏力半导体制造有限公司 | Low dropout linear regulator |
| CN103647555A (en) * | 2013-11-26 | 2014-03-19 | 苏州贝克微电子有限公司 | Tracking and holding circuit with dynamic error compensation function |
| CN103760942A (en) * | 2014-01-07 | 2014-04-30 | 无锡芯响电子科技有限公司 | Transient enhancement circuit applicable to low dropout regulator |
| CN104238613A (en) * | 2014-09-01 | 2014-12-24 | 东南大学 | Digital circuit low drop-out linear voltage stabilizer |
| CN104750149A (en) * | 2013-12-31 | 2015-07-01 | 北京兆易创新科技股份有限公司 | Low-dropout regulator |
| CN104765401A (en) * | 2015-03-27 | 2015-07-08 | 西安华芯半导体有限公司 | Device for adjusting power device through load variation signal |
| CN105700612A (en) * | 2016-01-28 | 2016-06-22 | 上海华虹宏力半导体制造有限公司 | Voltage regulator |
| CN106155162A (en) * | 2016-08-09 | 2016-11-23 | 电子科技大学 | A kind of low pressure difference linear voltage regulator |
| CN106647912A (en) * | 2017-01-22 | 2017-05-10 | 格科微电子（上海）有限公司 | Load-based dynamic frequency compensation method and load-based dynamic frequency compensation device |
| CN106647915A (en) * | 2016-12-05 | 2017-05-10 | 清华大学 | Low dropout regulator adopting digital circuit for compensating for capacitance |
| CN106788356A (en) * | 2016-12-13 | 2017-05-31 | 电子科技大学 | A kind of linear voltage regulator with real-time frequency compensation function |
| CN106843347A (en) * | 2015-12-07 | 2017-06-13 | 旺宏电子股份有限公司 | Semiconductor device with output compensation |
| CN106940579A (en) * | 2017-03-27 | 2017-07-11 | 北京松果电子有限公司 | Low pressure difference linear voltage regulator and its frequency compensation method |
| CN108345341A (en) * | 2017-12-27 | 2018-07-31 | 思瑞浦微电子科技（苏州）股份有限公司 | A kind of linear voltage regulator that adaptive enhancing power supply inhibits |
| CN108459650A (en) * | 2017-02-22 | 2018-08-28 | 苏州普源精电科技有限公司 | Constant voltage control loop and electronic load |
| CN109164861A (en) * | 2018-10-31 | 2019-01-08 | 上海海栎创微电子有限公司 | A kind of low pressure difference linear voltage regulator of fast transient response |
| CN109658957A (en) * | 2019-03-07 | 2019-04-19 | 中国科学院微电子研究所 | A kind of voltage regulator circuit and three-dimensional storage applied to three-dimensional storage |
| CN109857182A (en) * | 2019-02-26 | 2019-06-07 | 钜泉光电科技(上海)股份有限公司 | A kind of linear voltage-stabilizing circuit and chip |
| CN110058633A (en) * | 2018-01-19 | 2019-07-26 | 美芯晟科技（北京）有限公司 | A kind of high precision low pressure difference linear constant-current source circuit and feed-back frequency compensation method |
| CN110187733A (en) * | 2019-06-20 | 2019-08-30 | 江苏润石科技有限公司 | The low pressure difference linear voltage regulator of Earl benefit phenomenon can be eliminated |
| CN110830002A (en) * | 2019-11-27 | 2020-02-21 | 芯创智（北京）微电子有限公司 | High-bandwidth capacitor-free LDO (low dropout regulator) structure |
| CN111857229A (en) * | 2020-06-15 | 2020-10-30 | 芯创智（北京）微电子有限公司 | Dynamic zero compensation circuit with protection circuit and linear voltage stabilizing circuit thereof |
| CN112987841A (en) * | 2021-02-09 | 2021-06-18 | 无锡英迪芯微电子科技股份有限公司 | Novel linear voltage stabilizer |
| CN113252974A (en) * | 2021-07-01 | 2021-08-13 | 钰泰半导体南通有限公司 | Load current detection circuit |
| CN113467559A (en) * | 2021-07-07 | 2021-10-01 | 电子科技大学 | Adaptive dynamic zero compensation circuit applied to LDO (low dropout regulator) |
| CN113592080A (en) * | 2021-06-30 | 2021-11-02 | 北京大学 | Neuron dendrite operation method and device based on resistive switching device |
| CN113740653A (en) * | 2021-09-08 | 2021-12-03 | 无锡力芯微电子股份有限公司 | High-precision evaluation method and circuit suitable for LDO dynamic load response |
| CN113949152A (en) * | 2021-10-22 | 2022-01-18 | 华立科技股份有限公司 | Smart electric meter and power-down backup power circuit thereof |
| CN114023278A (en) * | 2021-10-28 | 2022-02-08 | 深圳市爱协生科技有限公司 | Drive Buffer circuit without external capacitor and Buffer |
| CN114253340A (en) * | 2021-12-20 | 2022-03-29 | 深圳飞骧科技股份有限公司 | Frequency compensation linear voltage stabilizing circuit with zero point dynamic adjustment |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0766164A2 (en) * | 1995-09-29 | 1997-04-02 | STMicroelectronics, Inc. | Voltage regulator with load pole stabilization |
| US20060192538A1 (en) * | 2005-02-25 | 2006-08-31 | O2Micro, Inc. | Low drop-out voltage regulator with enhanced frequency compensation |
| CN101847028A (en) * | 2010-04-14 | 2010-09-29 | 广州市广晟微电子有限公司 | Dynamic compensation circuit with ultra-low power consumption and linear regulator with the same |
| CN101957628A (en) * | 2009-07-17 | 2011-01-26 | 上海沙丘微电子有限公司 | Self-adaption zero-frequency compensation circuit in low-voltage difference linear voltage regulator |
| CN102096434A (en) * | 2010-12-23 | 2011-06-15 | 东南大学 | High-slew-rate error amplifier-based high-accuracy and high-speed low dropout (LDO) regulator circuit |
-
2011
- 2011-11-11 CN CN2011103567034A patent/CN103105883A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0766164A2 (en) * | 1995-09-29 | 1997-04-02 | STMicroelectronics, Inc. | Voltage regulator with load pole stabilization |
| US20060192538A1 (en) * | 2005-02-25 | 2006-08-31 | O2Micro, Inc. | Low drop-out voltage regulator with enhanced frequency compensation |
| CN101957628A (en) * | 2009-07-17 | 2011-01-26 | 上海沙丘微电子有限公司 | Self-adaption zero-frequency compensation circuit in low-voltage difference linear voltage regulator |
| CN101847028A (en) * | 2010-04-14 | 2010-09-29 | 广州市广晟微电子有限公司 | Dynamic compensation circuit with ultra-low power consumption and linear regulator with the same |
| CN102096434A (en) * | 2010-12-23 | 2011-06-15 | 东南大学 | High-slew-rate error amplifier-based high-accuracy and high-speed low dropout (LDO) regulator circuit |
Cited By (44)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103513688A (en) * | 2013-08-29 | 2014-01-15 | 上海宏力半导体制造有限公司 | Low dropout linear regulator |
| CN103513688B (en) * | 2013-08-29 | 2016-03-23 | 上海华虹宏力半导体制造有限公司 | Low pressure difference linear voltage regulator |
| CN103647555A (en) * | 2013-11-26 | 2014-03-19 | 苏州贝克微电子有限公司 | Tracking and holding circuit with dynamic error compensation function |
| CN104750149A (en) * | 2013-12-31 | 2015-07-01 | 北京兆易创新科技股份有限公司 | Low-dropout regulator |
| CN103760942A (en) * | 2014-01-07 | 2014-04-30 | 无锡芯响电子科技有限公司 | Transient enhancement circuit applicable to low dropout regulator |
| CN103760942B (en) * | 2014-01-07 | 2015-10-28 | 无锡芯响电子科技有限公司 | Be applicable to the transient state intensifier circuit of low pressure difference linear voltage regulator |
| CN104238613A (en) * | 2014-09-01 | 2014-12-24 | 东南大学 | Digital circuit low drop-out linear voltage stabilizer |
| CN104238613B (en) * | 2014-09-01 | 2015-10-28 | 东南大学 | A kind of digital circuit low pressure difference linear voltage regulator |
| CN104765401A (en) * | 2015-03-27 | 2015-07-08 | 西安华芯半导体有限公司 | Device for adjusting power device through load variation signal |
| CN106843347B (en) * | 2015-12-07 | 2018-09-21 | 旺宏电子股份有限公司 | Semiconductor device with output compensation |
| CN106843347A (en) * | 2015-12-07 | 2017-06-13 | 旺宏电子股份有限公司 | Semiconductor device with output compensation |
| CN105700612A (en) * | 2016-01-28 | 2016-06-22 | 上海华虹宏力半导体制造有限公司 | Voltage regulator |
| CN106155162A (en) * | 2016-08-09 | 2016-11-23 | 电子科技大学 | A kind of low pressure difference linear voltage regulator |
| CN106647915A (en) * | 2016-12-05 | 2017-05-10 | 清华大学 | Low dropout regulator adopting digital circuit for compensating for capacitance |
| CN106788356A (en) * | 2016-12-13 | 2017-05-31 | 电子科技大学 | A kind of linear voltage regulator with real-time frequency compensation function |
| CN106788356B (en) * | 2016-12-13 | 2019-04-26 | 电子科技大学 | A kind of linear voltage regulator with real-time frequency compensation function |
| CN106647912A (en) * | 2017-01-22 | 2017-05-10 | 格科微电子（上海）有限公司 | Load-based dynamic frequency compensation method and load-based dynamic frequency compensation device |
| CN108459650B (en) * | 2017-02-22 | 2023-09-12 | 普源精电科技股份有限公司 | Constant voltage control loop and electronic load |
| CN108459650A (en) * | 2017-02-22 | 2018-08-28 | 苏州普源精电科技有限公司 | Constant voltage control loop and electronic load |
| CN106940579A (en) * | 2017-03-27 | 2017-07-11 | 北京松果电子有限公司 | Low pressure difference linear voltage regulator and its frequency compensation method |
| CN108345341A (en) * | 2017-12-27 | 2018-07-31 | 思瑞浦微电子科技（苏州）股份有限公司 | A kind of linear voltage regulator that adaptive enhancing power supply inhibits |
| CN108345341B (en) * | 2017-12-27 | 2020-07-03 | 思瑞浦微电子科技（苏州）股份有限公司 | Linear voltage regulator with self-adaptive enhanced power supply suppression |
| CN110058633A (en) * | 2018-01-19 | 2019-07-26 | 美芯晟科技（北京）有限公司 | A kind of high precision low pressure difference linear constant-current source circuit and feed-back frequency compensation method |
| CN109164861A (en) * | 2018-10-31 | 2019-01-08 | 上海海栎创微电子有限公司 | A kind of low pressure difference linear voltage regulator of fast transient response |
| CN109857182A (en) * | 2019-02-26 | 2019-06-07 | 钜泉光电科技(上海)股份有限公司 | A kind of linear voltage-stabilizing circuit and chip |
| CN109658957A (en) * | 2019-03-07 | 2019-04-19 | 中国科学院微电子研究所 | A kind of voltage regulator circuit and three-dimensional storage applied to three-dimensional storage |
| CN110187733A (en) * | 2019-06-20 | 2019-08-30 | 江苏润石科技有限公司 | The low pressure difference linear voltage regulator of Earl benefit phenomenon can be eliminated |
| CN110187733B (en) * | 2019-06-20 | 2024-03-12 | 江苏润石科技有限公司 | Low-dropout linear voltage stabilizer capable of eliminating early phenomenon |
| CN110830002A (en) * | 2019-11-27 | 2020-02-21 | 芯创智（北京）微电子有限公司 | High-bandwidth capacitor-free LDO (low dropout regulator) structure |
| CN110830002B (en) * | 2019-11-27 | 2023-07-07 | 芯创智创新设计服务中心(宁波)有限公司 | High-bandwidth capacitance-free LDO structure |
| CN111857229A (en) * | 2020-06-15 | 2020-10-30 | 芯创智（北京）微电子有限公司 | Dynamic zero compensation circuit with protection circuit and linear voltage stabilizing circuit thereof |
| CN111857229B (en) * | 2020-06-15 | 2021-12-03 | 芯创智（北京）微电子有限公司 | Dynamic zero compensation circuit with protection circuit and linear voltage stabilizing circuit thereof |
| CN112987841A (en) * | 2021-02-09 | 2021-06-18 | 无锡英迪芯微电子科技股份有限公司 | Novel linear voltage stabilizer |
| CN113592080A (en) * | 2021-06-30 | 2021-11-02 | 北京大学 | Neuron dendrite operation method and device based on resistive switching device |
| CN113252974A (en) * | 2021-07-01 | 2021-08-13 | 钰泰半导体南通有限公司 | Load current detection circuit |
| CN113252974B (en) * | 2021-07-01 | 2021-11-05 | 钰泰半导体股份有限公司 | Load current detection circuit |
| CN113467559B (en) * | 2021-07-07 | 2022-03-08 | 电子科技大学 | Adaptive dynamic zero compensation circuit applied to LDO (low dropout regulator) |
| CN113467559A (en) * | 2021-07-07 | 2021-10-01 | 电子科技大学 | Adaptive dynamic zero compensation circuit applied to LDO (low dropout regulator) |
| CN113740653B (en) * | 2021-09-08 | 2022-07-29 | 无锡力芯微电子股份有限公司 | High-precision evaluation method and circuit suitable for LDO dynamic load response |
| CN113740653A (en) * | 2021-09-08 | 2021-12-03 | 无锡力芯微电子股份有限公司 | High-precision evaluation method and circuit suitable for LDO dynamic load response |
| CN113949152A (en) * | 2021-10-22 | 2022-01-18 | 华立科技股份有限公司 | Smart electric meter and power-down backup power circuit thereof |
| CN114023278A (en) * | 2021-10-28 | 2022-02-08 | 深圳市爱协生科技有限公司 | Drive Buffer circuit without external capacitor and Buffer |
| CN114023278B (en) * | 2021-10-28 | 2022-12-27 | 深圳市爱协生科技有限公司 | Drive Buffer circuit without external capacitor and Buffer |
| CN114253340A (en) * | 2021-12-20 | 2022-03-29 | 深圳飞骧科技股份有限公司 | Frequency compensation linear voltage stabilizing circuit with zero point dynamic adjustment |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103105883A (en) | Linear voltage regulator with load detection circuit and dynamic zero compensation circuit | |
| CN102096434B (en) | High-slew-rate error amplifier-based high-accuracy and high-speed low dropout (LDO) regulator circuit | |
| CN103838286B (en) | The low pressure difference linear voltage regulator of a kind of fast transient response, high stability | |
| CN101847028B (en) | Dynamic compensation circuit with ultra-low power consumption and linear regulator with the same | |
| CN102707754A (en) | Low dropout regulator | |
| CN202486643U (en) | High-bandwidth low-voltage difference linear voltage-stabilizing source, system and chip | |
| CN105242734B (en) | A kind of high power LD O circuit without external electric capacity | |
| CN102915065A (en) | Voltage regulator | |
| CN102681581A (en) | High-precision and high-speed LDO (low dropout regulator) circuit based on large-slew-rate error amplifier | |
| CN104126158A (en) | High bandwidth PSRR power supply regulator | |
| CN103472882B (en) | Low dropout regulator of integrated slew rate enhancement circuit | |
| US9998099B2 (en) | Feed-forward bias circuit | |
| CN103383580A (en) | Self-adaptive low drop regulator | |
| CN106484020A (en) | Low-dropout linear voltage-regulating circuit | |
| CN104977960A (en) | Power supply system and electronic device with the same | |
| CN105739585A (en) | Low-power-consumption LDO circuit for radio frequency circuit | |
| CN115328254A (en) | High transient response LDO circuit based on multiple frequency compensation modes | |
| CN104950976A (en) | Voltage stabilizing circuit based on slew rate increasing | |
| CN106647912A (en) | Load-based dynamic frequency compensation method and load-based dynamic frequency compensation device | |
| CN101853037B (en) | Energy-saving voltage stabilizer | |
| CN103592990A (en) | Linear voltage-stabilized power supply and voltage regulating method thereof | |
| CN103324234B (en) | Output dynamic regulation circuit of low dropout linear regulator (LDO) | |
| CN102645950A (en) | Buffer applied to low-dropout regulator | |
| CN101833346A (en) | Low dropout regulator with enhanced precision and power supply rejection rate | |
| CN103399608A (en) | Low dropout regulator (LDO) integrated with slew rate intensifier circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20130515 |