CN110830002A - High-bandwidth capacitor-free LDO (low dropout regulator) structure - Google Patents
High-bandwidth capacitor-free LDO (low dropout regulator) structure Download PDFInfo
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- CN110830002A CN110830002A CN201911180953.XA CN201911180953A CN110830002A CN 110830002 A CN110830002 A CN 110830002A CN 201911180953 A CN201911180953 A CN 201911180953A CN 110830002 A CN110830002 A CN 110830002A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/46—One-port networks
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention provides a high-bandwidth capacitor-free LDO (low dropout regulator) structure, which comprises an input voltage Vin, an operational amplifier module, a low-resistance module and an output load capacitor C1, wherein the input voltage Vin is connected with the operational amplifier module, the low-resistance module comprises MOS (metal oxide semiconductor) tubes PM1, PM2, NM1 and a bias power supply, the bias power supply is connected with the MOS tube PM1 and provides bias voltage for the MOS tube PM1, the drain electrode of the MOS tube PM1 is connected with the drain electrode of the MOS tube NM1, the source electrode of the MOS tube PM1 is connected with the source electrode of the MOS tube PM2, the grid electrode of the MOS tube PM2 is connected with the drain electrodes of the MOS tubes PM1 and NM1, and the source electrode of the MOS tube NM1 and the drain electrode of the MOS tube PM; according to the LDO structure, a larger capacitor is added in the LDO structure while the stability of the circuit is ensured, so that the noise filtering capability of the circuit can be enhanced, and the defect that a bypass capacitor is added outside a chip in the prior art is overcome; in addition, the bandwidth of the whole circuit structure is increased, and a larger bandwidth is obtained.
Description
Technical Field
The invention relates to the technical field of LDO circuits, in particular to a high-bandwidth capacitor-free LDO structure.
Background
The existing traditional LDO (low dropout regulator) circuit does not specially process power supply noise, and the current method for reducing the LDO noise is mainly solved from two aspects, namely, an RC (resistance capacitance) filter is connected to the output of the traditional LDO circuit structure for filtering, and a large capacitor is required to be added outside a chip for filtering high-frequency noise; in the second method, since noise mainly originates from the reference source circuit and the error amplifier circuit, the noise can be reduced by designing a low-noise reference source circuit and an error amplifier circuit.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a high-bandwidth capacitor-free LDO structure, which can realize high bandwidth of a circuit and can be internally provided with a larger capacitor for filtering high-frequency noise and eliminating an externally-connected bypass capacitor circuit.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
the utility model provides a high bandwidth exempts from electric capacity LDO structure, the LDO structure includes input voltage Vin, operational amplifier module, low resistance module and output load electric capacity C1, input voltage Vin with the operational amplifier module links to each other, the low resistance module includes MOS pipe PM1, PM2, NM1 and bias power supply, the bias power supply with MOS pipe PM1 links to each other, provides bias voltage for it, MOS pipe PM 1's drain with MOS pipe NM 1's drain electrode links to each other, MOS pipe PM 1's source with MOS pipe PM 2's source electrode links to each other, MOS pipe PM 2's grid with MOS pipe PM1 and NM 1's drain electrode links to each other, MOS pipe NM 1's source electrode and MOS pipe PM 2's drain electrode link to each other with output VOUT.
Further, the operational amplifier module and the low-resistance module form a negative feedback connection circuit for ensuring that the input voltage Vin is equal to the voltage of the output terminal VOUT.
Further, the output end of the operational amplifier module is also connected with an output load capacitor C2.
Further, the MOS tube is a source follower tube.
Compared with the traditional technical scheme, the technical scheme has the beneficial effects that: according to the LDO structure, a larger capacitor is added in the LDO structure while the stability of the circuit is ensured, so that the noise filtering capability of the circuit can be enhanced, and the defect that a bypass capacitor is added outside a chip in the prior art is overcome; in addition, the bandwidth of the whole circuit structure is increased, and a larger bandwidth is obtained.
Drawings
Fig. 1 is a block diagram illustrating the structural principle of the high-bandwidth capacitor-free LDO in this embodiment.
Fig. 2 is a schematic diagram of the structure of the high-bandwidth capacitor-free LDO in this embodiment.
Detailed Description
The invention is described in further detail below with reference to the drawings and the detailed description.
The invention aims at the problem that the conventional method for reducing the LDO noise comprises the step of filtering by connecting an RC filter to the output of a traditional LDO circuit structure, and the phenomenon that a large capacitor is required to be added outside a chip for filtering high-frequency noise is avoided.
Referring to fig. 1, the present embodiment will be briefly described with reference to fig. 1. The high-bandwidth capacitor-free LDO structure in the embodiment mainly comprises two modules; the input voltage Vin is amplified to an output end VOUT through a differential operational amplifier circuit and a low-resistance circuit; in the circuit, the operational amplifier module is mainly used for differential amplification, and the low-resistance module is mainly used for reducing the impedance of the output to the ground.
Referring to fig. 2, the high bandwidth capacitor-less LDO structure of the present embodiment includes an operational amplifier a, a load capacitor C2, a bias power vbias, MOS transistors PM1, PM2, and NM1, and an output load capacitor C1, wherein an input voltage Vin is connected to the operational amplifier a. The bias power supply vbias is connected with MOS pipe PM1 to provide bias voltage for it, the drain electrode of MOS pipe PM1 is connected with the drain electrode of MOS pipe NM1, the source electrode of MOS pipe PM1 is connected with the source electrode of MOS pipe PM2, the grid electrode of MOS pipe PM2 is connected with the drain electrodes of MOS pipes PM1 and NM1, the source electrode of MOS pipe NM1 and the drain electrode of MOS pipe PM2 are connected with output terminal VOUT.
Referring to fig. 2, in the dashed box S1, a load capacitor C2 is connected to the output terminal of the operational amplifier a, in order to ensure the stability of the circuit and to improve the Power Supply Rejection Ratio (PSRR) of the operational amplifier output; in a dashed line box S2, the MOS transistors PM1, PM2, and NM1 constitute a low resistance module, the bias power supply vbias provides bias voltage for the MOS transistor PM1, and the NM1 is a source follower transistor, which also serves as a power transistor in this embodiment; in a dashed box S3, the resistor R1 and the output load capacitor C1 serve as an output load resistor and an output load capacitor of the output circuit, respectively.
The working principle of the LDO structure is as follows: the operational amplifier A, the low-resistance module and the low-resistance module circuit form a negative feedback circuit for ensuring that the input voltage Vin is equal to the voltage of the output end VOUT.
The low-resistance module circuit comprises MOS tubes PM1, PM2 and NM1, wherein the low-resistance module is of a super source follower structure, and the output impedance of the low-resistance module is obtained through small signal analysis: rout is 1/(g)mn1gmp2rno1) The simple source follower structure output impedance is: rout1 ═ 1/gmn1Therefore, the impedance of the output terminal VOUT to the ground is reduced by g relative to a simple source follower circuit structuremp2rno1X wherein gmn1、rno1Transconductance and impedance of NM1 tube, respectively; gmp2、rpo2Respectively, the transconductance and the impedance of the PM2 tube.
The LDO circuit in this embodiment has two main poles, and the second pole is located at the output end of the circuit
The dominant pole is located at the output of the operational amplifier A and is
Where Ra is the output load resistance of the operational amplifier a and C is the output load capacitance of the operational amplifier a.
While the loop stability of the LDO structure is ensured, the capacitor C1 can be increased relative to a simple source follower circuitgmp2ro1Doubling; however, the addition of a large output bypass capacitor C1 actually improves the noise filtering capability of the circuit, thereby eliminating the disadvantage of the output and off-chip bypass large capacitor circuit in filtering noise.
Furthermore, the output impedance is reduced for the circuit, i.e.f is increased, which corresponds to an increase in the distance of the dominant pole from the origin, so that the entire circuit configuration can output a very high bandwidth.
In summary, the LDO structure in the present disclosure can enhance the noise filtering capability of the circuit by adding a larger capacitor inside the LDO structure while ensuring the stability of the circuit, and meanwhile, the defect that the bypass capacitor is added outside the LDO structure in the conventional art is eliminated; in addition, the bandwidth of the whole circuit structure is increased, and a larger bandwidth is obtained.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is intended to include such modifications and variations.
Claims (4)
1. The utility model provides a capacitance LDO structure is exempted from to high bandwidth which characterized in that: the LDO structure includes input voltage Vin, operational amplifier module, low resistance module and output load electric capacity C1, input voltage Vin with the operational amplifier module links to each other, the low resistance module includes MOS pipe PM1, PM2, NM1 and bias power supply, bias power supply with MOS pipe PM1 links to each other, provides bias voltage for it, MOS pipe PM 1's drain with MOS pipe NM 1's drain electrode links to each other, MOS pipe PM 1's source with MOS pipe PM 2's source electrode links to each other, MOS pipe PM 2's grid with MOS pipe PM1 and NM 1's drain electrode links to each other, MOS pipe NM 1's source and MOS pipe PM 2's drain electrode link to each other with output VOUT.
2. The high-bandwidth capacitor-free LDO structure of claim 1, wherein: the operational amplifier module and the low-resistance module form a negative feedback connection circuit for ensuring that the input voltage Vin is equal to the voltage of the output end VOUT.
3. A high bandwidth capacitor-less LDO structure according to claim 1 or 2, wherein: the output end of the operational amplifier module is also connected with an output load capacitor C2.
4. The high-bandwidth capacitor-free LDO structure of claim 1, wherein: the MOS tube is a source follower tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911180953.XA CN110830002B (en) | 2019-11-27 | 2019-11-27 | High-bandwidth capacitance-free LDO structure |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201911180953.XA CN110830002B (en) | 2019-11-27 | 2019-11-27 | High-bandwidth capacitance-free LDO structure |
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| CN110830002A true CN110830002A (en) | 2020-02-21 |
| CN110830002B CN110830002B (en) | 2023-07-07 |
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Citations (7)
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|---|---|---|---|---|
| US20080116862A1 (en) * | 2006-11-21 | 2008-05-22 | System General Corp. | Low dropout regulator with wide input voltage range |
| US20110193538A1 (en) * | 2010-02-05 | 2011-08-11 | Dialog Semiconductor Gmbh | Domino voltage regulator (dvr) |
| CN103105883A (en) * | 2011-11-11 | 2013-05-15 | 中国科学院微电子研究所 | Linear voltage regulator with load detection circuit and dynamic zero compensation circuit |
| US20160077537A1 (en) * | 2013-04-30 | 2016-03-17 | Freescale Semiconductor, Inc. | A low drop-out voltage regulator and a method of providing a regulated voltage |
| CN107291144A (en) * | 2017-05-23 | 2017-10-24 | 上海集成电路研发中心有限公司 | It is a kind of with transient state enhancing structure unit without electric capacity LDO circuit outside piece |
| CN208890774U (en) * | 2018-10-26 | 2019-05-21 | 成都英特格灵微电子技术有限公司 | A kind of circuit structure improving load switch stability |
| TW201928566A (en) * | 2017-10-12 | 2019-07-16 | 美商微晶片科技公司 | On chip NMOS capless LDO for high speed microcontrollers |
-
2019
- 2019-11-27 CN CN201911180953.XA patent/CN110830002B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080116862A1 (en) * | 2006-11-21 | 2008-05-22 | System General Corp. | Low dropout regulator with wide input voltage range |
| US20110193538A1 (en) * | 2010-02-05 | 2011-08-11 | Dialog Semiconductor Gmbh | Domino voltage regulator (dvr) |
| CN103105883A (en) * | 2011-11-11 | 2013-05-15 | 中国科学院微电子研究所 | Linear voltage regulator with load detection circuit and dynamic zero compensation circuit |
| US20160077537A1 (en) * | 2013-04-30 | 2016-03-17 | Freescale Semiconductor, Inc. | A low drop-out voltage regulator and a method of providing a regulated voltage |
| CN107291144A (en) * | 2017-05-23 | 2017-10-24 | 上海集成电路研发中心有限公司 | It is a kind of with transient state enhancing structure unit without electric capacity LDO circuit outside piece |
| TW201928566A (en) * | 2017-10-12 | 2019-07-16 | 美商微晶片科技公司 | On chip NMOS capless LDO for high speed microcontrollers |
| CN208890774U (en) * | 2018-10-26 | 2019-05-21 | 成都英特格灵微电子技术有限公司 | A kind of circuit structure improving load switch stability |
Non-Patent Citations (3)
| Title |
|---|
| EDWARD N.Y.HO等: "a capless cmos active feedback low dropout regulator with slew rate enhancement for portable on chip application" * |
| SEONG JIN YUN 等: "capless ldo regulator achieving -76db psr and 96.3fs fom" * |
| 王超等: "一种快速瞬态响应无片外电容ldo" * |
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| CN110830002B (en) | 2023-07-07 |
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